CN103984263B - A kind of compatible ISA, the general dsp module of pci bus interface and collocation method - Google Patents
A kind of compatible ISA, the general dsp module of pci bus interface and collocation method Download PDFInfo
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- CN103984263B CN103984263B CN201410201522.8A CN201410201522A CN103984263B CN 103984263 B CN103984263 B CN 103984263B CN 201410201522 A CN201410201522 A CN 201410201522A CN 103984263 B CN103984263 B CN 103984263B
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Abstract
The present invention proposes a kind of compatible isa bus interface, the general dsp module of pci bus interface, including dsp chip, dsp chip extension SDRAM, crystal oscillator, Switching Power Supply and CPLD；The corner of printed board arranges hole, location, and the both sides of printed board arrange connector；Integrated circuit is placed in the front of printed board, and back-side ground covers copper and only places filtering and decoupling capacitor；Multiple earth connection, hole, described location ground connection it is evenly arranged in the middle of the holding wire of described connector.DSP module compatibility ISA of the present invention and pci interface, have reasonable versatility, can lower the risk again developing DSP module, reduces the workload of debugging；DSP module is separated with feature board, is connected by high-density contact pin, the DSP module electromagnetic interference to feature board can be reduced；DSP module is separated with functional module, enhances the reliability of each piece of printed board, reduce maintenance complexity.
Description
Technical field
The present invention relates to digital control field, particularly to a kind of compatible ISA, pci bus interface general
DSP module, further relates to the collocation method of the general dsp module of a kind of compatible ISA, pci bus interface.
Background technology
Owing to CPU has graphics display capability at a high speed, abundant data-interface, DSP has powerful number
According to calculation function, therefore in multiple microwave, Psophometer, all have employed CPU+DSP framework,
DSP is one or more, DSP complete the computing of data, and operation result is delivered to CPU shows
Show.
In high-performance desk-top instrument, CPU uses PCI (peripheral element extension interface) interface at a high speed,
In miniaturization instrument, CPU many employings interface mode simple ISA (industrial standard architectures) interface.
In current conceptual design, the method for more employing is as a part for feature board using DSP, incites somebody to action
The functional units such as DSP, A/D converter, analog circuit design in one piece of printed board, and DSP is as feature board
Digital processing part.When designing the printed board of difference in functionality, it is required for redesigning DSP and attached electricity
Road, needs that DSP partial circuit carries out fabric swatch again, draws and the work such as debugging.
DSP is designed by prior art as a part for feature board, there is following shortcoming:
(1) often design one piece of feature board, be required for DSP and accessory circuit thereof are repainted, due to
DSP is highdensity BGA package, and any one mistake all may cause DSP to run, thus deposits
In bigger design risk；
(2) a feature board with DSP of new design, is required for debugging DSP, particularly adopts
Circuit and sequential by HPI interface mode download DSP program are more complicated, and debugging interface circuit and sequential
Longer time and bigger energy can be spent；
(3) DSP is high-speed digital circuit, has the electromagnetic radiation of very high frequency, by DSP and analog circuit
It is placed in same printed board, it is easy to analog circuit is caused electromagnetic interference；
(4), from the point of view of relative to one piece of printed board, DSP and accessory circuit thereof can increase the complexity of printed board,
Thus the reliability of printed board can be reduced, increase maintenance complexity.
Summary of the invention
For solving the problems referred to above, the present invention propose a kind of compatible isa bus interface, pci bus interface general
DSP module and collocation method, the general dsp module of present invention design, ISA interface and CPU can be passed through
Communication, it is also possible to communicated with CPU by pci interface, there is good compatibility.
The technical scheme is that and be achieved in that:
A kind of compatible isa bus interface, the general dsp module of pci bus interface, including dsp chip,
Dsp chip extension SDRAM, crystal oscillator, Switching Power Supply and CPLD；The corner of printed board arranges fixed
Hole, position, the both sides of printed board arrange connector；Integrated circuit is placed in the front of printed board, and back-side ground covers copper
And only place filtering and decoupling capacitor；Multiple earth connection, institute it is evenly arranged in the middle of the holding wire of described connector
State hole, location ground connection；
ISA and the data bus signal of pci interface multiplexing, address bus signal, reading write enable signal, interruption
Signal accesses CPLD by the first connector, wherein, is directly connected with CPU with the bus of ISA interface,
The bus of pci interface controls accelerator with pci bus and is connected；
The HPI interface of dsp chip accesses CPLD, CPLD and is bridged with HPI interface by pci interface, or
Person is by the bridge joint of ISA interface Yu HPI interface；
The jtag interface of dsp chip and the jtag interface of CPLD receive feature board by the first connector,
The EMIF interface of dsp chip, iic bus interface, GPIO interface, McBSP interface and interrupt interface
It is linked into feature board by the second connector.
Alternatively, all vias all welding resistances of described printed board positive and negative.
The present invention also provides for the general dsp module configuration of a kind of compatible isa bus interface, pci bus interface
Method, comprises the following steps:
By ISA and the data bus signal of pci interface multiplexing, address bus signal, reading write enable signal,
Interrupt signal accesses CPLD by the first connector, wherein, directly connects with CPU with the bus of ISA interface
Connecing, the bus of pci interface controls accelerator with pci bus and is connected；
The HPI interface of dsp chip accesses CPLD, CPLD and is bridged with HPI interface by pci interface, or
Person is by the bridge joint of ISA interface Yu HPI interface；
The jtag interface of dsp chip and the jtag interface of CPLD receive feature board by the first connector,
The EMIF interface of dsp chip, iic bus interface, GPIO interface, McBSP interface and interrupt interface
It is linked into feature board by the second connector.
Alternatively, for ISA interface and pci interface, select to bridge program accordingly, connect by JTAG
Mouth downloads to inside CPLD, is bridged with HPI interface by PCI and ISA.
Alternatively, the concrete configuration of DSP is included:
Configuration phase lock control register, configures DSP internal clocking, internal clocking is configured to 300MHz；
Configuration extension storage interface, is configured to sdram interface by space outerpace CE0 section, and access rate is
100MHz；
Space outerpace CE1～CE3 section are configured to asynchronous interface；
Configuration timer interruption and hardware interrupts；
GP configuring I/O interface；
Configuration McBSP interface.
Alternatively, CCS completes the configuration of dsp software, generates the file extending entitled " .out ",
And by " .out " file generated binary code " .bin " file, the information that this binary file comprises includes:
File is at initial address, file size and the binary code of contents of program generation of DSP；CPU should
Binary file, by the bridge interface of PCI or ISA Yu HPI, is written to, inside dsp chip, write
After having entered, to HPI control register HPIC write 2, start dsp chip, dsp chip according to
Above-mentioned configuration operation, completes the initial configuration of DSP module.
Alternatively, after completing the initial configuration of dsp chip, dsp chip function program is passed through HPI
In the internal storage of interface write dsp chip or outside SDRAM, and to the control register of HPI
HPIC write 2, starts the function program of dsp chip.
The invention has the beneficial effects as follows:
(1) this module compatibility ISA and pci interface, have reasonable versatility, can lower and again open
Send out the risk of DSP module, reduce the workload of debugging；
(2) DSP module is separated with feature board, connected by high-density contact pin, DSP mould can be reduced
The block electromagnetic interference to feature board；
(3) DSP module is separated with functional module, reduce the complexity of circuit board, enhance each piece
The reliability of printed board, reduces maintenance complexity.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to enforcement
In example or description of the prior art, the required accompanying drawing used is briefly described, it should be apparent that, describe below
In accompanying drawing be only some embodiments of the present invention, for those of ordinary skill in the art, do not paying
On the premise of going out creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structural representation of one embodiment of printed board of DSP module of the present invention；
Fig. 2 is the hardware circuit diagram of DSP module of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearly
Chu, be fully described by, it is clear that described embodiment be only a part of embodiment of the present invention rather than
Whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not making creation
The every other embodiment obtained under property work premise, broadly falls into the scope of protection of the invention.
The present invention designs, in order to reduce, the technical risk that DSP exists in feature board, reduces debugging time and essence
Power, reduces the electromagnetic interference to analog circuit, reduces maintenance complexity, DSP and accessory circuit are placed in one piece
In independent printed board, as independent DSP module.
DSP module, as a part for feature board, by highdensity connector, is fixed by this DSP module
On feature board, and define hardware circuit and the software merit rating program of DSP Yu CPU communication interface.?
During exploitation New function plate, can directly apply this DSP module and corresponding interface circuit and software program,
Without DSP is debugged, the efficiency designed and developed can be greatly improved.
Fig. 1 show an embodiment of the PCB layout of DSP module of the present invention, and its area is 80mm
× 55mm, angle is arranged 4 circular ports as location hole 13, DSP module can be fixed on feature board
On；Printed board both sides arrange connector 11,12, and connector 11,12 is 100 pin, 0.8 millimeter of spacing
The double socket of high density, is connected together with the double contact pin on feature board；The dsp chip 21 of the present invention, its
Model is TMS320C6713, is a 32 float-point DSP, and operating frequency is 300MHz；DSP
Chip extension SDRAM22 (dynamic memory), its capacity is 512M byte；Crystal oscillator 23
Frequency is 50MHz, provides clock for dsp chip 21；Switching Power Supply 24, produces the power supply of+1.26V,
Core Operational power supply is provided for dsp chip；The port voltage of dsp chip is+3.3V；CPLD25 is (multiple
Miscellaneous PLD) it is 144 pin, for the HPI interface of PCI, ISA interface Yu dsp chip 21
Communication connection.
DSP module in order to ensure the present invention has the relatively low electromagnetic radiation of ratio, interference function plate is not simulated
Circuit, this DSP module printed board back side large area ground connection covers copper, and integrated circuit is not placed at the printed board back side,
Only put filtering and decoupling capacitor；As far as possible many earth connections it are evenly arranged in the middle of the holding wire of connector 11,12；
Hole 13, four location ground connection.Owing to the printed board device density of the present invention is the highest, short time in order to prevent from welding
Road, by all vias all welding resistances of positive and negative.
The hardware circuit of the DSP module of the present invention is as shown in Figure 2.CPU communicates with dsp chip 21, adopts
Be the HPI interface of dsp chip, HPI interface is a set of stand-alone interface of dsp chip, passes through HPI
Interface, can directly access the internal storage of dsp chip, is not affecting the feelings that dsp chip normally works
The transmission of data is realized under condition.HPI interface includes 16 bit data bus HI), HPI operating control signal, master
Machine waiting signal HRDY etc..
By connector 11 by data bus signal, address bus signal, reading write enable signal, interrupt signal
Etc. being linked into CPLD, it is ISA and the signal of pci interface multiplexing.Wherein direct with the bus of ISA interface
Being connected with CPU, the bus of pci interface is to control accelerator with pci bus to be connected, such as pci bus control
PCI9054 selected by accelerator processed.
CPLD25 achieves the bridge joint of pci interface and HPI interface, or ISA interface and HPI interface
Bridge joint.The signals such as ISA and the data/address bus of pci interface, address bus, read-write enable, interruption access CPLD
25, HPI interface signal (data/address bus HD, HPI interface control signal, the main frame etc. of dsp chip 21
Treat signal HRDY, DSP reset signal etc.) access CPLD25.Work is developed by the CPLD of Altera
Tool quartus II, for ISA interface and pci interface, is respectively configured the bridge joint program of correspondence, it is achieved PCI
Bridge joint with ISA Yu HPI interface.In the application according to the difference of cpu i/f, select to bridge journey accordingly
Sequence, is downloaded to inside CPLD25 by jtag interface.The jtag interface of CPLD25 passes through connector
11 receive in feature board, need to weld the contact pin of 2 × 5 in feature board.
The jtag interface of dsp chip 21 receives feature board by the first connector 11, needs in feature board
Weld the double contact pin of the 2.54mm spacing of 2 × 7, for the software debugging of DSP.
The various interfaces of dsp chip 21, such as: EMIF interface, iic bus interface, GPIO interface,
McBSP and interruption etc., be linked into feature board by the second connector 12, on feature board, and can basis
Actual demand, various buses be controlled, reading and writing data etc. operates.
Completed the basic configuration of the DSP module of the present invention by software so that DSP module after configuration is complete,
Just can be properly functioning.The software of the present invention completes in DSP exploitation software CCS, and it is entitled to generate extension
The file of " .out ", the concrete configuration of DSP is included by this document:
Configuration PLL (phaselocked loop) controls register, configures DSP internal clocking, is configured to by internal clocking
300MHz；
Configuration EMIF (extension storage) interface, space outerpace CE0 section is configured to SDRAM, and (synchronization is deposited
Reservoir) interface, access rate is 100MHz；
Space outerpace CE1～CE3 section are configured to asynchronous interface；
Configuration timer interruption and hardware interrupts；
GP configuring I/O interface；
Configuration McBSP interface.
In CCS, complete the configuration of dsp software, generate the file extending entitled " .out ", and by " .out "
File generated binary code " .bin " file, the information that this binary file comprises includes: file is at DSP
Initial address, the binary code that generates of file size and contents of program.CPU by this binary file,
By the bridge interface of PCI or ISA Yu HPI, it is written to inside dsp chip, after having write, to
HPI control register HPIC write 2, start dsp chip, dsp chip according to above-mentioned configuration operation,
Complete the initial configuration of dsp chip.
After completing the initial configuration of dsp chip, DSP module can be properly functioning.Next step needs will tool
The dsp chip function program of body writes internal storage or the outside of dsp chip by HPI interface
In SDRAM, and write 2 to the control register HPIC of HPI, start the function program of dsp chip.
DSP module compatibility ISA of the present invention and pci interface, have reasonable versatility, can lower
Again develop the risk of DSP module, reduce the workload of debugging；DSP module is separated with feature board, logical
Overpopulation contact pin connects, and can reduce the DSP module electromagnetic interference to feature board；By DSP module and merit
Module can separate, reduce the complexity of circuit board, enhance the reliability of each piece of printed board, reduce dimension
Repair complexity.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all at this
Within bright spirit and principle, any modification, equivalent substitution and improvement etc. made, should be included in this
Within bright protection domain.
Claims (2)
1. a general dsp module collocation method for compatible isa bus interface, pci bus interface, it is special
Levy and be, including dsp chip, dsp chip extension SDRAM, crystal oscillator, Switching Power Supply and CPLD；
The corner of printed board arranges hole, location, and the both sides of printed board arrange connector；The front of printed board is placed integrated
Circuit, back-side ground covers copper and only places filtering and decoupling capacitor；In the middle of the holding wire of described connector uniformly
Arrange multiple earth connection, hole, described location ground connection；
By ISA and the data bus signal of pci interface multiplexing, address bus signal, reading write enable signal,
Interrupt signal accesses CPLD by the first connector, wherein, directly connects with CPU with the bus of ISA interface
Connecing, the bus of pci interface controls accelerator with pci bus and is connected；
The HPI interface of dsp chip accesses CPLD, CPLD and is bridged with HPI interface by pci interface, or
Person is by the bridge joint of ISA interface Yu HPI interface；
The jtag interface of dsp chip and the jtag interface of CPLD receive feature board by the first connector,
The EMIF interface of dsp chip, iic bus interface, GPIO interface, McBSP interface and interrupt interface
It is linked into feature board by the second connector；
For ISA interface and pci interface, select to bridge program accordingly, downloaded to by jtag interface
Inside CPLD, PCI and ISA is bridged with HPI interface；
The concrete configuration of DSP is included:
Configuration phase lock control register, configures DSP internal clocking, internal clocking is configured to 300MHz；
Configuration extension storage interface, is configured to sdram interface by space outerpace CE0 section, and access rate is
100MHz；
Space outerpace CE1～CE3 section are configured to asynchronous interface；
Configuration timer interruption and hardware interrupts；
GP configuring I/O interface；
Configuration McBSP interface；
In CCS, complete the configuration of dsp software, generate the file extending entitled " .out ", and by " .out "
File generated binary code " .bin " file, the information that this binary file comprises includes: file is at DSP
Initial address, the binary code that generates of file size and contents of program；CPU by this binary file,
By the bridge interface of PCI or ISA Yu HPI, it is written to inside dsp chip, after having write, to
HPI control register HPIC write 2, start dsp chip, dsp chip according to above-mentioned configuration operation,
Complete the initial configuration of dsp chip.
2. compatible isa bus interface, the general dsp module of pci bus interface as claimed in claim 1
Collocation method, it is characterised in that after completing the initial configuration of dsp chip, by dsp chip function program
Write by HPI interface in internal storage or the outside SDRAM of dsp chip, and to the control of HPI
Register HPIC processed write 2, starts the function program of dsp chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410201522.8A CN103984263B (en) | 2014-05-07 | 2014-05-07 | A kind of compatible ISA, the general dsp module of pci bus interface and collocation method |
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| CN201410201522.8A CN103984263B (en) | 2014-05-07 | 2014-05-07 | A kind of compatible ISA, the general dsp module of pci bus interface and collocation method |
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| CN104657297B (en) * | 2015-02-03 | 2018-02-09 | 杭州士兰控股有限公司 | Computing device extends system and extended method |
| CN106569022A (en) * | 2016-11-15 | 2017-04-19 | 中国电子科技集团公司第四十研究所 | Low-power-consumption hand-held microwave power meter |
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| CN2510902Y (en) * | 2001-06-04 | 2002-09-11 | 刘宗明 | Computer main board failure diagnosis card |
| CN2795941Y (en) * | 2005-03-16 | 2006-07-12 | 张维 | ISA-PCI bus interface conversion board card device |
| CN201072511Y (en) * | 2007-02-27 | 2008-06-11 | 上海华北科技有限公司 | Industrial mainboard for supporting PCI-E based on PICMG1.0 |
| CN201126571Y (en) * | 2007-11-07 | 2008-10-01 | 西安大唐电信有限公司 | PC104+ embedded computer system based on PowerQUICC processor |
| CN201383075Y (en) * | 2008-12-01 | 2010-01-13 | 北京华力创通科技股份有限公司 | PC104-plus controller based on PowerPC processor |
| CN203338347U (en) * | 2013-06-06 | 2013-12-11 | 湖北师范学院 | Interface circuit for computer main board failure detection device |
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Effective date of registration: 20190315 Address after: 266000 No. 98 Xiangjiang Road, Huangdao District, Qingdao City, Shandong Province Patentee after: China Electronics Technology Instrument and Meter Co., Ltd. Address before: 266555 No. 98 Xiangjiang Road, Qingdao economic and Technological Development Zone, Shandong Patentee before: The 41st Institute of CETC |
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