CN103913688A - MOS transistor characteristic testing circuit and method - Google Patents
MOS transistor characteristic testing circuit and method Download PDFInfo
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- CN103913688A CN103913688A CN201310003944.XA CN201310003944A CN103913688A CN 103913688 A CN103913688 A CN 103913688A CN 201310003944 A CN201310003944 A CN 201310003944A CN 103913688 A CN103913688 A CN 103913688A
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Abstract
The invention discloses a testing circuit, and particularly relates to an MOS transistor characteristic testing circuit used for testing an MOS transistor with a gate electrode, a source electrode and a drain electrode. The MOS transistor characteristic testing circuit comprises a first single-pole single-throw switch, a second single-pole single-throw switch and a single-pole double-throw switch, wherein a first contact of the first single-pole single-throw switch is connected with the gate electrode, and a second contact of the first single-pole single-throw switch is connected with the source electrode; a third contact of the second single-pole single-throw switch is connected with the drain electrode, and a fourth contact of the second single-pole single-throw switch is connected with the source electrode; a fifth contact of the single-pole double-throw switch is connected with a power supply device, a sixth contact of the single-pole double-throw switch is connected with the drain electrode, and a seventh contact of the single-pole double-throw switch is connected with the gate electrode; when the first contact is connected with the second contact to enable the gate electrode and the source electrode to have a short circuit, and the fifth contact is connected with the sixth contact, voltage of the power supply device is applied between the drain electrode and the source electrode so that the high-temperature reverse bias characteristic of the MOS transistor can be tested; when the third contact is connected with the fourth contact to enable the drain electrode and the source electrode to have a short circuit, and the fifth contact is connected with the seventh contact, the voltage of the power supply device is applied between the gate electrode and the source electrode so that the high-temperature gate bias characteristic of the MOS transistor can be tested.
Description
Technical field
The present invention relates to the field tests that semiconductor is manufactured, be specifically related to a kind of test circuit and method thereof of test MOS pipe characteristic
Background technology
During semiconductor is manufactured, after producing, POWER metal-oxide-semiconductor can not come into operation immediately, but to utilize relevant fail-test to test unfailing performance and the actual life to this metal-oxide-semiconductor, and the HTRB(high temperature reverse bias of metal-oxide-semiconductor) and HTGB(high temp. grate biasing) characteristic is two very important reliability items of metal-oxide-semiconductor, wherein, high temperature reverse bias characteristic has reflected that metal-oxide-semiconductor at high temperature verifies the reverse breakdown characteristics of PN junction, and high temp. grate biasing has reflected the at high temperature quality condition of grid oxygen of metal-oxide-semiconductor.
In prior art, the circuit diagram of the characteristic of test MOS pipe as depicted in figs. 1 and 2, wherein, Fig. 1 is the test circuit figure for the HTRB characteristic of N-channel POWER metal-oxide-semiconductor, P-channel POWER metal-oxide-semiconductor should make added voltage reversal, as can be seen from the figure, when HTRB experiment, the grid G of metal-oxide-semiconductor and source S short circuit, one bias voltage is added between drain D and source class S after by the resistance R of connecting, thereby acting as in the time that drain D and source S puncture of resistance R avoids short circuit to cause that large electric current damages test circuit.Fig. 2 is the test circuit figure for the HTGB characteristic of N-channel metal-oxide-semiconductor; P-channel POWER metal-oxide-semiconductor must make added voltage reversal; as can be seen from the figure; when HTGB experiment; the drain D of metal-oxide-semiconductor and source S short circuit; one bias voltage is added between grid G and source class S after by the resistance R of connecting, and resistance R is similarly the effect of protection equipment.
The present patent application people finds that prior art exists following technical matters in the process of implementing the embodiment of the present application:
Prior art can only be tested in high temperature reverse bias characteristic and high temp. grate biasing characteristic for the high temperature reverse bias characteristic of metal-oxide-semiconductor and the test circuit of high temp. grate biasing characteristic at one time, can not test two specific characters simultaneously, and high temperature reverse bias characteristic and the high temp. grate biasing characteristic of test MOS pipe that can not be in batches.
Summary of the invention
The embodiment of the present application provides the test circuit of a kind of test MOS pipe high temperature reverse bias and high temp. grate biasing characteristic, can solve in prior art the high temperature reverse bias of test MOS pipe and the technical matters of high temp. grate biasing characteristic simultaneously.
In order to address the above problem, the embodiment of the present application provides the test circuit of a kind of test MOS pipe high temperature reverse bias and high temp. grate biasing characteristic, this test circuit is for carrying out the test of high temperature reverse bias and high temp. grate biasing characteristic to the metal-oxide-semiconductor that includes grid, source electrode and drain electrode, and described test circuit comprises:
The first single-pole single-throw switch (SPST), described the first single-pole single-throw switch (SPST) has the first contact and the second contact, and described the first contact is connected with described grid, and described the second contact is connected with described source electrode;
The second single-pole single-throw switch (SPST), described the second single-pole single-throw switch (SPST) has the 3rd contact and the 4th contact, and described the 3rd contact is connected with described drain electrode, and described the 4th contact is connected with described source electrode;
Single-pole double-throw switch (SPDT), described single-pole double-throw switch (SPDT) has the 5th contact, the 6th contact and the 7th contact, described the 5th contact is connected with a supply unit, and described the 6th contact is connected with described drain electrode, and described the 7th contact is connected with described grid;
Wherein, when described the first contact is communicated with and makes described grid and described source electrode in short-circuit condition with described the second contact, and in the time that being communicated with described the 6th contact, described the 5th contact by the voltage of described supply unit is added between described drain electrode and described source electrode, tests the high temperature reverse bias characteristic of described metal-oxide-semiconductor;
When described the 3rd contact is communicated with and makes described drain electrode and described source electrode in short-circuit condition with described the 4th contact, and in the time that described the 5th contact is communicated with described the 7th contact by the voltage of described supply unit being added between described grid and described source electrode, for testing the high temp. grate biasing characteristic of described metal-oxide-semiconductor.
Preferably; described test circuit also comprises a protective resistance; be connected between described the 5th contact and described supply unit; for when due between described drain electrode and described source electrode in described short-circuit condition; or between described grid and described source electrode in short-circuit condition and generation current value while being greater than the large electric current of a preset value is protected described test circuit.
Preferably, described test circuit also has safety apparatus, is connected between described protective resistance and described supply unit, for being greater than after the large electric current of described preset value when described metal-oxide-semiconductor inefficacy generation current value, protects described test circuit.
Preferably, described safety apparatus are specially a fuse, produce after described large electric current when described metal-oxide-semiconductor loses efficacy, and by by described blowout, cut off described supply unit and described protective resistance Jian Lian road, to protect described test circuit.
Preferably, described supply unit is specially the supply unit being arranged in described test circuit, or is one to be external in the supply unit of described test circuit.
Preferably, the described source electrode of described test circuit is connected with ground, so that described the second contact, described source electrode are connected commonly and described with described the 4th contact.
Accordingly, the embodiment of the present application also provides the method for testing of a kind of test MOS pipe high temperature reverse bias and high temp. grate biasing characteristic, equally can not be simultaneously and the high temperature reverse bias of batch testing metal-oxide-semiconductor and the technical matters of high temp. grate biasing characteristic for solving prior art, described method of testing is applied in a test circuit including grid, the metal-oxide-semiconductor of source electrode and drain electrode is tested, described test circuit comprises: the first single-pole single-throw switch (SPST), described the first single-pole single-throw switch (SPST) has the first contact and the second contact, described the first contact is connected with described grid, described the second contact is connected with described source electrode, the second single-pole single-throw switch (SPST), described the second single-pole single-throw switch (SPST) has the 3rd contact and the 4th contact, and described the 3rd contact is connected with described drain electrode, and described the 4th contact is connected with described source electrode, single-pole double-throw switch (SPDT), described single-pole double-throw switch (SPDT) has the 5th contact, the 6th contact and the 7th contact, described the 5th contact is connected with a supply unit, described the 6th contact is connected with described drain electrode, and described the 7th contact is connected with described grid, and described method of testing comprises:
By described the first contact is communicated with described the second contact, control described grid and described source electrode in short-circuit condition, and by described the 5th contact is communicated with described the 6th contact, the voltage of described supply unit is added between described drain electrode and described source electrode, to test the high temperature reverse bias characteristic of described metal-oxide-semiconductor; Or
By described the 3rd contact is communicated with described the 4th contact, control described drain electrode and described source electrode in short-circuit condition, and by described the 5th contact is communicated with described the 7th contact, the voltage of described supply unit is added between described grid and described source electrode, to test the high temp. grate biasing characteristic of described metal-oxide-semiconductor.
Preferably, described test circuit also comprises:
Protective resistance, be connected between described the 5th contact and a supply unit, for when due between described drain electrode and described source electrode in described short-circuit condition, or between described grid and described source electrode in short-circuit condition and generation current value while being greater than the large electric current of a preset value is protected described test circuit;
Safety apparatus, are connected between described protective resistance and described supply unit, for being greater than after the large electric current of described preset value when described metal-oxide-semiconductor inefficacy generation current value, protect described test circuit.
Preferably, in the time that described safety apparatus are specially fuse, described method also comprises:
The described large current delivery producing when described metal-oxide-semiconductor was lost efficacy is to described fuse;
By described large electric current by described blowout, to cut off described supply unit and described protective resistance Jian Lian road, to protect described test circuit.
Preferably, described supply unit is specially the supply unit being arranged in described test circuit, or is one to be external in the supply unit of described test circuit.
Preferably, described method also comprises: by the described source electrode of described test circuit is connected with ground, controls described the second contact, described source electrode and be connected commonly and described with described the 4th contact.
The technique scheme that the embodiment of the present application provides, at least has following technique effect or advantage:
Owing to having adopted according to the test philosophy of metal-oxide-semiconductor high temperature reverse bias and high temp. grate biasing, thereby single-pole single-throw switch (SPST) and single-pole double-throw switch (SPDT) are placed in to corresponding position makes the circuit branch needing in connected state, to realize the technological means of the transformation between different test circuits, having solved in prior art can not be simultaneously and the high temperature reverse bias of batch testing metal-oxide-semiconductor and the technical matters of high temp. grate biasing characteristic, thereby having can while and the high temperature reverse bias of batch testing metal-oxide-semiconductor and the technique effect of high temp. grate biasing characteristic.
Brief description of the drawings
Fig. 1 is that the circuit of the test circuit of test MOS pipe high temperature reverse bias characteristic in prior art connects schematic diagram;
Fig. 2 is that the circuit of the test circuit of test MOS pipe high temp. grate biasing characteristic in prior art connects schematic diagram;
Fig. 3 is that the circuit of a kind of test circuit of test MOS pipe characteristic in the embodiment of the present application connects schematic diagram;
Fig. 4 is the method for testing process flow diagram of test MOS pipe high temperature reverse bias characteristic in the embodiment of the present application;
Fig. 5 is the method for testing process flow diagram of test MOS pipe high temp. grate biasing characteristic in the embodiment of the present application.Embodiment
The embodiment of the present application is by providing the test circuit of a kind of test MOS pipe high temperature reverse bias and high temp. grate biasing characteristic, can solve in prior art the high temperature reverse bias of test MOS pipe and the technical matters of high temp. grate biasing characteristic simultaneously.
The technical scheme of the embodiment of the present application is for solving the problems of the technologies described above, and general thought is as follows:
In the test circuit of metal-oxide-semiconductor, add two single-pole single-throw (SPST) single-throw switches and a single-pole single-throw (SPST) double throw switch, single-pole single-throw (SPST) single-throw switch has two contacts, single-pole single-throw (SPST) double throw switch has three contacts, according to the principle of test high temperature reverse bias and high temp. grate biasing characteristic, to between different contacts, be communicated with, just can make the circuit branch needing in being communicated with, the state of disconnection or short circuit, then realize the conversion between the test circuit of testing high temperature reverse bias characteristic and high temp. grate biasing characteristic, again test circuit is adopted to circuit connecting mode in parallel, when just can realizing metal-oxide-semiconductor high temperature reverse bias and high temp. grate biasing characteristic and batch testing.
By adopting the technical scheme in the embodiment of the present application, test circuit can make between the different contacts of single-pole single-throw switch (SPST) and single-pole double-throw switch (SPDT), to be communicated with or to disconnect according to user's selection, thereby circuit branch can be placed in to connection, disconnection or short-circuit condition, then realize the conversion between the test circuit of test high temperature reverse bias characteristic and high temp. grate biasing characteristic, to realize the test to high temperature reverse bias characteristic and high temp. grate biasing characteristic.
In order better to understand technique scheme, below in conjunction with Figure of description and concrete embodiment, technique scheme is described in detail.
In the embodiment of the present application, there is grid G for test, source S, the circuit of the high temperature reverse bias characteristic of the POWER metal-oxide-semiconductor of drain D and the test circuit of high temp. grate biasing characteristic connects as shown in Figure 3, specifically comprises:
The first single-pole single-throw switch (SPST) 101, described the first single-pole single-throw switch (SPST) 101 has the first contact 1 and the second contact 2, and described the first contact 1 is connected with the grid G of metal-oxide-semiconductor to be measured, and described the second contact 2 is connected with the source S of described metal-oxide-semiconductor to be measured;
The second single-pole single-throw switch (SPST) 102, described the second single-pole single-throw switch (SPST) 102 has the 3rd contact 3 and the 4th contact 4, and described the 3rd contact 3 is connected with the drain D of described metal-oxide-semiconductor to be measured, and described the 4th contact 4 is connected with the source S of described metal-oxide-semiconductor to be measured;
Single-pole double-throw switch (SPDT) 103, described single-pole double-throw switch (SPDT) 103 has the 5th contact 5, the 6th contact 6 and the 7th contact 7, described the 5th contact 5 is connected with a supply unit 106, described the 6th contact 6 is connected with the drain D of described metal-oxide-semiconductor to be measured, and described the 7th contact 7 is connected with the grid G of described metal-oxide-semiconductor to be measured;
Wherein, when described the first contact 1 is communicated with and makes described grid G and described source S in short-circuit condition with described the second contact 2, and in the time that being communicated with described the 6th contact 6, described the 5th contact 5 by the voltage of described supply unit 106 is added between described drain D and described source S, tests the high temperature reverse bias characteristic of described metal-oxide-semiconductor;
When described the 3rd contact 3 is communicated with and makes described drain D and described source S in short-circuit condition with described the 4th contact 4, and in the time that described the 5th contact 5 is communicated with described the 7th contact 7 by the voltage of described supply unit 106 being added between described grid G and described source S, for testing the high temp. grate biasing characteristic of described metal-oxide-semiconductor.
In specific implementation process; in described test circuit, also there is a protective resistance 104; be connected between described the 5th contact 5 and described supply unit 106; for being used for the high temperature reverse bias characteristic of testing described metal-oxide-semiconductor to be measured when described test circuit; and by between the described drain D of described metal-oxide-semiconductor to be measured and described source S in short-circuit condition; test circuit produces while being greater than the large electric current of a preset value, protects described test circuit.Or for being used for the high temp. grate biasing characteristic of testing described metal-oxide-semiconductor to be measured when described test circuit; and by between the described grid G of described metal-oxide-semiconductor to be measured and described source S in short-circuit condition; test circuit produces while being greater than the large electric current of a preset value, protects described test circuit.
In specific implementation process; in order better to protect described test circuit; except a protective resistance 104 is set in test circuit; also need to arrange safety apparatus 105; described safety apparatus 105 are connected between described protective resistance 104 and described supply unit 106, and for losing efficacy when described metal-oxide-semiconductor to be measured, and the generation of described test circuit is greater than after the large electric current of described preset value; protect described test circuit, in order to avoid the device in described test circuit burns out.And in specific implementation process; described safety apparatus 105 are generally a fuse, produce after described large electric current when described metal-oxide-semiconductor loses efficacy, and described fuse can blow; and then cut off described supply unit 106 and described protective resistance 104Jian Lian road, to protect described test circuit.Above for the safety apparatus that are not limited to for example the embodiment of the present application 105 of safety apparatus 105, all should be in the application's protection domain with the device of fuse same function as long as playing in the test circuit of the embodiment of the present application.
In specific implementation process, described supply unit 106 can be arranged in described test circuit, become the ingredient of described test circuit, in this case, described supply unit 106 can also have one can control that supply unit 106 is powered or the switchgear of power-off, in the time that test circuit need to be tested the characteristic of described metal-oxide-semiconductor to be measured, described in described switchgear control, supply unit 106 is powered, in the time not needing the work of described test circuit, supply unit 106 power-off described in described switchgear control.Or described supply unit 106 can also be one to be external in the electric supply installation of described test circuit, supply unit 106 has now been no longer just the ingredient of test circuit, particularly, such as supply unit 106 is now a supply socket, test circuit just can also have a plug that can be inserted in described supply socket so, when the characteristic of test circuit test MOS pipe and need to power time, only the plug being connected in test circuit need be inserted in described supply socket, and in the time not needing the characteristic of test MOS pipe, only plug need be extracted from supply socket.
In specific implementation process, in the time of the high temperature reverse bias characteristic of test MOS pipe and high temp. grate biasing characteristic, generally all the described source S of described test circuit can be connected with ground, so that described the second contact, described source S and described the 4th contact are connected jointly and describedly.
The test circuit providing by the embodiment of the present application just can be tested the high temperature reverse bias characteristic of metal-oxide-semiconductor and high temp. grate biasing characteristic, and do not need to change other components and parts, only the contact of needs need be communicated with to any conversion that just can realize between high temperature reverse bias characteristic test circuit and high temp. grate biasing test circuit, and in the time that needs are tested high temperature reverse bias characteristic and the inclined to one side characteristic of high temp. grate simultaneously, or when the high temperature reverse bias characteristic of batch testing metal-oxide-semiconductor and high temp. grate biasing characteristic, only some identical test circuit devices need to be linked up according to connecting mode in parallel, the item number of the characteristic of the metal-oxide-semiconductor quantity of testing as required as for the quantity of test circuit in parallel and needs test decides.
Accordingly, based on same inventive concept, the embodiment of the present application also provides a kind of method of testing, be applied in above-mentioned test circuit the metal-oxide-semiconductor to be measured that includes grid, source electrode and drain electrode is tested, described test circuit comprises: the first single-pole single-throw switch (SPST) 101, described the first single-pole single-throw switch (SPST) 101 has the first contact 1 and the second contact 2, and described the first contact 1 is connected with described grid G, and described the second contact 2 is connected with described source S; The second single-pole single-throw switch (SPST) 102, described the second single-pole single-throw switch (SPST) 102 has the 3rd contact 3 and the 4th contact 4, and described the 3rd contact 3 is connected with described drain D, and described the 4th contact 4 is connected with described source S; Single-pole double-throw switch (SPDT) 103, described single-pole double-throw switch (SPDT) 103 has the 5th contact 5, the 6th contact 6 and the 7th contact 7, described the 5th contact 5 is connected with a supply unit 106, and described the 6th contact 6 is connected with described drain D, and described the 7th contact 7 is connected with described grid G, described method of testing should comprise high temperature reverse bias method of testing and high temp. grate biasing method of testing, wherein, high temperature reverse bias method of testing as shown in Figure 4, comprising:
401: by described the first contact 1 is communicated with described the second contact 2, control described grid G and described source S in short-circuit condition;
402: and by described the 5th contact 5 is communicated with described the 6th contact 6, the voltage of described supply unit 106 is added between described drain D and described source S, to test the high temperature reverse bias characteristic of described metal-oxide-semiconductor to be measured.
And the method for testing of high temp. grate biasing is as shown in Figure 5, comprising:
501: by described the 3rd contact 3 is communicated with described the 4th contact 4, control described drain D and described source S in short-circuit condition;
502: and by described the 5th contact 5 is communicated with described the 7th contact 7, the voltage of described supply unit 106 is added between described grid G and described source S, to test the high temp. grate biasing characteristic of described metal-oxide-semiconductor to be measured.
Dividing of the not sequential priority of step in above method of testing, as long as ensure that at test circuit before the high temperature reverse bias and high temp. grate biasing characteristic at test MOS pipe, the supply unit of this test circuit can not be powered.
In specific implementation process; in order to protect the safety of described test circuit; in the time carrying out the high temperature reverse bias of metal-oxide-semiconductor and the test of high temp. grate biasing characteristic, generally can in described test circuit, add protective device; in order to being while being greater than the large electric current of predetermined current when the electric current of the test circuit of flowing through; protect the device in described test circuit not damaged, described protective device comprises:
Protective resistance 104, be connected between described the 5th contact 5 and a supply unit 106, for when due between described drain D and described source S in described short-circuit condition, or between described grid G and described source S in short-circuit condition and generation current value while being greater than the large electric current of a preset value is protected described test circuit;
Safety apparatus 105, are connected between described protective resistance 104 and described supply unit 106, for being greater than after the large electric current of described preset value when described metal-oxide-semiconductor inefficacy generation current value, protect described test circuit.
And in specific implementation process, in the time that described safety apparatus 105 are specially a fuse, described method of testing also comprises: the described large current delivery producing when described metal-oxide-semiconductor was lost efficacy is to described fuse; By described large electric current by described blowout, to cut off described supply unit 106 and described protective resistance 104Jian Lian road, to protect described test circuit.Be not limited to above the safety apparatus 105 of the embodiment of the present application for illustrating of safety apparatus 105, all should be in the application's protection domain with the device of fuse same function as long as playing in the method for testing of the embodiment of the present application.
In specific implementation process, described supply unit 106 can be arranged in described test circuit, become the ingredient of described test circuit, in this case, described supply unit 106 can also have one can control that supply unit 106 is powered or the switchgear of power-off, in the time that test circuit need to be tested the characteristic of described metal-oxide-semiconductor to be measured, described in described switchgear control, supply unit 106 is powered, in the time not needing the work of described test circuit, supply unit 106 power-off described in described switchgear control.Or described supply unit 106 can also be one to be external in the electric supply installation of described test circuit, supply unit 106 has now been no longer just the ingredient of test circuit, particularly, such as supply unit 106 is now a supply socket, test circuit just can also have a plug that can be inserted in described supply socket so, when the characteristic of test circuit test MOS pipe and need to power time, only the plug being connected in test circuit need be inserted in described supply socket, and in the time not needing the characteristic of test MOS pipe, only plug need be extracted from supply socket.
In specific implementation process, described method of testing also comprises: by the described source S of described test circuit is connected with ground, controls described the second contact 2, described source S and be connected commonly and described with described the 4th contact 4.
The test circuit providing by the embodiment of the present application just can be tested the high temperature reverse bias characteristic of metal-oxide-semiconductor and high temp. grate biasing characteristic, and do not need to change other components and parts, only the contact of needs need be communicated with to any conversion that just can realize between high temperature reverse bias characteristic test circuit and high temp. grate biasing test circuit, and in the time that needs are tested high temperature reverse bias characteristic and the inclined to one side characteristic of high temp. grate simultaneously, or when the high temperature reverse bias characteristic of batch testing metal-oxide-semiconductor and high temp. grate biasing characteristic, only some identical test circuit devices need to be linked up according to connecting mode in parallel, the item number of the characteristic of the metal-oxide-semiconductor quantity of testing as required as for the quantity of test circuit in parallel and needs test decides.
In the embodiment of the method for the embodiment of the present application, institute does not all have sequence requirement in steps, and the device in test circuit can any order place in circuit, but will ensure to complete before access at all circuit devcies, must not power for test circuit.
By the one or more technical schemes in the embodiment of the present application, can be achieved as follows technique effect:
Owing to having adopted according to the test philosophy of metal-oxide-semiconductor high temperature reverse bias and high temp. grate biasing, thereby single-pole single-throw switch (SPST) and single-pole double-throw switch (SPDT) are placed in to corresponding position makes the circuit branch needing in connected state, to realize the technological means of the transformation between different test circuits, having solved in prior art can not be simultaneously and the high temperature reverse bias of batch testing metal-oxide-semiconductor and the technical matters of high temp. grate biasing characteristic, thereby having can while and the high temperature reverse bias of batch testing metal-oxide-semiconductor and the technique effect of high temp. grate biasing characteristic.
In this instructions, the present invention is described with reference to its specific embodiment, and still, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if these amendments of the present invention and within modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (11)
1. a test circuit, for the metal-oxide-semiconductor that includes grid, source electrode and drain electrode is tested, is characterized in that, described test circuit comprises:
The first single-pole single-throw switch (SPST), described the first single-pole single-throw switch (SPST) has the first contact and the second contact, and described the first contact is connected with described grid, and described the second contact is connected with described source electrode;
The second single-pole single-throw switch (SPST), described the second single-pole single-throw switch (SPST) has the 3rd contact and the 4th contact, and described the 3rd contact is connected with described drain electrode, and described the 4th contact is connected with described source electrode;
Single-pole double-throw switch (SPDT), described single-pole double-throw switch (SPDT) has the 5th contact, the 6th contact and the 7th contact, described the 5th contact is connected with a supply unit, and described the 6th contact is connected with described drain electrode, and described the 7th contact is connected with described grid;
Wherein, when described the first contact is communicated with and makes described grid and described source electrode in short-circuit condition with described the second contact, and in the time that being communicated with described the 6th contact, described the 5th contact by the voltage of described supply unit is added between described drain electrode and described source electrode, tests the high temperature reverse bias characteristic of described metal-oxide-semiconductor;
When described the 3rd contact is communicated with and makes described drain electrode and described source electrode in short-circuit condition with described the 4th contact, and in the time that described the 5th contact is communicated with described the 7th contact by the voltage of described supply unit being added between described grid and described source electrode, for testing the high temp. grate biasing characteristic of described metal-oxide-semiconductor.
2. test circuit as claimed in claim 1; it is characterized in that; described test circuit also comprises a protective resistance; be connected between described the 5th contact and described supply unit; for when due between described drain electrode and described source electrode in described short-circuit condition; or between described grid and described source electrode in short-circuit condition and generation current value while being greater than the large electric current of a preset value is protected described test circuit.
3. test circuit as claimed in claim 2; it is characterized in that, described test circuit also has safety apparatus, is connected between described protective resistance and described supply unit; for being greater than after the large electric current of described preset value when described metal-oxide-semiconductor inefficacy generation current value, protect described test circuit.
4. test circuit as claimed in claim 3, is characterized in that, described safety apparatus are specially a fuse; when losing efficacy, described metal-oxide-semiconductor produced after described large electric current; by by described blowout, cut off described supply unit and described protective resistance Jian Lian road, to protect described test circuit.
5. the test circuit as described in claim as arbitrary in claim 1-4, is characterized in that, described supply unit is specially the supply unit being arranged in described test circuit, or is one to be external in the supply unit of described test circuit.
6. test circuit as claimed in claim 5, is characterized in that, the described source electrode of described test circuit is connected with ground, so that described the second contact, described source electrode are connected commonly and described with described the 4th contact.
7. a method of testing, be applied in a test circuit metal-oxide-semiconductor that includes grid, source electrode and drain electrode is tested, it is characterized in that, described test circuit comprises: the first single-pole single-throw switch (SPST), described the first single-pole single-throw switch (SPST) has the first contact and the second contact, described the first contact is connected with described grid, and described the second contact is connected with described source electrode; The second single-pole single-throw switch (SPST), described the second single-pole single-throw switch (SPST) has the 3rd contact and the 4th contact, and described the 3rd contact is connected with described drain electrode, and described the 4th contact is connected with described source electrode; Single-pole double-throw switch (SPDT), described single-pole double-throw switch (SPDT) has the 5th contact, the 6th contact and the 7th contact, described the 5th contact is connected with a supply unit, and described the 6th contact is connected with described drain electrode, and described the 7th contact is connected with described grid, and described method comprises:
By described the first contact is communicated with described the second contact, control described grid and described source electrode in short-circuit condition, and by described the 5th contact is communicated with described the 6th contact, the voltage of described supply unit is added between described drain electrode and described source electrode, to test the high temperature reverse bias characteristic of described metal-oxide-semiconductor; Or
By described the 3rd contact is communicated with described the 4th contact, control described drain electrode and described source electrode in short-circuit condition, and by described the 5th contact is communicated with described the 7th contact, the voltage of described supply unit is added between described grid and described source electrode, to test the high temp. grate biasing characteristic of described metal-oxide-semiconductor.
8. method as claimed in claim 7, is characterized in that, described test circuit also comprises:
Protective resistance, be connected between described the 5th contact and a supply unit, for when due between described drain electrode and described source electrode in described short-circuit condition, or between described grid and described source electrode in short-circuit condition and generation current value while being greater than the large electric current of a preset value is protected described test circuit;
Safety apparatus, are connected between described protective resistance and described supply unit, for being greater than after the large electric current of described preset value when described metal-oxide-semiconductor inefficacy generation current value, protect described test circuit.
9. method as claimed in claim 8, is characterized in that,
In the time that described safety apparatus are specially fuse, described method also comprises:
The described large current delivery producing when described metal-oxide-semiconductor was lost efficacy is to described fuse;
By described large electric current by described blowout, to cut off described supply unit and described protective resistance Jian Lian road, to protect described test circuit.
10. the method as described in claim as arbitrary in claim 8-9, is characterized in that, described supply unit is specially the supply unit being arranged in described test circuit, or is one to be external in the supply unit of described test circuit.
11. methods as claimed in claim 10, is characterized in that, described method also comprises: by the described source electrode of described test circuit is connected with ground, controls described the second contact, described source electrode and be connected commonly and described with described the 4th contact.
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| CN105548853A (en) * | 2015-10-29 | 2016-05-04 | 温州墨熵微电子有限公司 | High temperature reverse bias and high temperature gate bias test system for power device |
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| CN110474545A (en) * | 2018-05-10 | 2019-11-19 | 西安交通大学 | The direct current output control system of friction nanometer power generator with exchange output control system |
| CN109541428A (en) * | 2018-12-18 | 2019-03-29 | 北京工业大学 | A kind of be shorted using source and drain reduces the self-oscillatory method and apparatus of HEMT thermal resistance measurement |
| CN109596964A (en) * | 2018-12-26 | 2019-04-09 | 山东阅芯电子科技有限公司 | The method and system of compatible a variety of environmental aging tests |
| CN110879343A (en) * | 2019-10-28 | 2020-03-13 | 深圳市晶导电子有限公司 | Method and system for testing high-temperature drain-source leakage current characteristics of device |
| CN110879343B (en) * | 2019-10-28 | 2021-09-24 | 深圳市晶导电子有限公司 | Method and system for testing high-temperature drain-source leakage current characteristics of device |
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| CN111638437B (en) * | 2020-06-09 | 2023-03-21 | 山东阅芯电子科技有限公司 | High-temperature grid bias test method and device capable of measuring threshold voltage |
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| CN115639454A (en) * | 2022-10-18 | 2023-01-24 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Threshold voltage monitoring circuit for SiC MOSFET high-temperature reverse bias or high-temperature grid bias test |
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