JP2010283740A - Photo mos relay drive circuit, and semiconductor test device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a photo MOS relay drive circuit capable of reducing a drive current without sacrificing turn-off time, and a semiconductor test device using the same. <P>SOLUTION: A potential difference variation means allowing the voltage both its ends to be varied, a current limiting resistor and a switch for controlling a current are arranged in a path through which a current flowing to a light emitting diode in a photo MOS relay flows, the voltage between both the ends of the potential difference variation means is reduced to increase the current flowing to the light emitting diode when the photo MOS relay is turned on, and the voltage between both the ends of the potential difference variation means is increased to decrease the current flowing to the light emitting diode when the photo MOS relay is turned on. An average drive current can be reduced. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a photoMOS relay drive circuit capable of high-speed operation and capable of reducing power consumption, and a semiconductor test apparatus using the photoMOS relay drive circuit.

  FIG. 4 shows a photo MOS relay and its drive circuit. In FIG. 4, the photo MOS relay 10 includes a MOSFET 10a and a light emitting diode 10b. The anode of the light emitting diode 10 b is connected to a positive power supply VDD, which is a constant voltage, and the cathode is connected to a common potential point via a resistor 11 and a switch 12. A control signal F is input to the switch 12. The resistor 11 is used to limit the current flowing through the light emitting diode 10b.

  In such a configuration, when the switch 12 is turned on, a current flows through the light emitting diode 10b, and the light emitting diode 10b emits light. This light is received by the MOSFET 10a, and the MOSFET 10a is turned on. When the switch 12 is turned off, no current flows through the light emitting diode 10b. For this reason, the light emitting diode 10b does not emit light, and the MOSFET 10a is turned off.

When the voltage of the positive power supply VDD is VDD, the forward voltage drop of the light emitting diode 10b is Vka, and the resistance value of the resistor 11 is R11, the current Io flowing through the light emitting diode 10b is expressed by the following equation (1).
Io = (VDD−Vka) / R11 (1)

  FIG. 5 shows the configuration of a semiconductor test apparatus that uses a photoMOS relay to test the DC characteristics of a semiconductor under test. In FIG. 5, reference numerals 20a to 20n denote power supply modules having the same configuration, and reference numerals 21a to 21n denote semiconductors to be tested which are supplied with power or DC signals from the power supply modules 20a to 20n, respectively, and whose DC characteristics are tested.

  The power supply modules 20 a to 20 n include an output amplifier 23, photo MOS relays 24 and 26, switches 25 and 27, and a buffer 28. The switch 25 is controlled by signals F1a to F1n, and the switch 27 is controlled by signals F2a to F2n.

  Hereinafter, the operation of the power supply module 20a will be described. The output of the DA converter 22a is input to the output amplifier 23 via a resistor. The output of the output amplifier 23 is applied to the semiconductor under test 21a via the photo MOS relay 24. On / off of the photo MOS relay 24 is controlled by a switch 25.

  The voltage of the semiconductor under test 21a is input to the buffer 28 via the photo MOS relay 26, and the output of the buffer 28 is fed back to the output amplifier 23 via a resistor. On / off of the photo MOS relay 26 is controlled by a switch 27.

  With such a configuration, an accurate voltage can be applied to the semiconductor under test 21a. Further, by operating the photo MOS relays 24 and 26, it is possible to supply power to the semiconductor under test 21a and to disconnect it from the power supply module 20a. Since the operations of the power supply modules 20b to 20n are the same, the description thereof is omitted.

JP 2006-060324 A

  However, the photo MOS relay drive circuit as shown in FIG. 4 has the following problems. In order to shorten the turn-on time of the photo MOS relay, it is necessary to flow as much current as possible to the internal light emitting diode. A semiconductor test apparatus tests many semiconductors at a time and uses a large number of photo MOS relays because each semiconductor device under test has a large number of pins. Therefore, there is a problem that the current (drive current) that flows through the light emitting diode in the photo MOS relay increases.

  In particular, in a power supply module that supplies operating power to the semiconductor under test, the photo MOS relay must be turned on during the test. For this reason, there was a problem that a large drive current constantly flows.

  An object of the present invention is to provide a photo MOS relay driving circuit capable of high-speed operation and reducing the driving current by reducing the driving current after the photo MOS relay is turned on, and the same. It is to realize a semiconductor test apparatus.

In order to achieve such a problem, the invention according to claim 1 of the present invention is:
By applying a constant voltage to a light emitting diode of a photo MOS relay composed of a light emitting diode and a MOSFET whose on / off is controlled by output light of the light emitting diode, and controlling the current flowing through the light emitting diode, the photo MOS In the photo MOS relay drive circuit that controls ON / OFF of the relay,
A potential difference varying means arranged in a path of a current flowing through the light emitting diode and capable of varying a potential difference between both ends thereof;
A first resistor for limiting a current flowing through the light emitting diode;
A first switch for controlling a current flowing through the light emitting diode;
Is provided. The drive current of the photo MOS relay can be reduced.

The invention according to claim 2 is the invention according to claim 1,
A photocoupler having a turn-on time slower than that of the photo MOS relay and having a light emitting diode disposed in the path of a current flowing through the light emitting diode in the photo MOS relay is provided. The potential difference between both ends of the potential difference varying means is varied. The potential difference can be automatically changed.

The invention according to claim 3 is the invention according to claim 1 or claim 2,
The potential difference varying means;
A transistor,
A second resistor whose ends are connected to the collector and base of the transistor;
A third resistor whose both ends are connected to the base and emitter of the transistor and whose resistance value can be varied;
It is composed of The configuration of the potential difference varying means can be simplified.

The invention according to claim 4 is the invention according to claim 3,
The third resistance is
A fourth and a fifth resistor connected in series;
A second switch connected to both ends of the fourth resistor and short-circuiting the fourth resistor;
It is composed of The configuration and control of the second resistor can be simplified.

The invention according to claim 5 is the invention according to claim 4,
The output of the photocoupler is used as the second switch. The potential difference can be automatically changed.

The invention described in claim 6
In a semiconductor test apparatus for applying a predetermined voltage to a semiconductor under test and testing the semiconductor under test based on the output of the semiconductor under test at that time,
A photo MOS relay for applying a voltage to the semiconductor under test and stopping the application of the voltage;
The photo MOS relay drive circuit according to any one of claims 1 to 5, which controls the photo MOS relay;
Is provided. The power consumption of the test apparatus can be reduced.

The present invention has the following effects.
According to the first, second, third, fourth, fifth and sixth aspects of the present invention, the potential difference variable means capable of varying the potential difference between both ends is arranged in the path of the current flowing through the light emitting diode in the photo MOS relay, and the photo MOS relay. The drive current of the photo MOS relay is reduced by increasing the potential difference between both ends of the potential difference varying means after the switch is turned on.

  When the photo MOS relay is turned on, a large drive current is supplied to shorten the turn-on time. After the photo MOS relay is completely turned on, the drive current can be reduced to maintain the on state. This has the effect of reducing power consumption without sacrificing turn-on time. Since the semiconductor test apparatus uses a large number of photo MOS relays, it is particularly effective.

  In addition, a photocoupler whose turn-on time is slower than that of the photo MOS relay is arranged in the path of the current flowing through the light emitting diode in the photo MOS relay, and the voltage across the potential difference variable means is increased by using the output of the photo coupler. It is possible to automatically reduce the drive current. Since there is no need to control the potential difference varying means, there is an effect that the control is simplified.

  Further, when the resistance value of the first resistor is changed, the current flowing to the light emitting diode in the photo MOS relay can be adjusted, and when the photo MOS relay is turned on by adjusting the voltage across the potential difference variable means. The current flowing through the light emitting diode and the current flowing after turning on can be adjusted.

It is the block diagram which showed one Example of this invention. It is the block diagram which showed the other Example of this invention. It is the block diagram which showed the other Example of this invention. It is a block diagram of the conventional photoMOS relay and its drive circuit. It is a block diagram of the conventional semiconductor test apparatus.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a photoMOS relay drive circuit according to the present invention. The same elements as those in FIG. 4 are denoted by the same reference numerals, and description thereof is omitted.

  In FIG. 1, reference numeral 30 denotes a potential difference varying unit, which includes resistors 31 to 33, a switch 34, and a transistor 35. The resistor 31 corresponds to a second resistor, and the resistors 32 and 33 and the switch 34 constitute a third resistor. The resistors 32 and 33 correspond to fourth and fifth resistors, respectively. Furthermore, the switches 12 and 34 correspond to first and second switches, respectively, and the resistor 11 corresponds to a first resistor.

  The resistors 31 to 33 are connected in series in this order. The side of the resistor 31 to which the resistor 32 is not connected is connected to the collector of the transistor 35. The side of the resistor 33 to which the resistor 32 is not connected is connected to the emitter of the transistor 35. The base of the transistor 35 is connected to the connection point between the resistors 31 and 32. A switch 34 is connected to both ends of the resistor 32. The on / off state of the switch 34 is controlled by a signal S.

  The connection point between the resistor 31 and the collector of the transistor 30 is one terminal of the potential difference varying means 30 and is connected to the cathode of the light emitting diode 10b. The connection point between the resistor 33 and the emitter of the transistor 35 is the other terminal of the potential difference varying means 30 and is connected to the side of the resistor 11 where the switch 12 is not connected. The potential difference varying means 30, the resistor 11, and the switch 12 constitute a photo MOS relay drive circuit. The resistor 11 is used to limit the current flowing through the light emitting diode 10b.

  Next, the operation of this embodiment will be described. Note that the voltage between both terminals of the potential difference varying means 30 is ΔV, the forward drop voltage of the light emitting diode 10a is Vka, the resistance value of the resistor 11 is R11, and the voltage of the positive power supply VDD that is a constant voltage is VDD of the same sign. .

When the photo MOS relay 10 is turned off, both the switches 12 and 34 are turned off. When the photo MOS relay 10 is turned on, the switch 12 is first turned on. When the photo MOS relay 10 is turned on, the switch 34 is turned on. The current Io flowing through the light emitting diode 10a is expressed by the following equation (2).
Io = (VDD−ΔV−Vka) / R11 (2)

When the resistance values of the resistors R31 to R33 are sufficiently larger than the resistance value of the resistor 11, the both-ends voltage ΔV of the potential difference varying means 30 is expressed by the following equation (3). The resistance values of the resistors 31 to 33 are R31 to R33, respectively, and the base-emitter voltage of the transistor 35 is VBE.
ΔV = VBE × (R31 + R32 + R33) / (R32 + R33) (3)

Assuming that R31 = R32 = R33 = R, the value of ΔV when the switch 34 is off is given by the following equation (4). Since the resistor 32 is short-circuited when the switch 34 is turned on, ΔV is expressed by the following equation (5).
ΔV = VBE × 3R / 2R = 1.5VBE (4)
ΔV = VBE × 2R / R = 2.0VBE (5)

  When the expressions (4) and (5) are substituted into the expression (2) and the forward voltage drop Vka of the light emitting diode 10b does not change when the switch 34 is turned on / off, the switch 34 is turned on. The current Io flowing through the light emitting diode 10a can be reduced by 0.5 VBE / R11.

  Until the photo MOS relay 10 is turned on, the switch 34 is turned off to allow a relatively large current to flow through the light emitting diode 10b. When the switch is turned on, the switch 34 is turned on to reduce the current flowing through the light emitting diode 10b, thereby reducing the turn-on time. It can be shortened and the average drive current can be reduced. When the photoMOS relay 10 is on for a long time, the average drive current can be greatly reduced.

  The turn-on time refers to the time from when a signal for turning on the photo MOS relay is input until the photo MOS relay is completely turned on.

  FIG. 2 shows another embodiment of the photoMOS relay drive circuit according to the present invention. In the embodiment of FIG. 1, the on / off of the switch 34 must be controlled separately from the switch 11, which has the disadvantage that the control becomes complicated. In this embodiment, the resistor 32 is automatically short-circuited to reduce the drive current. The same elements as those in the embodiment of FIG.

  In FIG. 2, reference numeral 40 denotes a potential difference varying unit, which includes resistors R <b> 31 to R <b> 32 and a transistor 35. The potential difference varying means 40 is obtained by removing the switch 34 from the potential difference varying means 30.

  A photocoupler 41 includes a light emitting diode 41b and a phototransistor 41a. As the photocoupler 41, one having a longer turn-on time than the photoMOS relay 10 is used.

  The anode of the light emitting diode 41b is connected to the cathode of the light emitting diode 10b, and the cathode is connected to the potential difference varying means 40. That is, the light emitting diode 41b is disposed in a path through which the driving current of the photo MOS relay 10 flows. The collector and emitter of the phototransistor 41 a are connected to both ends of the resistor 32. The phototransistor 41 is used instead of the switch 34.

  Next, the operation of this embodiment will be described. When the switch 12 is turned on, a current flows through the light emitting diode 10b to emit light, and the MOSFET 10a is turned on. Although light also flows through the light emitting diode 41b, the photocoupler 41 has a turn-on time longer than that of the photo MOS relay 10, so that at this stage, the phototransistor 41a is not turned on, and the potential difference between both ends of the potential difference varying means 40 is detected. ΔV is the value of the above equation (4).

  When the MOSFET 10a is completely turned on, the phototransistor 41a is turned on, and the resistor R32 is short-circuited. The potential difference ΔV between both ends of the potential difference varying means 40 is the value of the above equation (5). For this reason, the drive current Io becomes small, but the photoMOS relay 10 maintains the ON state. In this embodiment, Vka in the equation (2) is a value obtained by adding the forward drop voltages of the light emitting diodes 10b and 41b.

  FIG. 3 shows a semiconductor test apparatus using the photoMOS relay drive circuit of FIG. In practice, a large number of power supply modules are used, but only one power supply module is shown in FIG. 3 in order to avoid complexity. The same elements as those in FIG. 5 are denoted by the same reference numerals, and description thereof is omitted.

  In FIG. 3, reference numeral 50 denotes a power supply module, which applies a power supply or a DC signal to the semiconductor under test 21a. Reference numerals 51 and 52 denote circuits composed of the photo MOS relay 10 and the potential difference varying means 30, which control the supply or stop of the power supply or DC signal to the semiconductor under test 21a.

  The operation is the same as in the embodiment of FIG. First, the switches 25 and 27 are turned on, and the switch 34 is turned on by a signal S after the photoMOS relay 10 is turned on. Since the drive current at the time of steady on can be reduced, the average drive current can be reduced.

  In FIG. 3, the photo MOS relay drive circuit of FIG. 2 can be used instead of the photo MOS relay drive circuit of the embodiment of FIG. In this case, the circuits 51 and 52 are constituted by the photo MOS relay 10, the photocoupler 41 and the potential difference varying means 40. Further, the signal S becomes unnecessary. Since the operation is the same as in FIG.

  In FIG. 1, the potential difference variable means 30 is configured by the resistors 31 to 33, the switch 34, and the transistor 35, but the configuration is not limited to this. Any configuration can be used as long as the potential difference between both ends can be varied by an external signal.

  In the embodiment of FIG. 1, the potential difference varying means 30, the resistor 11, and the switch 12 are connected in this order, but the order may be different. In short, the potential difference varying means 30 may be arranged in the path through which the current flowing through the light emitting diode 10b flows. The resistor 11 only needs to have a function of limiting the current flowing through the light emitting diode 10b, and the switch 12 only needs to have a function of controlling the current flowing through the light emitting diode 10b.

  The same applies to the embodiment of FIG. Although the photocoupler 41, the potential difference varying means 30, the resistor 11, and the switch 12 are connected in this order, the order may be different. In short, the potential difference varying means 40 and the photocoupler 41 may be arranged in the path through which the current flowing through the light emitting diode 10b flows. The resistor 11 only needs to have a function of limiting the current flowing through the light emitting diode 10b, and the switch 12 only needs to have a function of controlling the current flowing through the light emitting diode 10b.

10 PhotoMOS relay 10a MOSFET
10b, 41b Light emitting diode 12, 25, 27, 34 Switch 21a Semiconductor under test 22a DA converter 23 Output amplifier 28 Buffer 30, 40 Potential difference varying means 11, 31-33 Resistance 35 Transistor 41 Photocoupler 41a Phototransistor 50 Power supply module 51 52 circuits

Claims (6)

By applying a constant voltage to a light emitting diode of a photo MOS relay composed of a light emitting diode and a MOSFET whose on / off is controlled by output light of the light emitting diode, and controlling the current flowing through the light emitting diode, the photo MOS In the photo MOS relay drive circuit that controls ON / OFF of the relay,
A potential difference varying means arranged in a path of a current flowing through the light emitting diode and capable of varying a potential difference between both ends thereof;
A first resistor for limiting a current flowing through the light emitting diode;
A first switch for controlling a current flowing through the light emitting diode;
A photo-MOS relay drive circuit comprising:   A photocoupler having a turn-on time slower than that of the photo MOS relay and having a light emitting diode disposed in the path of a current flowing through the light emitting diode in the photo MOS relay is provided. 2. The photo MOS relay drive circuit according to claim 1, wherein a potential difference between both ends of the potential difference varying means is varied. The potential difference varying means includes
A transistor,
A second resistor whose ends are connected to the collector and base of the transistor;
A third resistor whose both ends are connected to the base and emitter of the transistor and whose resistance value can be varied;
3. The photoMOS relay drive circuit according to claim 1, wherein the photo MOS relay drive circuit is configured as follows. The third resistor is
A fourth and a fifth resistor connected in series;
A second switch connected to both ends of the fourth resistor and short-circuiting the fourth resistor;
4. The photo MOS relay drive circuit according to claim 3, wherein   5. The photoMOS relay drive circuit according to claim 4, wherein an output of the photocoupler is used as the second switch. In a semiconductor test apparatus for applying a predetermined voltage to a semiconductor under test and testing the semiconductor under test based on the output of the semiconductor under test at that time,
A photo MOS relay for applying a voltage to the semiconductor under test and stopping the application of the voltage;
The photo MOS relay drive circuit according to any one of claims 1 to 5, which controls the photo MOS relay;
A semiconductor test apparatus comprising:

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