JP5502719B2 - Load device - Google Patents

Description

  The present invention relates to a load device for controlling a load current, and more particularly to a load device used in place of a diode as a load of a diode drive circuit.

  In recent years, the performance of light-emitting diodes (hereinafter referred to as “LEDs”) has been remarkably improved, and LEDs having a short emission wavelength and high luminance have been manufactured at a relatively low cost. For this reason, LEDs have come to be widely used also in the field of light sources conventionally covered by discharge lamps (backlights of liquid crystal displays, etc.).

  When inspecting a drive circuit of an LED mounted on a liquid crystal backlight or the like, it is necessary to connect a load to the output of the drive circuit in order to actually operate the drive circuit and examine its performance. Conventionally, as a load used for inspection of a switching converter or the like, an electronic load device configured so that a load impedance can be electronically adjusted using a transistor has been widely used (see Patent Documents 1 to 5).

JP 2002-090404 A JP 2002-091577 A Japanese Patent No. 3470296 Japanese Patent No. 3477619 Japanese Patent No. 4146442

  If an LED of the same type as the actual use is used as a load when inspecting the LED drive circuit, it is considered that the drive circuit can be inspected in a state close to actual operation. However, in the actual production site, it is often difficult to prepare the same type of LED as in actual use, which is not practical. Further, as shown in FIG. 23, the LED has a characteristic that a current value increases rapidly at a certain forward voltage, and the forward voltage fluctuates depending on temperature and individual differences. When an LED is used as a load, it is very difficult to obtain quantitative data because such fluctuations in characteristics cannot be accurately reproduced.

  Therefore, a method using a resistance element instead of the LED is also conceivable. However, as shown in FIG. 24, the voltage-current characteristic of the resistance element is significantly different from that of the LED. In particular, in the case of a resistance element, a current flows in proportion to the voltage from around zero volts, which affects start-up and turn-on of the drive circuit, and the drive circuit may not be able to operate depending on conditions.

  On the other hand, it is also conceivable to use a constant voltage mode of a conventional electronic load device instead of the LED. In general, in the constant voltage mode, current does not flow in a range where the input voltage does not reach the set value, and the load impedance is controlled so that the current suddenly increases and approaches the set value when it becomes higher than the set value. If the voltage in the constant voltage mode is set near the forward voltage at which the LED current begins to flow, a load close to the characteristics of the LED can be realized to some extent.

However, in the constant voltage mode of the conventional electronic load device, the operating frequency band is set to be relatively low so as not to cause problems such as oscillation and overcurrent. Cannot be used for inspection of a drive circuit or the like for PWM driving.
In the normal constant voltage mode, it is difficult to raise the load current without delay according to the voltage rise. When the rise of the load current is delayed, an overshoot voltage is generated at the load terminal. If the overvoltage protection circuit of the drive circuit is operated due to an excessive overshoot voltage, the target inspection cannot be performed, and in some cases, the performance of the circuit is deteriorated.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a load device capable of realizing a desired load condition approximate to a diode.

  A first aspect of the present invention relates to a load device that controls a load current that flows in accordance with an applied voltage. The load device includes a pair of load terminals that input the applied voltage, and a pair of load terminals. A connected capacitor; a rectifying element provided in a current path between the pair of load terminals and the capacitor; and a charging circuit that charges the capacitor so that a voltage of the capacitor becomes the first voltage; The capacitor is connected in parallel, and when the voltage of the capacitor is lower than the first voltage, the discharge current of the capacitor is zero, and when the voltage of the capacitor is higher than the first voltage, the voltage of the capacitor Has an electronic load that controls the discharge current of the capacitor so as to approach the first voltage.

  Preferably, the electronic load unit changes a discharge current of the capacitor according to a difference between the voltage of the capacitor and the first voltage.

  A second aspect of the present invention relates to a load device that controls a load current that flows in accordance with an applied voltage. The load device includes a pair of load terminals that input the applied voltage, and a pair of load terminals. A connected capacitor; a rectifying element provided in a current path between the pair of load terminals and the capacitor; and a charging circuit that charges the capacitor so that a voltage of the capacitor becomes the first voltage; A semiconductor element connected in parallel with the capacitor and capable of adjusting impedance, and when the applied voltage is lower than the first voltage, the impedance of the semiconductor element is controlled so that the load current becomes zero, When the applied voltage rises above the first voltage, the semiconductor is such that the load current increases as the difference between the applied voltage and the first voltage increases. And a control unit for controlling the impedance of the element.

  Preferably, the load device has a load resistance provided in series with a current path of the rectifying element.

  According to the present invention, a desired load condition approximate to a diode can be realized.

It is a figure which shows an example of a structure of the load apparatus which concerns on 1st Embodiment. It is a figure which shows an example of a structure of the electronic load part in the load apparatus shown in FIG. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure for demonstrating the overshoot of the load terminal voltage which arises by the delay of the rising of load current. It is a figure which shows an example of a structure of the load apparatus which concerns on 2nd Embodiment. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure which shows an example of a structure of the load apparatus which concerns on 3rd Embodiment. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure which shows the modification of the load apparatus which concerns on 3rd Embodiment. It is a figure which shows the structural example of the load apparatus which concerns on 4th Embodiment. It is a figure which shows the 1st structural example of the variable gain amplifier in the load apparatus shown in FIG. It is a figure which shows the 2nd structural example of the variable gain amplifier in the load apparatus shown in FIG. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure which shows an example of a structure of the load apparatus which concerns on 5th Embodiment. It is a figure which shows an example of a structure of the load apparatus which concerns on 6th Embodiment. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure which shows an example of a structure of the load apparatus which concerns on 7th Embodiment. It is a figure which shows an example of a structure of a function circuit. It is a figure for demonstrating the voltage-current characteristic of the load apparatus shown in FIG. It is a figure which shows the modification of the load apparatus which concerns on 7th Embodiment. It is a figure which illustrates the simulation result of a voltage and a current waveform at the time of using a bipolar transistor as a semiconductor element which controls load current. It is a figure which illustrates the simulation result of a voltage and a current waveform at the time of using MOSFET as a semiconductor element which controls load current. It is a figure for demonstrating the voltage-current characteristic of LED. It is a figure for demonstrating the difference of the voltage-current characteristic of a resistive element and LED.

<First Embodiment>
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a diagram illustrating an example of a configuration of a load device according to the first embodiment of the present invention.
The load device 1 shown in FIG. 1 has a pair of load terminals T1 and T2 connected to the output of the LED driver 5, a diode D1, a capacitor C1, an electronic load unit 2, and a charging unit 3.
The diode D1 is an example of a rectifying element in the present invention.
The capacitor C1 is an example of a capacitor in the present invention.
The charging unit 3 is an example of a charging circuit in the present invention.

  The load terminal T1 is connected to the positive output terminal of the LED driver 5, and the load terminal T2 is connected to the negative output terminal of the LED driver 5. The load terminal T2 is connected to the ground (reference potential) of the load device 1.

The capacitor C1 is connected between the load terminals T1 and T2.
The diode D1 is provided in the current path between one terminal of the capacitor C1 and the load terminal T1. The anode of the diode D1 is connected to the load terminal T1, and the cathode of the diode D1 is connected to the capacitor C1.

  The charging unit 3 charges the capacitor C1 so that the voltage Vc1 of the capacitor C1 becomes a preset voltage (set voltage Vset). The charging unit 3 charges the capacitor C1 so that the terminal on the diode D1 side of the capacitor C1 is positive and the terminal on the ground side is negative.

  The electronic load unit 2 is a load connected in parallel to the capacitor C1, and discharges the capacitor C1. When the voltage Vc1 of the capacitor C1 is lower than the set voltage Vset described above, the electronic load unit 2 sets the discharge current of the capacitor C1 to zero. On the other hand, when the voltage Vc1 of the capacitor C1 is higher than the set voltage Vset, the electronic load unit 2 changes the discharge current according to the voltage difference (Vc1−Vset). That is, the electronic load unit 2 controls the discharge current so that the voltage Vc1 of the capacitor C1 is close to the set voltage Vset.

FIG. 2 is a diagram illustrating an example of the configuration of the electronic load unit 2 in the load device illustrated in FIG. 1. The electronic load unit 2 includes an npn-type bipolar transistor Q1, an error amplification unit 10, and a voltage detection unit 20, for example, as shown in FIG.
The bipolar transistor Q1 is an example of a semiconductor element in the present invention.
The circuit including the error amplification unit 10 and the voltage detection unit 20 is an example of a control unit in the present invention.

  Bipolar transistor Q1 is connected in parallel with capacitor C1. The collector of the bipolar transistor Q1 is connected to the positive terminal (terminal on the diode D1 side) of the capacitor C1, and the emitter of the bipolar transistor Q1 is connected to the ground.

The voltage detector 20 detects the voltage Vc1 of the capacitor C1.
The voltage detector 20 is, for example, an inverting amplifier as shown in FIG. 2 and includes an operational amplifier (hereinafter referred to as “op-amp”) OP2 and resistors R21 and R22. One terminal of the resistor R21 is connected to the positive terminal of the capacitor C1, and the other terminal of the resistor R21 is connected to the negative phase input of the operational amplifier OP2. One terminal of the resistor R22 is connected to the negative phase input of the operational amplifier OP2, and the other terminal of the resistor R22 is connected to the output of the operational amplifier OP2. The positive phase input of the operational amplifier OP2 is connected to the ground. The output voltage V2 of the operational amplifier OP2 is a negative voltage that is proportional to the voltage of the capacitor C1 and whose polarity is inverted.

  The voltage V2 of the voltage detector 20 is generally expressed by the following equation.

[Equation 1]
V2 = − (R22 / R21) · Vc1 (1)

The error amplifier 10 inputs a drive signal corresponding to the difference between the voltage Vc1 of the capacitor C1 detected by the voltage detector 20 and the set voltage Vset of the capacitor C1 to the base of the bipolar transistor Q1.
For example, as illustrated in FIG. 2, the error amplifying unit 10 includes an operational amplifier OP1, resistors R11, R12, and R13, and a capacitor Cf1. The voltage V2 of the voltage detector 20 is input to one terminal of the resistor R11, and the other terminal of the resistor R11 is connected to the negative phase input of the operational amplifier OP1. The voltage V1 is input to one terminal of the resistor R12, and the other terminal of the resistor R12 is connected to the negative phase input of the operational amplifier OP1. The positive phase input of the operational amplifier OP1 is connected to the ground. A phase compensation capacitor Cf1 is connected between the negative phase input and the output of the operational amplifier OP1. The resistor R13 is connected between the output of the operational amplifier OP1 and the base of the bipolar transistor Q1.

  In the low frequency region where the impedance of the capacitor Cf1 is sufficiently large, the negative feedback control works so that the voltage difference between the negative phase input and the positive phase input of the operational amplifier OP1 is almost zero, so the following equation is generally established.

[Equation 2]
(V2 / R11) + (V1 / R12) = 0 (2)

  When the formula (1) is substituted into the formula (2) and rearranged, the voltage Vc1 of the capacitor C1 is expressed by the following formula.

[Equation 3]
Vc1 = (R11 / R12) · (R21 / R22) · V1 (3)

The value shown in this equation (3) corresponds to the set voltage Vset described above.
When the voltage Vc1 of the capacitor C1 is lower than the set voltage Vset shown in the equation (3), the output of the operational amplifier OP1 becomes a negative voltage, the bipolar transistor Q1 is turned off, and the discharge current of the capacitor C1 becomes zero. In this case, the negative feedback control of the discharge current by the electronic load unit 2 does not work.
When the voltage Vc1 of the capacitor C1 becomes higher than the set voltage Vset, a signal corresponding to the difference between the voltage Vc1 and the set voltage Vset is amplified by the high gain operational amplifier OP1 and input to the base of the bipolar transistor Q1, so that the bipolar transistor Q1 , And the discharge current increases. The discharge current is subjected to negative feedback control so that the voltage Vc1 of the capacitor C1 approaches the set voltage Vset. When the voltage Vc1 becomes equal to the set voltage Vset, the discharge current becomes zero and the decrease in the voltage Vc1 stops. When the voltage Vc1 becomes lower than the set voltage Vset, the charging unit 3 operates to charge the capacitor C1, so that the voltage Vc1 of the capacitor C1 rises toward the set voltage Vset.
In this way, the electronic load unit 2 controls the discharge current of the capacitor C1 so that the voltage Vc1 of the capacitor C1 is close to the set voltage Vset.

Here, operation | movement of the load apparatus 1 which has the structure mentioned above is demonstrated.
FIG. 3 is a diagram for explaining the voltage-current characteristics of the load device 1 shown in FIG. 1 in comparison with a diode.
As shown in FIG. 3, the load device 1 operates as a constant voltage load in which the current rapidly increases when the voltage becomes equal to or higher than the set voltage Vset. The characteristic of the load device 1 shown in FIG. 3 is almost equal to the direct current characteristic of the electronic load unit 2. On the other hand, the electronic load unit 2 reduces the high-frequency loop gain of the feedback system by the phase compensation capacitor Cf1 in order to ensure the stability of the operation in the high-frequency range. Therefore, when the output of the LED driver 5 rises steeply, the load current of the electronic load unit 2 (discharge current of the capacitor C1) rises with a delay from the rise of this output.

FIG. 4 is a diagram for explaining the overshoot of the load terminal voltage caused by the delay of the rise of the load current in the electronic load unit 2. 4A shows the load terminal voltage and load current when the electronic load unit 2 is directly connected to the LED driver 5, and FIG. 4B shows the load in the load device 1 provided with the capacitor C1 and the diode D1. Indicates terminal voltage and load current.
As described above, since the electronic load unit 2 has a slow response speed, when it is directly connected to the LED driver 5, as shown in FIG. 4A, the load is applied for a while after the output of the LED driver 5 rises. A period during which no current flows occurs. Since the LED driver normally drives the LED with a constant current, if a period during which the load current does not flow occurs, an overshoot occurs in the voltage Vd of the load terminals (T1, T2) as shown in FIG. .

  On the other hand, in the load device 1 shown in FIG. 1, a capacitor C1 and a diode D1 are provided in order to compensate for such a delay in the load current of the electronic load unit 2. When the output of the LED driver 5 rises while the capacitor C1 is charged to the set voltage Vset, the diode D1 is turned on when the voltage Vd exceeds “Vset + Vf (forward voltage of the diode D1)”, and the LED driver 5 A current flows through the capacitor C1. At this time, the voltage Vc1 of the capacitor C1 rises due to the current of the LED driver 5, but the rising speed is sufficiently slowed by appropriately setting the capacitance of the capacitor C1. Since the rising speed of the voltage Vc1 is slowed, overshoot of the load terminal voltage Vd until the load current of the electronic load unit 2 rises with a delay can be suppressed to an appropriate level.

  As described above, according to the present embodiment, by providing the electronic load unit 2 that operates as a constant voltage load, the load current can be set at a desired set voltage Vset without being affected by temperature, element characteristic variation, and the like. It is possible to realize a load characteristic that approximates that of an LED that rises. Further, the capacitor C1 charged to the set voltage Vset is connected in parallel with the electronic load unit 2, and the LED driver 5 is connected to the capacitor C1 through the diode D1, thereby causing an excessive overshoot at the load terminals T1 and T2. Generation of voltage can be prevented.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.

FIG. 5 is a diagram illustrating an example of a configuration of a load device 1A according to the second embodiment of the present invention.
A load device 1A shown in FIG. 5 has a configuration similar to that of the load device 1 shown in FIG. In the example of FIG. 5, the resistor R1 is provided in the current path between the anode of the diode D1 and the load terminal T1.

  As described above, the voltage Vc1 of the capacitor C1 is maintained near the set voltage Vset by the charging current of the charging unit 3 and the discharging current of the electronic load unit 2. Therefore, when the diode D1 is in the on state, the voltage Vr1 expressed by the following equation is applied to the resistor R1.

[Equation 4]
Vr1 = Vd− (Vset + Vf) (4)

As shown in Expression (4), a voltage Vr1 proportional to the load terminal voltage Vd is applied to the resistor R1. Therefore, as shown in FIG. 6, the load current Id that flows when the diode D1 is in the ON state exhibits a resistance load characteristic that increases in proportion to the load terminal voltage Vd.
In general, the diode current increases exponentially with respect to the voltage, so that the resistance load characteristic (FIG. 6) can more appropriately approximate the LED characteristic than the constant voltage load characteristic (FIG. 3). . That is, according to this embodiment, a load closer to the characteristics of the LED can be realized.

<Third Embodiment>
Next, a third embodiment of the present invention will be described.

FIG. 7 is a diagram illustrating an example of a configuration of a load device 1B according to the third embodiment of the present invention.
The load device 1B shown in FIG. 7 includes a pair of load terminals T1 and T2 connected to the output of the LED driver 5, an npn-type bipolar transistor Q1, a current control unit 30, and a current setting signal generation unit 40.
The bipolar transistor Q1 is an example of a semiconductor element in the present invention.
The current control unit 30 is an example of a current control unit in the present invention.
The current setting signal generation unit 40 is an example of a current setting signal generation unit in the present invention.

  The load terminal T1 is connected to the positive output terminal of the LED driver 5, and the load terminal T2 is connected to the negative output terminal of the LED driver 5. The load terminal T2 is connected to the ground (reference potential) of the load device 1.

  Bipolar transistor Q1 is connected to load terminals T1 and T2. The collector of the bipolar transistor Q1 is connected to the load terminal T1, and the emitter of the bipolar transistor Q1 is connected to the load terminal T2 (ground).

The current control unit 30 controls the impedance of the bipolar transistor Q1 so that a current corresponding to the input current setting signal V5 flows through the bipolar transistor Q1.
For example, the current control unit 30 maintains the current of the bipolar transistor Q1 at zero when the current setting signal V5 is equal to or greater than zero volts, and when the current setting signal V5 is a negative voltage, the current proportional to the voltage of the current setting signal V5 is The impedance of the bipolar transistor Q1 is controlled so as to flow through the bipolar transistor Q1.

For example, as illustrated in FIG. 7, the current control unit 30 includes an operational amplifier OP3, resistors R31, R32, and R33, and a shunt resistor Rs for current detection.
The operational amplifier OP3 is an example of a second operational amplifier circuit in the present invention.
The shunt resistor Rs is an example of a current detection unit in the present invention.
The resistor R31 is an example of a fourth resistor in the present invention.
The resistor R32 is an example of a fifth resistor in the present invention.

  The shunt resistor Rs is provided in the current path of the bipolar transistor Q1. In the example of FIG. 7, the shunt resistor Rs is provided in the current path between the emitter of the bipolar transistor Q1 and the grant. The shunt resistor Rs generates a voltage proportional to the current of the bipolar transistor Q1 as a current detection signal.

  The current setting signal V5 is input to one terminal of the resistor R31, and the other terminal of the resistor R31 is connected to the node N2 of the operational amplifier OP3. The current detection signal of the shunt resistor Rs is input to one terminal of the resistor R32, and the other terminal of the resistor R32 is connected to the node N2.

  The negative phase input of the operational amplifier OP3 is connected to the node N2, and the positive phase input is connected to the ground. The output terminal of the operational amplifier OP3 is connected to the base of the bipolar transistor Q1 through the resistor R33. The operational amplifier OP3 amplifies the voltage difference between the node N2 and the ground.

  When negative feedback control works so that the voltage difference between the negative-phase input and the positive-phase input of the operational amplifier OP3 becomes substantially zero, the following equation is generally established.

[Equation 5]
(Id · Rs) / R32 + V5 / R31 = 0
Id =-(1 / Rs). (R32 / R31) .V5 (5)

  When the current setting signal V5 becomes a positive voltage, the load current Id of the bipolar transistor Q1 becomes negative in the equation (5). However, since the reverse current does not actually flow through the bipolar transistor Q1, the load current Id is Maintained at zero. In this case, a negative voltage is output from the operational amplifier OP3, the bipolar transistor Q1 is turned off, and negative feedback control does not work. When the current setting signal V5 becomes a voltage equal to or lower than zero volts, the bipolar transistor Q1 is turned on to perform negative feedback control, and a load current Id proportional to the current setting signal V5 flows.

The current setting signal generation unit 40 generates a current setting signal V5 according to the difference between the voltage Vd of the load terminals T1 and T2 and the setting voltage Vset.
For example, the current setting signal generator 40 has a level proportional to the difference between the load terminal voltage Vd and the set voltage Vset, and when the load terminal voltage Vd is lower than the set voltage Vset, the positive voltage and the load terminal voltage Vd are The current setting signal V5 is generated so as to be a negative voltage when the voltage is higher than the setting voltage Vset.

The current setting signal generation unit 40 includes an operational amplifier OP4 and resistors R41, R42, and R43, for example, as shown in FIG.
The load voltage Vd is input to one terminal of the resistor R41, and the other terminal of the resistor R41 is connected to the reverse phase input of the operational amplifier OP4. The negative voltage V4 is input to one terminal of the resistor R43, and the other terminal of the resistor R43 is connected to the negative phase input of the operational amplifier OP4. A resistor R42 is connected between the negative phase input of the operational amplifier and its output. The positive phase input of the operational amplifier OP4 is connected to the ground. The operational amplifier OP4 amplifies the voltage difference between the positive phase input and the negative phase input.

  When the gain of the operational amplifier OP4 is sufficiently large, the current setting signal V5 output from the operational amplifier OP4 is approximately expressed by the following equation.

[Equation 6]
V5 =-(R42 / R41). {Vd + (R41 / R43) .V4} (6)

  From the equation (6), when the voltage Vd becomes equal to “− (R41 / R43) · V4”, the current setting signal V5 becomes zero. This voltage corresponds to the set voltage Vset described above. That is, the set voltage Vset is expressed by the following equation.

[Equation 7]
Vset = − (R41 / R43) · V4 (7)

  When Expression (6) is expressed by the set voltage Vset, the following expression is obtained.

[Equation 8]
V5 =-(R42 / R41). (Vd-Vset) (8)

  As can be seen from the equation (8), the current setting signal V5 is a signal obtained by amplifying the difference between the load terminal voltage Vd and the setting voltage Vset with a constant gain “− (R42 / R41)”.

Here, the operation of the load device 1B shown in FIG. 7 having the above-described configuration will be described.
First, when the load terminal voltage Vd is equal to or lower than the set voltage Vset (= − (R41 / R43) · V4), the current setting signal V5 becomes a positive voltage greater than or equal to zero from the relationship of Expression (6). . In other words, when the voltage (Vd−Vset) corresponding to the rise in which the load terminal voltage Vd exceeds the set voltage Vset becomes zero or less, the current setting signal V5 expressed by the equation (8) becomes a positive voltage that is zero or more. In this case, the output of the operational amplifier OP3 becomes a negative voltage in the current control unit 30, and the bipolar transistor Q1 is turned off, so that the load current Id becomes zero.

  On the other hand, when the load terminal voltage Vd becomes higher than the set Vset, the current setting signal V5 becomes a negative voltage from the relationship of the equation (6). That is, when the voltage (Vd−Vset) corresponding to the rise in which the load terminal voltage Vd exceeds the set voltage Vset becomes a positive voltage higher than zero, the current setting signal V5 expressed by the equation (8) is a negative voltage lower than zero. It becomes. In this case, since the output of the operational amplifier OP3 becomes a positive voltage in the current control unit 30 and the bipolar transistor Q1 becomes conductive, the negative feedback control works so that the load current Id becomes a value corresponding to the current setting signal V5. The load current Id at this time is expressed by the following equation by substituting equation (8) into equation (5).

[Equation 9]
Id = (1 / Rset) · (Vd−Vset) (9)

  In Expression (9), “Rset” is expressed by the following expression.

[Equation 10]
Rset = Rs · (R31 / R32) · (R41 / R42) (10)

  As can be seen from the equations (9) and (10), the load current Id that flows when the load terminal voltage Vd is higher than the set Vset is proportional to the difference between the load terminal voltage Vd and the set Vset, as shown in FIG. The characteristic of constant resistance load is shown.

As described above, in the load device 1B according to this embodiment, the capacitor C1 and the diode D1 provided in the previous embodiment are omitted, and the load current Id is directly controlled by the bipolar transistor Q1.
In general, an LED driver is composed of a switching circuit, and an output thereof includes a ripple voltage having a frequency (for example, several hundred kHz) due to switching. When evaluating the performance of the LED driver, it may be necessary to measure this ripple voltage. According to the present embodiment, a pure resistance load (Rset) equivalent to the constant resistance setting value is obtained over the frequency band included in the ripple voltage by widening the frequency characteristics of the operational amplifier or the like in the configuration of FIG. It is done. As a result, measurement can be performed without affecting the ripple.

Further, in the load device 1B according to the present embodiment, when the load terminal voltage Vd is lower than the set voltage Vset, the bipolar transistor Q1 is controlled to be off so that the load current Id becomes almost zero, and the load terminal voltage Vd is set. When the voltage Vset becomes higher than the voltage Vset, the impedance of the bipolar transistor Q1 is controlled so that a load current Id proportional to the difference between the load terminal voltage Vd and the set voltage Vset flows.
That is, in the load device 1B, when the load terminal voltage Vd becomes higher than the set voltage Vset, the impedance of the bipolar transistor Q1 is controlled so that the load current Id exhibits a constant resistance load characteristic as shown in FIG.
Therefore, in the load device 1B according to the present embodiment, the loop gain is lower than the electronic load unit 2 (FIGS. 2 and 3) having a constant voltage characteristic in which the load current changes sharply by a slight voltage change, and the stable direction It becomes.

Next, a modification of this embodiment will be described.
FIG. 9 is a diagram illustrating a configuration of a load device 1C according to a modification of the present embodiment.
The load device 1C shown in FIG. 9 has the same configuration as the load device 1B shown in FIG. 7, and is connected in parallel to the phase compensation capacitor Cf2 connected in parallel to the resistor R32 of the current control unit 30, and to the resistor R31. The phase compensation capacitor Cf3 is provided. By providing capacitors Cf2 and Cf3 having appropriate values, the frequency characteristics of the feedback control system can be improved.

<Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described.

FIG. 10 is a diagram illustrating an example of a configuration of a load device 1D according to the fourth embodiment.
The load device 1D shown in FIG. 10 is obtained by replacing the current setting signal generation unit 40 in the load device 1B shown in FIG. 7 with a current setting generation unit 40D described later, and other configurations are the same as those of the load device 1B shown in FIG. It is the same.

The current setting signal generation unit 40D includes an amplifier circuit (OP4, R41 to R43) having the same configuration as that of the current setting signal generation unit 40 in FIG. 7, and a variable gain amplifier 50 provided in the subsequent stage.
The amplifier circuit including the operational amplifier OP4 and the resistors R41 to R43 is an example of the first amplifier circuit in the present invention.
The variable gain amplifier 50 is an example of a second amplifier circuit in the present invention.

As described above, the amplifier circuits (OP4, R41 to R43) amplify the difference between the load terminal voltage Vd and the set voltage Vset with a constant gain, and the amplification result (V5) is sent to the variable gain amplifier 50 in the subsequent stage. Output.
The variable gain amplifier 50 amplifies the output signal (V5) of the amplifier circuit (OP4, R41 to R43) with a gain corresponding to the gain setting signal Sdat, and outputs the amplification result to the current control unit 30 as a current setting signal V5 ′. To do.

  Although the variable gain amplifier 50 can employ various types of circuits, here, as an example, two circuit systems will be described with reference to FIGS.

FIG. 11 is a diagram illustrating a first configuration example of the variable gain amplifier 50.
A variable gain amplifier 50 shown in FIG. 11 includes a resistor ladder circuit 53 having resistors RA1 to RAn and resistors RB1 to RBn + 1, switches 51-1 to 51-n, a switch control circuit 52, a resistor R51, and an operational amplifier OP51. And an inverting amplifier 54.
The resistors RA1 to RAn and RBn + 1 are examples of the first resistor in the present invention.
The resistors RB1 to RBn are examples of the second resistor in the present invention.
The resistance ladder circuit 53 is an example of a resistance ladder circuit in the present invention.
The circuit including the switches 51-1 to 51-n is an example of the switch circuit in the present invention.
The operational amplifier 51 is an example of a first operational amplifier circuit in the present invention.
The resistor R51 is an example of a third resistor in the present invention.

  The resistors RA1, RA2,... RAn, RBn + 1 are connected in series in this order. One terminal (terminal on the resistor RA1 side) of this series circuit is connected to the output (node N3) of the amplifier circuit (OP4, R41 to R43), and the other terminal (terminal on the resistor RBn + 1 side) of the series circuit is connected to the ground. Connected.

One terminal of the resistor RBj (j represents an integer from 1 to n−1) is connected to an intermediate node between the resistor RAj and the resistor RAj + 1, and the other terminal of the resistor RBj is connected via the switch circuit 51-j. Connected to node N1 or ground. One terminal of the resistor RBn is connected to an intermediate node between the resistor RAn and the resistor RBn + 1, and the other terminal of the resistor RBn is connected to the node N1 or the ground via the switch circuit 51-n.
The switch control circuit 52 switches the connections of the switches 51-1 to 51-n according to the gain setting signal Sdat.

The negative phase input of the operational amplifier OP51 is connected to the node N1, and the positive phase input is connected to the ground. A resistor R51 is connected between the negative phase input of the operational amplifier OP51 and its output.
The inverting amplifier 54 inverts the polarity of the output voltage of the operational amplifier OP51 and outputs it as the current setting signal V5 ′.

  If the gain of the operational amplifier OP51 is sufficiently high, the output voltage of the operational amplifier OP51 is adjusted so that the voltage at the node N1 is substantially equal to the ground voltage. For this reason, even if the switches 51-1 to 51-n are switched, the magnitudes of the currents shunted to the resistors RB1 to RBn do not change, and the current In3 flowing from the node N3 to the resistor ladder circuit 53 does not change. On the other hand, when the switches 51-1 to 51-n are switched, the magnitude of the current In1 flowing from the resistors RB1 to RBn to the node N1 changes while the current In3 is constant, so that the ratio of the current In3 to the current In1 changes. . According to the change in the current ratio (In1 / In3), the ratio of the output voltage (V5 ′) to the input voltage (V5), that is, the voltage gain changes.

  When the resistance values of the resistors RB1 to RBn + 1 are set to double the resistance values of the resistors RA1, RA2,... RAn, the resistors RB1 to RBn have a power of (1/2) with respect to the current In3. A heavy current flows. In this case, if the on / off of the switches 51-1 to 51-n is controlled by each bit of the binary data, a gain proportional to the value of the binary data can be obtained.

  Further, since the resistor ladder circuit 53, the resistor R51, and the operational amplifier 51 constitute an inverting amplifier, the output voltage is in reverse phase with respect to the input voltage (V5). Therefore, in the example of FIG. 11, the output voltage (V5 ′) is in phase with the input voltage (V5) by further providing an inverting amplifier 54 after the operational amplifier 51.

Next, a second configuration example of the variable gain amplifier 50 will be described with reference to FIG.
A variable gain amplifier 50 illustrated in FIG. 12 includes resistors RC1 to RCi, switches 55-1 to 55-i, a switch control circuit 56, and an operational amplifier OP52.
The circuit including the resistors RC1 to RCi and the switches 55-1 to 55-i is an example of a resistor voltage dividing circuit in the present invention.
The operational amplifier OP52 is an example of the buffer circuit in the present invention.

  The resistors RC1, RC2,... RCi are connected in series in this order. One terminal (terminal on the resistor RC1 side) of this series circuit is connected to the output (node N3) of the amplifier circuit (OP4, R41 to R43), and the other terminal (terminal on the resistor RCi side) of the series circuit is connected to the ground. Connected.

Switch 55-1 is connected between nodes N3 and N4. The switch 55-m (m represents an integer from 2 to i) is connected between the resistor RC (m−1), an intermediate node of the resistor RCm, and the node N4.
The switch control circuit 56 selectively sets any one of the switches 55-1 to 55-i to the on state in accordance with the input gain setting signal Sdat.

  The operational amplifier OP52 has a positive phase input connected to the node N4 and a negative phase input connected to the output. The operational amplifier OP52 inputs the voltage of the node N4 with high impedance, and outputs almost the same voltage as the current setting signal V5 ′.

At each node of the resistors RC1 to RCi connected in series, a voltage generated by dividing the input voltage (V5) by a different voltage dividing ratio is generated. By turning on any one of the switches 55-1 to 55-i in accordance with the control of the switch control circuit 56, a voltage divided by a desired voltage dividing ratio is input to the node N4. A voltage substantially the same as that of the node N4 is output from the operational amplifier 52 as the current setting signal V5 ′.
A variable gain amplifier can also be configured by a system using such a resistance voltage dividing circuit.

Next, the operation of the load device 1C having the above-described configuration will be described.
When the gain of the variable gain amplifier 50 is “α”, the current setting signal V5 ′ is equal to “α · V5”. This is equivalent to the case where the right side of the current setting signal V5 shown in Expression (8) is multiplied by “α”. In this case, the load current Id is expressed by the following equation.

[Equation 11]
Id = (α / Rset) · (Vd−Vset) (11)

  As can be seen from the equation (11), by changing the gain α of the variable gain amplifier 50, the slope (resistance value) of the voltage-current characteristic can be arbitrarily changed as shown in FIG. become.

  Since the set voltage Vset can be expressed as shown in Equation (7), by changing the negative voltage V4 input to the resistor R43 or the resistance value of the resistor R43, the set voltage is independent of the slope of the voltage-current characteristic. It is also possible to change Vset (FIG. 13B).

<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described.

FIG. 14 is a diagram illustrating an example of a configuration of a load device 1E according to the fifth embodiment.
A load device 1E shown in FIG. 14 is obtained by replacing the current setting signal generation unit 40 in the load device 1B shown in FIG. 7 with a current setting signal generation unit 40E described later, and the other configuration is the load device 1B shown in FIG. It is the same.

The current setting signal generation unit 40E includes diodes D41 and D42 in addition to the same configuration as the current setting signal generation unit 40 in FIG.
The diode D41 is connected between the negative phase input and the output of the operational amplifier OP4. The anode of the diode D41 is connected to the output of the operational amplifier OP4, and the cathode of the diode D41 is connected to the reverse phase input of the operational amplifier OP4.
The diode D42 is provided in the current path between the output of the operational amplifier OP4 and the resistor R42. The anode of the diode D42 is connected to the resistor R42, and the cathode of the diode D42 is connected to the output of the operational amplifier OP4.

In the current setting signal generation unit 40E shown in FIG. 14, since the diode D42 is provided in the current path between the output of the operational amplifier OP4 and the resistor R42, the current flowing in the direction discharged from the output of the operational amplifier OP4 is blocked by the diode D42. .
Accordingly, when the reverse phase input of the operational amplifier OP4 becomes a slightly negative voltage and the output of the operational amplifier OP4 becomes a positive voltage, the diode D42 is turned off. That is, the feedback path of the current flowing from the output of the operational amplifier OP4 to the negative phase input via the resistor R42 is cut off. When the feedback path is interrupted, the output of the operational amplifier OP4 rises in the positive direction and the diode D41 is turned on. When the diode D41 is turned on, the feedback path is formed again, and the reverse phase input of the operational amplifier OP4 is maintained at substantially zero volts. When the negative-phase input of the operational amplifier OP4 is zero volts and the diode D42 is in the off state, no current flows through the resistors R31 and R42, so the current setting signal V5 is zero volts.
On the other hand, when the reverse phase input of the operational amplifier OP4 becomes a slightly positive voltage and the output of the operational amplifier OP4 becomes a negative voltage, the diode D41 is turned off and the feedback path is interrupted. When the feedback path is interrupted, the output of the operational amplifier OP4 decreases in the negative direction, and the diode D42 is turned on. When the diode D42 is turned on, a feedback path for a current flowing from the output of the operational amplifier OP4 to the negative phase input via the resistor R42 is formed. By this feedback path, the current setting signal V5 becomes a negative voltage of zero volts or less.

As described above, in the load device 1E according to the present embodiment, the current setting signal V5 when the load terminal voltage Vd is lower than the set voltage Vset is the current setting when the load terminal voltage Vd and the set voltage Vset are substantially equal. The value of signal V5 is maintained (zero volts). That is, the value of the current setting signal is limited so as not to be a positive voltage of zero volts or more. Thereby, since the output of the operational amplifier OP3 of the current control unit 30 can be prevented from being saturated to the negative side, the delay time when the load current Id starts to flow can be reduced. In addition, it can also serve as a protection against the reverse breakdown voltage of the base emitter of the bipolar transistor Q1.
Furthermore, in the load device 1E according to the present embodiment, when the current setting signal V5 is zero volts, the DC offset voltage of the circuit is such that the bipolar transistor Q1 is in the middle between the on state and the off state (for example, a minute current flows). Etc. can be adjusted. Thereby, even when the load terminal voltage Vd is lower than the set voltage Vset, the negative feedback operation of the current control unit 30 is maintained, so that the delay at the time of rising of the load current Id can be further shortened.

<Sixth Embodiment>
Next, a sixth embodiment of the present invention will be described.

FIG. 15 is a diagram illustrating an example of a configuration of a load device 1F according to the sixth embodiment.
The load device 1F shown in FIG. 15 is obtained by replacing the current control unit 30 in the load device 1E shown in FIG. 14 with a current control unit 30F described later and replacing the current setting signal generation unit 40E with a current setting signal generation unit 40F described later. Other configurations are the same as those of the load device 1E shown in FIG.

The current control unit 30F controls the impedance of the bipolar transistor Q1 so that the load current Id according to the combined signal of the two current setting signals V5_1 and V5_2 generated by the current setting signal generation unit 40F flows. The current control unit 30F is obtained by replacing the resistor R31 in the current control unit 30 illustrated in FIG. 14 with two resistors R31_1 and R31_2, and other components are the same as those of the current control unit 30.
One terminal of each of the resistors R31_1 and R31_2 is connected to the node N2. The current setting signal V5_1 is input to the other terminal of the resistor R31_1, and the current setting signal V5_2 is input to the other terminal of the resistor R31_2.

  The current control unit 30F controls the load current Id according to the following equation in accordance with the two current setting signals V5_1 and V5_2.

[Equation 12]
Id = − (1 / Rs) · {β1 · V5_1 + β2 · V5_2} (12)

  “Β1” and “β2” in Expression (12) are expressed as follows.

[Equation 13]
β1 = R32 / R31_1 (13-1)
β2 = R32 / R31_2 (13-2)

  The current setting signal generation unit 40F includes two amplifier circuits AMP1_1 and AMP1_2 (first amplifier circuit) that amplify the difference between the voltage Vd of the load terminals T1 and T2 and a predetermined setting voltage.

When the load terminal voltage Vd exceeds the set voltage Vset_1, the amplifier circuit AMP1_1 uses a predetermined gain to calculate a difference between the load terminal voltage Vd and the set voltage Vset_1 (a voltage corresponding to an increase in the load terminal voltage Vd exceeding the set voltage Vset_1). Amplification is performed, and the amplification result is output as a current setting signal V5_1.
When the load terminal voltage Vd is lower than the set voltage Vset_1 (the increase voltage is zero or less), the amplifier circuit AMP1_1 has a zero difference between the load terminal voltage Vd and the set voltage Vset_1 (the increase voltage is zero). The same current setting signal V5_1 is output.

When the load terminal voltage Vd exceeds the set voltage Vset_2, the amplifier circuit AMP1_2 determines a difference between the load terminal voltage Vd and the set voltage Vset_2 (a voltage corresponding to an increase when the load terminal voltage Vd exceeds the set voltage Vset_2) with a predetermined gain. Amplification is performed, and the amplification result is output as a current setting signal V5_2.
When the load terminal voltage Vd is lower than the set voltage Vset_2 (the increase voltage is zero or less), the amplifier circuit AMP1_2 has a zero difference between the load terminal voltage Vd and the set voltage Vset_2 (the increase voltage is zero). The same current setting signal V5_2 is output.

The amplifier circuit AMP1_j (j = 1, 2) has a configuration similar to that of the current setting signal generation unit 40E (FIG. 14), for example, as shown in FIG.
That is, the amplifier circuit AMP1_j (j = 1, 2) includes an operational amplifier OP4_j corresponding to the operational amplifier OP4 in FIG. 14, resistors R41_j, R42_j, R43_j corresponding to the resistors R41, R42, and R43 in FIG. 14, and a diode in FIG. Diodes D41_j and D42_j corresponding to D41 and D42 are provided. As shown in FIG. 15, a negative voltage V4_j is input to one terminal of the resistor R43_j.

Therefore, the amplifier circuit AMP1_j (j = 1, 2) fixes the current setting signal V5_j to zero when the load terminal voltage Vd is lower than the setting voltage Vset_j, similarly to the current setting signal generator 40E (FIG. 14).
Further, when the load terminal voltage Vd is higher than the set voltage Vset_j, the amplifier circuit AMP1_j (j = 1, 2) outputs a current setting signal V5_j represented by the following equation similar to the equation (8).

[Formula 14]
V5_1 =-(R42_1 / R41_1). (Vd-Vset_1) (14-1)
V5_2 =-(R42_2 / R41_2). (Vd-Vset_2) (14-2)

  The set voltages Vset_1 and Vset_2 are expressed by the following equations similar to the equation (7).

[Equation 15]
Vset_1 =-(R41_1 / R43_1) .V4_1 (15-1)
Vset_2 = − (R41_2 / R43_2) · V4_2 (15-2)

The operation of the load device 1F shown in FIG. 15 having the above-described configuration will be described.
Here, the case where “Vset_1> Vd”, “Vset_2>Vd> Vset_1”, and “Vd> Vset_2” will be described assuming that the setting voltage Vset_2 is higher than the setting voltage Vset_1.

(1) When Vset_1> Vd
In this case, the current setting signals V5_1 and V5_2 are both zero. Therefore, the load current Id becomes zero from the equation (12).

(2) When Vset_2>Vd> Vset_1
In this case, the current setting signal V5_1 becomes a negative voltage expressed by the equation (14-1), and the current setting signal V5_2 becomes zero. When the equation (14-1) is substituted into the equation (12), the load current Id is expressed by the following equation.

[Equation 16]
Id = γ1 · (Vd−Vset — 1) (16)

  In the equation (16), “γ1” is expressed by the following equation.

[Equation 17]
γ1 = − (1 / Rs) · (R42_1 / R41_1) · β1 (17)

  As shown in Expression (16), the load current Id is proportional to the load terminal voltage Vd by a coefficient “γ1”. That is, the load device 1F operates as a constant resistance load having a resistance value of “1 / γ1”.

(3) When Vd> Vset_2 In this case, the current setting signal V5_1 becomes a negative voltage expressed by the equation (14-1), and the current setting signal V5_2 becomes a negative voltage expressed by the equation (14-2). Become. When Expressions (14-1) and (14-2) are substituted into Expression (12), the load current Id is expressed by the following expression.

[Equation 18]
Id = (γ1 + γ2) · Vd− (γ1 · Vset_1 + γ2 · Vset_2) (18)

  In Expression (18), “γ2” is expressed by the following expression.

[Equation 19]
γ2 = − (1 / Rs) · (R42_2 / R41_2) · β2 (19)

  As shown in Expression (19), the load current Id is proportional to the load terminal voltage Vd by a coefficient “γ1 + γ2”. That is, the load device 1F operates as a constant resistance load having a resistance value of “1 / (γ1 + γ2)”. When the load terminal voltage Vd exceeds the set voltage Vset_2, the resistance value of the load device decreases from “1 / γ1” to “1 / (γ1 + γ2)”, and the rate of change of the load current Id with respect to the load terminal voltage Vd is discontinuous. Become bigger.

  To summarize the descriptions of (1) to (3), the characteristic of the load current Id with respect to the load terminal voltage Vd is a line graph as shown in FIG.

  Thus, in the load device 1F according to the present embodiment, when the load terminal voltage Vd is lower than the set voltage Vset_1, the load current Id becomes almost zero, and when the load terminal voltage Vd becomes higher than the set voltage Vset_1, When the load current Id increases in proportion to Vd and the load terminal voltage Vd exceeds the set voltage Vset_2 higher than the set voltage Vset_1, the current setting signal V5_1 is set so that the proportional coefficient of the load current Id with respect to the load terminal voltage Vd increases. , V5_2 is generated. Therefore, according to the load device 1F according to the present embodiment, the characteristic of the load current Id with respect to the load terminal voltage Vd can be approximated by the characteristic of the exponential function in the actual diode.

  In the example shown in FIG. 15, the current setting signal generation unit 40 is provided with two amplifier circuits (AMP1_1, AMP1_2), but a similar amplifier circuit is further provided to output the output signal (current setting signal). The load current Id may be controlled by the combined signal. In this case, if the setting voltage Vset (the value of the load terminal voltage Vd when the output of the current setting signal proportional to the load terminal voltage Vd) is started in each amplifier circuit is different, the load current with respect to the load terminal voltage Vd In the Id characteristic, the number of break points can be three or more.

<Seventh Embodiment>
Next, a seventh embodiment of the present invention will be described.

FIG. 17 is a diagram illustrating an example of a configuration of a load device 1G according to the seventh embodiment.
A load device 1G shown in FIG. 17 is obtained by replacing the current setting signal generation unit 40E in the load device 1E shown in FIG. 14 with a current setting signal generation unit 40G described later, and the other configuration is the load device 1E shown in FIG. It is the same.

The current setting signal generation unit 40G includes a function circuit 70 in addition to the same configuration as the current setting signal generation unit 40E (FIG. 14).
The function circuit 70 is proportional to the exponential function value of the current setting signal V5 output from the amplifier circuit (first amplifier circuit) constituted by the operational amplifier OP4, resistors R41, R42, and R43, and diodes D41 and D42. The converted signal V5 ′ is input to the current controller 30 instead of the current setting signal V5. The function circuit 70 is configured using, for example, a log circuit or an anti-log circuit that utilizes the characteristics of the base-emitter voltage and collector current of a bipolar transistor.

FIG. 18 is a diagram illustrating an example of the configuration of the function circuit 70.
The functional circuit shown in FIG. 18 includes operational amplifiers OP71 to OP73, an inverting amplifier 71, npn bipolar transistors Q71 and Q72, resistors R71 to R78, and capacitors C71 and C72.
Bipolar transistors Q71 and Q72 are paired transistors with uniform characteristics, and their emitters are connected in common. The commonly connected emitter is connected to the output of the operational amplifier OP73 via the resistor R73. The collector of the bipolar transistor Q71 is connected to the output of the operational amplifier OP71 via the resistor R71 and to the negative phase input of the operational amplifier OP72. The base of the bipolar transistor Q71 is connected to the ground. The collector of the bipolar transistor Q72 is connected to the voltage V7 via the resistor R76 and to the negative phase input of the operational amplifier OP73. The base of the bipolar transistor Q72 is connected to the output of the operational amplifier OP72 through the resistor R74 and is connected to the ground through the resistor R75.

  The positive phase input of the operational amplifier OP71 is connected to the output of the operational amplifier OP72 via the resistor R72. The positive phase input of the operational amplifier OP72 is connected to the ground. The positive-phase input of the operational amplifier OP73 is connected to the voltage V7 via the resistor R77 and is connected to the ground via the resistor R78. Phase compensation capacitors C71 and C72 are connected between the negative phase input and output of the operational amplifiers OP72 and OP73, respectively. The inverting amplifier 71 inverts the polarity of the output voltage Vb of the operational amplifier OP71 and outputs it.

  The original voltage Vin converted into an exponential function value is input to the negative phase input of the operational amplifier OP71. The voltage Vout converted to the exponential function value is output from the inverting amplifier 71.

  In the function circuit 70 shown in FIG. 18, the voltage Va at the output of the operational amplifier OP72 is expressed by the following equation.

[Equation 20]
Va = A · (Vbe2−Vbe1) (20)

  In the above equation, “Vbe1” indicates the base-emitter voltage of the bipolar transistor Q1, and “Vbe2” indicates the base-emitter voltage of the bipolar transistor Q2. “A” indicates a constant determined by the resistance values of the resistors R74 and R75.

  The operational amplifier OP73 and the resistors R73, R76 to R78 constitute a constant current circuit that keeps the current Iq2 flowing through the bipolar transistor Q72 at a constant value. Current Iq2 is generally expressed by the following equation.

[Equation 21]
Iq2 = {(1 / R76) · (R77 / (R77 + R78)} · V7 (21)

  On the other hand, currents Iq1 and Iq2 of bipolar transistors Q1 and Q2 are generally expressed by the following equations by base-emitter voltages Vbe1 and Vbe2.

[Equation 22]
Iq1 = Is · exp {(q / kT) · Vbe1} (22-1)
Iq2 = Is · exp {(q / kT) · Vbe2} (22-2)

  In the above equation, “k” represents the Boltzmann constant, “T” represents the absolute temperature, “q” represents the charge of the electron, and “Is” represents the reverse saturation current. When formula (22-1) is divided by formula (22-2) and rearranged using formula (20), current Iq1 is expressed as the following formula.

[Equation 23]
Iq1 = Iq2 · exp {− (q / kTA) · Va} (23)

  Here, since the operational amplifier OP71 performs negative feedback control of the voltage Vb so that the output voltage Va and the voltage Vin of the operational amplifier OP72 are substantially equal, the current Iq1 is expressed by the following equation.

[Equation 24]
Iq1 = Iq2 · exp {− (q / kTA) · Vin} (24)

  Since the voltage Vout is substantially equal to the voltage generated in the resistor R71 by the current Iq1, it is expressed by the following equation.

[Equation 25]
Vout = −R71 · Iq2 · exp {− (q / kTA) · Vin} (25)

  As can be seen from Equation (25), the output voltage Vout is an exponential function value of the input voltage Vin.

FIG. 19 is a diagram illustrating characteristics of load terminal voltage Vd and load current Id in load device 1G shown in FIG.
The current setting signal V5 output from the amplifier circuit (OP4, R41 to R43, D41, D42) is zero when the load terminal voltage Vd is lower than the set voltage Vset, and the load is set when the load terminal voltage Vd is higher than the set voltage Vset. It increases in proportion to the terminal voltage Vd. The signal V5 ′ obtained by converting the current setting signal V5 into an exponential function value is fixed to a predetermined value when the load terminal voltage Vd is lower than the setting voltage Vset, and when the load terminal voltage Vd becomes higher than the setting voltage Vset, the predetermined value Varies exponentially from the value of. Accordingly, when the DC bias characteristic of the function circuit 70 is set so that the signal V5 ′ becomes a voltage near zero when the load terminal voltage Vd is lower than the set voltage Vset, as shown in FIG. 19, the load terminal voltage Vd When the voltage is lower than a certain voltage, the load current becomes almost zero, and when the load terminal voltage Vd becomes higher than a certain voltage, the load current Id changes exponentially with respect to the load terminal voltage Vd.

  As described above, in the load device 1G according to the present embodiment, the load terminal voltage Vd becomes higher than a certain voltage by using the function circuit 70 having the characteristic of the exponential function as shown in Expression (25). The load current changes exponentially with respect to the load terminal voltage Vd. In general, the current If with respect to the diode voltage Vf is expressed by the following equation.

[Equation 26]
If = Is · [exp {(q / kT) · Vf} −1] (26)

  Thus, since the current of the diode changes exponentially with respect to the voltage, the load device 1G according to the present embodiment has a voltage − that is closer to the actual LED than when approximated by a constant resistance load. Current characteristics can be obtained.

FIG. 20 is a diagram illustrating a load device 1G ′ according to a modification of the present embodiment.
The load device 1G ′ of the modification shown in FIG. 20 is obtained by replacing the current setting signal generation unit 40G in FIG. 17 with a later-described current setting signal generation unit 40G ′, and the other configuration is the load device 1G shown in FIG. It is the same.

  The current setting signal generation unit 40G ′ includes a current setting signal generation unit 40F (FIG. 15) instead of one amplifier circuit (OP4, R41 to R43, D41, D42) in the current setting signal generation unit 40G (FIG. 17). Two similar amplifier circuits AMP_1 and AMP_2 are provided. In addition, the current setting signal generation unit 40G ′ includes a combining circuit 60 that combines the two current setting signals V5_1 and V5_2 output from the amplifier circuits AMP_1 and AMP_2. The synthesizing circuit 60 is, for example, an analog signal adding circuit and includes an operational amplifier or the like. The function circuit 70 converts the signal synthesized by the synthesis circuit 60 into a signal V 5 ′ proportional to the exponential function value and inputs it to the current control unit 30.

According to the modification shown in FIG. 20, it becomes possible to curve each broken line portion having the characteristics shown in FIG. 16 exponentially. Therefore, the voltage-current characteristic approximated by an actual LED can be obtained by appropriately setting the resistance values and input voltages (V4_1, V4_2) of the amplifier circuits AMP_1 and AMP_2.
In the example of FIG. 20, the outputs of the two amplifier circuits (AMP_1, AMP_2) are combined and input to the function circuit 70, but the number of amplifier circuits may be three or more. Alternatively, a function circuit may be provided in the subsequent stage of the combining circuit, the outputs of the function circuits may be combined by the combining circuit, and the combined signal may be input as a current setting signal to the current control unit.

  As mentioned above, although several embodiment of this invention was described, this invention is not limited only to embodiment mentioned above, Various modifications are included.

  In the above-described embodiment, the bipolar transistor (Q1) is used as the semiconductor element for controlling the load current Id. However, the present invention is not limited to this, and other types of transistors (for example, MOSFETs) may be used. Good. However, since the parasitic capacitance between the collector and the emitter of the bipolar transistor is relatively small compared to other types of transistors, the bipolar transistor is desirable from the viewpoint of speeding up the operation.

FIG. 21 is a diagram illustrating a simulation result of voltage / current waveforms when a bipolar transistor is used as a semiconductor element for controlling the load current. The upper graph shows the voltage waveform of the load terminal, and the lower graph shows the waveform of the load current. In this simulation, the behavior when a pulse voltage is applied to the load terminal is analyzed. As shown in the upper graph, the LED driver may output a pulse voltage of about several tens of Hz to 1 kHz in order to dimm the LED. From the simulation result of FIG. 21, it can be seen that the load current responds quickly to the rise of the pulse voltage.
On the other hand, FIG. 22 is a diagram illustrating a simulation result of a voltage / current waveform when a MOSFET is used as a semiconductor element for controlling the load current. Compared with the case where a bipolar transistor is used, it can be seen that an unnecessary current flows due to the capacitance between the drain and source of the MOSFET when the voltage at the load terminal rises. In addition, even if the voltage at the load terminal reaches the operating voltage, it does not respond quickly, so overshoot occurs in the load current.
Therefore, it can be seen from the above simulation results that a bipolar transistor is desirable as a load current control semiconductor element.

  In the load device 1D shown in FIG. 10, the variable gain amplifier 50 is provided after the inverting amplifier circuit using the operational amplifier OP4. However, the present invention is not limited to this. For example, the gain may be changed by making the resistors R42 and R41 variable.

  In the load devices 1 and 1A shown in FIGS. 1 and 5, a semiconductor switch such as a transistor may be provided instead of the diode D1, and this may be operated as a rectifying element.

  In the load devices 1 and 1A shown in FIGS. 1 and 5, the resistor R1 may be provided on the cathode side of the diode D1, or may be provided on the line of the load terminal T2.

  A variable gain amplifier similar to the load device according to the fourth embodiment described above may be provided in the load device according to the fifth to seventh embodiments. This makes it possible to simulate LEDs having various characteristics.

  In the seventh embodiment described above, the output of the amplifier circuit (AMP_1, AMP_2) is input to the function circuit (70), but the present invention is not limited to this. In another embodiment of the present invention, a function circuit may be provided before the amplifier circuit. In this case, the load terminal voltage may be directly input to the function circuit, or a sense amplifier that amplifies the load terminal voltage with a predetermined gain may be further provided, and the output signal may be input to the function circuit.

  In the seventh embodiment described above, the amplifier circuit that amplifies the difference between the load terminal voltage Vd and the set voltage Vset is provided, but the present invention is not limited to this. In another embodiment of the present invention, such an amplifier circuit may be omitted, and a current setting signal proportional to the exponential function value of the load terminal voltage may be directly generated by a function circuit as shown in FIG. In this case, the load terminal voltage may be directly input to the function circuit, or a sense amplifier that amplifies the load terminal voltage with a predetermined gain may be further provided, and the output signal may be input to the function circuit.

  In the above-described embodiment, the current setting signal generation unit and the current control unit are mainly configured by analog circuits, but the present invention is not limited to this. That is, at least a part of these blocks can be constituted by a digital circuit.

  In the above-described embodiment, the load device of the LED driver has been exemplified. However, the present invention is not limited to this, and the load device of the present invention can be widely applied to drive circuits for various circuit elements having characteristics similar to those of a diode.

  DESCRIPTION OF SYMBOLS 1,1A-1G, 1G '... Load apparatus, 2 ... Electronic load part, 3 ... Charging part, 5 ... LED driver, 30, 30F ... Current control part, 40, 40D-40G, 40G' ... Current setting signal generation part 53. Resistance ladder circuit, 60 ... Synthesis circuit, 70 ... Function circuit, D1 ... Diode, R1 ... Resistance, Q1 ... Bipolar transistor, OP1-OP4 ... Operational amplifier, AMP1_1, AMP1_2 ... Amplifier circuit, Cf2 ... Capacitor for phase compensation

Claims (4)

A load device for controlling a load current flowing according to an applied voltage,
A pair of load terminals for inputting the applied voltage;
A capacitor connected to the pair of load terminals;
A rectifying element provided in a current path between the pair of load terminals and the capacitor;
A charging circuit for charging the capacitor so that the voltage of the capacitor becomes the first voltage;
When the capacitor is connected in parallel and the voltage of the capacitor is lower than the first voltage, the discharge current of the capacitor is zero, and when the voltage of the capacitor is higher than the first voltage, the voltage of the capacitor is An electronic load that controls the discharge current of the capacitor to approach the first voltage;
Having a load device. The electronic load unit changes a discharge current of the capacitor according to a difference between the voltage of the capacitor and the first voltage.
The load device according to claim 1. A load device for controlling a load current flowing according to an applied voltage,
A pair of load terminals for inputting the applied voltage;
A capacitor connected to the pair of load terminals;
A rectifying element provided in a current path between the pair of load terminals and the capacitor;
A charging circuit for charging the capacitor so that the voltage of the capacitor becomes the first voltage;
A semiconductor element connected in parallel with the capacitor and capable of adjusting impedance;
When the applied voltage is lower than the first voltage, the impedance of the semiconductor element is controlled so that the load current becomes zero, and when the applied voltage rises above the first voltage, the applied voltage and the A controller that controls the impedance of the semiconductor element so that the load current increases as a difference from the first voltage increases;
Having a load device. Having a load resistance provided in series with the current path of the rectifying element;
The load device according to any one of claims 1 to 3.