CN103023005B - Electrostatic protection circuit and battery protection circuit - Google Patents

Abstract

The present invention provides an electrostatic protection circuit and a battery protection circuit, wherein in the electrostatic protection circuit of an integrated circuit, the integrated circuit has a first connection terminal and a second connection terminal, and the electrostatic protection circuit includes a connection terminal connected to the first connection terminal and a second connection terminal. An electrostatic protection device at the second connection end, the electrostatic protection device includes a buried layer, a P well located above the buried layer, an N well located above the buried layer and adjacent to the P well, and a first injection region formed by implanting the upper part of the P well and the second injection region formed by implanting on the upper part of the N well, wherein the first injection region is connected to the first connection end, and the second injection region is connected to the second connection end. The invention has the advantage that it can prevent the electrostatic protection device in the battery protection circuit from being burned when the charger is connected in reverse.

Description

Electrostatic protection circuit and its battery protection circuit

【Technical field】

The invention relates to the field of circuit design, in particular to an electrostatic protection circuit and a battery protection circuit thereof.

【Background technique】

Fig. 1 shows a structural diagram of a battery protection system. As shown in FIG. 1 , the battery protection system includes a battery cell Bat, a resistor R1 , a capacitor C1 , a battery protection circuit 110 , a resistor R2 , a charging power switch 130 and a discharging power switch 120 . The resistor R1 and the capacitor C1 are connected in series between the positive pole B+ and the negative pole B- of the battery cell Bat, the charging power switch and the discharging power switch are connected in series between the negative pole B- of the battery cell and the negative pole P- of the battery, the battery cell Bat Between the positive pole B+ of the battery and the positive pole P+ of the battery.

The discharge power switch includes an NMOS (N-channel Metal Oxide Semiconductor) field effect transistor MN1 and a diode D1 parasitic in its body. The charging power switch includes an NMOS field effect transistor MN2 and a diode D2 parasitic in its body. The drain of the NMOS transistor MN1 is connected to the drain of the NMOS transistor MN2, the source of the NMOS transistor MN1 is connected to the negative pole B- of the battery cell, and the source of the NMOS transistor MN2 is connected to the negative pole P- of the battery.

The battery protection circuit 110 includes three connection terminals (or detection terminals) and two control terminals. The three connection terminals are respectively the battery cell positive terminal B+ connection terminal (or power supply terminal) VDD, and the battery cell negative terminal B -connection terminal VSS and battery negative P-connection terminal VM, the two control terminals are charge control terminal COUT and discharge control terminal DOUT respectively. The connection terminal VDD is connected between the resistor R1 and the capacitor C1, the connection terminal VSS is connected to the negative pole B- of the battery cell, the connection terminal VM is connected to the negative pole P- of the battery through the resistor R2, and the charging control terminal C _OUT is connected to the charging power switch The control terminal of 130 is connected to the gate of the NMOS transistor MN2, and the discharge control terminal D _OUT is connected to the control terminal of the discharge power switch 120, which is the gate of the NMOS transistor MN1.

The battery protection circuit 110 can perform charge protection and discharge protection for the battery cell Bat. During normal charging, the battery protection circuit 110 controls the NMOS transistor MN2 to be turned on and the NMOS transistor MN1 to be turned off, so that the charging current flows from the body diode D1 of the NMOS transistor MN1 to the NMOS transistor MN2. When abnormal charging occurs (such as charging overcurrent and charging overvoltage), the battery protection circuit 110 controls the NMOS transistor MN2 to be turned off, thereby cutting off the charging process. During normal discharge, the battery protection circuit 110 controls the NMOS transistor MN2 to be turned off, the NMOS transistor MN1 to be turned on, and the discharge current flows from the body diode D2 of the NMOS transistor MN2 to the NMOS transistor MN1 . When abnormal discharge occurs (such as discharge overcurrent and discharge overvoltage), the battery protection circuit 110 controls the NMOS transistor MN1 to be turned off, thereby cutting off the discharge process.

ESD protection is very important for integrated circuits, and a lot of research has been done in the industry. No matter in the normal use of electronic equipment, transportation and inventory, and in the production and assembly of various integrated circuit components, electrostatic discharge may occur. These electrostatic discharges, which are difficult to predict and prevent correctly, can damage integrated circuits, generate defective rates, and even lead to huge losses. In the design and manufacture of current integrated circuits, special attention will be paid to the design of electrostatic discharge protection circuits. The ESD protection circuit is usually connected between two different pins in parallel with the internal circuit. As the electrostatic charges at both ends of the ESD protection circuit continue to accumulate, the voltage at both ends will continue to increase. Once the activation discharge threshold of the ESD protection circuit is reached, the ESD protection circuit will start to discharge static electricity, thereby realizing the function of protecting the internal circuit. The activation discharge threshold mentioned here is the breakdown voltage for most existing technologies.

Generally, the battery protection circuit 110 in FIG. 1 is a chip, and an electrostatic protection circuit (ESD) needs to be provided between each connection terminal of the chip. In particular, an electrostatic protection device as shown in FIG. 2 is also provided between the power supply terminal VDD and the battery negative connection terminal VM. As shown in Figure 2, the electrostatic protection device includes an N-type buried layer DN, a P well PWELL located above the N-type buried layer DN, two N wells NWELL located above the N-type buried layer and sandwiching the P well PELL , the N-type implantation region N_implant and the P-type implantation region P_implant formed in the upper part of the P well PWELL, and the N-type implantation region N_implant formed in the upper part of the N well. N_implant is an N-type implant with a shallower depth but a higher concentration, and P_implant is a P-type implant with a shallower depth but a higher concentration.

As shown in Figure 2, both the N-type injection region and the P-type injection region on the upper part of the P well are connected to the connection terminal VM, and the N-type injection region on the upper part of the N well is connected to the power supply terminal VDD. The electrostatic protection device in Figure 2 is a triode , wherein NWELL forms the collector, the P-type implant region P_implant and the P well PWELL form the base, and the N-type implant region N_implant forms the emitter. When static electricity occurs between VDD and VM, this transistor is broken down to provide a large current path for electrostatic discharge.

However, as shown in FIG. 3, this electrostatic protection device will form a parasitic diode ESD-Diode, which is composed of a PN structure of P well PWELL and N well NWELL. Since the diode belongs to the electrostatic discharge discharge path, it is not possible to add a current-limiting resistor in the battery protection circuit to limit the current flowing through this parasitic diode. If the polarity of the charger is reversed in the battery application, the negative P- terminal of the battery will be pulled by the charger. Higher than the P+ terminal, when the VM voltage is higher than VDD, a large current will flow through the parasitic diode, causing the battery protection circuit chip to burn out, in order to prevent the battery protection circuit chip from burning out or working abnormally. In the battery protection industry, an external current-limiting resistor R2 is generally used to limit the current flowing from the VM terminal into the battery protection circuit chip when the P- potential is higher than the P+ potential.

In this way, an additional discrete device resistor is added to the application circuit, increasing system cost. Therefore, it is necessary to provide an improved technical solution to overcome the above problems.

【Content of invention】

The purpose of the present invention is to provide an electrostatic protection circuit and a battery protection circuit chip using the electrostatic protection circuit, which can prevent the electrostatic protection device in the battery protection circuit from being burned when the charger is connected in reverse.

In order to solve the above problems, according to one aspect of the present invention, the present invention provides an electrostatic protection circuit for an integrated circuit, the integrated circuit has a first connection end and a second connection end, and the electrostatic protection circuit includes a terminal and the second connection terminal, the electrostatic protection device includes a buried layer, a P well located above the buried layer, an N well located above the buried layer and adjacent to the P well, and a first injection formed on the upper part of the P well. An injection region and a second injection region implanted on the upper part of the N well, wherein the first injection region is connected to the first connection end, and the second injection region is connected to the second connection end.

Further, the buried layer is N-type, the first injection region and the second injection region are both N-type, and there are two N wells, the two N wells sandwich the P well, and the upper part of each N well is formed There is a second implantation region, and the N-type doping concentration of the N-type implantation region is higher than the N-type doping concentration of the N well.

Further, when there is static electricity between the first connection end and the second connection end, the electrostatic protection device provides an electrostatic discharge path between the first connection end and the second connection end, and the electrostatic protection device forms a first parasitic A diode and a second parasitic diode, wherein the cathode of the first parasitic diode is connected to the second connection terminal, the anode of the first parasitic diode is connected to the anode of the second parasitic diode, and the cathode of the second parasitic diode is connected to the first connection terminal.

Further, the buried layer is P-type, the first injection region and the second injection region are both P-type, there are two P wells, and the N well is sandwiched between the two P wells, and the upper part of each P well is formed There is a first implantation region, and the P-type doping concentration of the P-type implantation region is higher than the P-type doping concentration of the P well.

Further, when there is static electricity between the first connection end and the second connection end, the electrostatic protection device provides an electrostatic discharge path between the first connection end and the second connection end, and the electrostatic protection device forms a first parasitic A diode and a second parasitic diode, wherein the anode of the first parasitic diode is connected to the first connection terminal, the cathode of the first parasitic diode is connected to the cathode of the second parasitic diode, and the anode of the second parasitic diode is connected to the second connection terminal.

According to another aspect of the present invention, the present invention provides a battery protection circuit, which includes a battery negative connection terminal VM connected to the battery negative pole, a battery cell negative connection terminal VSS connected to the battery cell negative pole, a power supply terminal VDD, and The discharge control terminal connected to the control terminal of the discharge power switch and the charge control terminal connected to the control terminal of the charge power switch, which also includes any one of claims 1-5 connected between the battery negative connection terminal VM and the power supply terminal VDD. Said electrostatic protection device, wherein said battery negative connection terminal VM is a first connection terminal, and said power supply terminal VDD is a second connection terminal.

Further, the battery protection circuit also includes a control circuit and a discharge path connected in series between the battery negative connection terminal VM and the battery cell negative connection terminal VSS. The discharge path includes a switching device, a diode and a resistor R0. After the overcurrent protection state, the control circuit controls the switching device to conduct to conduct the discharge path between the battery negative terminal and the battery cell negative terminal, and the control circuit determines whether to Exit the discharge overcurrent protection state. After determining to exit the discharge overcurrent protection state, the control circuit controls the switching device to cut off so that the discharge path between the battery negative connection end and the battery cell negative connection end is cut off.

Further, the cathode of the diode is connected to one connection end of the switching device, the anode of the diode is connected to the negative connection end of the battery, and the other connection end of the switch device is connected to the negative connection end of the battery cell. connected, the discharge path provides a current of milliampere level and below.

Further, in the discharge overcurrent protection state, when the voltage at the negative terminal of the battery is lower than a predetermined voltage threshold, the control circuit determines to exit the discharge overcurrent protection state, and the control circuit determines to exit the discharge overcurrent protection state according to the negative connection terminal of the battery and the battery voltage. The voltage difference between the negative terminals of the core determines whether to enter the discharge overcurrent protection state.

Furthermore, the switching device is an NMOS field effect transistor, and the control circuit outputs a control signal to the gate of the NMOS field effect transistor.

Compared with the prior art, the electrostatic protection device in the present invention has two series diodes with opposite forward bias directions, and these two diodes respectively guarantee the normal working voltage, and the withstand voltage and voltage resistance of the battery protection circuit chip when the charger is reversed. The ability to prevent leakage, so that the resistor externally connected to the connection terminal VM in the application circuit of the battery protection circuit chip can be omitted.

【Description of drawings】

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For Those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort. in:

FIG. 1 is a schematic structural diagram of a battery protection circuit system;

Fig. 2 is the structural representation of existing electrostatic protection device;

Fig. 3 is a schematic structural diagram of a parasitic diode of the electrostatic protection device in Fig. 2;

Fig. 4 is a structural schematic diagram of an electrostatic protection device in an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a parasitic diode of the electrostatic protection device in FIG. 4;

6 is a schematic structural view of an electrostatic protection device in another embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a parasitic diode of the electrostatic protection device in FIG. 6;

FIG. 8 is a structural example diagram of a discharge overcurrent self-recovery circuit in the battery protection circuit in FIG. 1 .

【Detailed ways】

In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

Reference herein to "one embodiment" or "an embodiment" refers to a particular feature, structure or characteristic that can be included in at least one implementation of the present invention. "In one embodiment" appearing in different places in this specification does not all refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments. Unless otherwise specified, the words connected, connected, and joined in this document mean that they are electrically connected directly or indirectly.

Fig. 4 is a schematic structural diagram of an electrostatic protection device in an embodiment of the present invention. As shown in the figure, the electrostatic protection device includes an N-type buried layer DN, a P-well PWELL located above the N-type buried layer DN, two N-wells NWELL located above the N-type buried layer and sandwiching the P-well PWELL, and the P-well The N-type implant region N_implant (or called the first implant region) formed by the upper part of the PWELL and the N-type implant region N_implant (or called the second implant region) formed by the upper part of the N well NWELL, wherein the N-type implant in the N well The injection region is connected to the power terminal VDD of the battery protection circuit chip in FIG. 1 , and the N-type injection region in the P well is connected to the connection terminal VM of the battery protection circuit chip in FIG. 1 . N_implant is an N-type implant with a shallower depth but a higher concentration.

It can be seen that, compared with the scheme of the electrostatic protection device in Figure 2, the P-type implant region P_implant in the P well PWELL is removed in Figure 4. This approach keeps the NPN transistor structure required by the electrostatic protection device while making the power supply terminal VDD A back-to-back series connection structure of two diodes is formed to the connection terminal VM. As shown in Figures 4 and 5, the P well PWELL to the N well NWELL form the first parasitic diode ESD_diode1 in Figure 5, and the N-type implant region N_implant in PWELL to the P well PWELL forms the second parasitic diode in Figure 5 ESD_diode2.

With reference to Figures 1 and 5, design the ESD device structure shown in Figure 4 on the electrostatic discharge path from the power supply terminal VDD to the connection terminal VM, so as to ensure the formation of static electricity between the power supply terminal VDD and the connection terminal VM. The release path can form two series diodes with opposite forward bias directions, wherein the cathode of the first parasitic diode ESD_diode1 is connected to the power supply terminal VDD, the anode of the first parasitic diode ESD_diode1 is connected to the anode of the second parasitic diode ESD_diode2, and the anode of the second parasitic diode ESD_diode2 is connected. The cathode of the second parasitic diode ESD_diode2 is connected to the connection terminal VM, and the two diodes respectively guarantee the normal working voltage, as well as the ability of the chip to withstand voltage and prevent leakage when the charger is reversed, so that the battery protection circuit shown in Figure 1 can be omitted In the application circuit of the chip, the resistance R2 connected to the connection terminal VM is external.

FIG. 6 is a schematic structural diagram of an electrostatic protection device in another embodiment of the present invention. As shown in the figure, the electrostatic protection device includes a P-type buried layer DP, an N-well NWELL located above the P-type buried layer DP, two P-wells PWELL located above the P-type buried layer and sandwiching the N-well NWELL, and the P-well The P-type implantation region P_implant (or the first implantation region) formed by the upper part of the PWELL and the P-type implantation region P_implant (or the second implantation region) formed by the upper part of the N well NWELL, wherein the P-type implantation region in the P well The injection region is connected to the connection terminal VM of the battery protection circuit chip in FIG. 1 , and the P-type injection region in the N well is connected to the power supply terminal VDD of the battery protection circuit chip in FIG. 1 . P_implant is a P-type implant with a shallower depth but a higher concentration.

As shown in Figures 6 and 7, the N well NWELL to the P well PWELL forms the first parasitic diode ESD_diode1 in Figure 7, and the P-type implant region P_implant in the NWELL to the N well NWELL forms the second parasitic diode in Figure 7 ESD_diode2.

With reference to Figures 1 and 7, design the ESD device structure shown in Figure 6 on the electrostatic discharge path from the power supply terminal VDD to the connection terminal VM, so as to ensure the formation of static electricity between the power supply terminal VDD and the connection terminal VM. The release path can form two series diodes with opposite forward bias directions, wherein the anode of the first parasitic diode ESD_diode1 is connected to the connection terminal VM, the cathode of the first parasitic diode ESD_diode1 is connected to the cathode of the second parasitic diode ESD_diode2, and the second parasitic diode ESD_diode2 is connected to the cathode. The anode of the second parasitic diode ESD_diode2 is connected to the power supply terminal VDD, and the two diodes respectively guarantee the normal working voltage, and the ability of the chip to withstand voltage and prevent leakage when the charger is reversed, so that the battery protection circuit shown in Figure 1 can be omitted In the application circuit of the chip, the resistance R2 connected to the connection terminal VM is external.

Those of ordinary skill in the art can understand that the electrostatic protection device in Figure 4 and Figure 6 can also be used in other integrated circuits or chips for electrostatic protection, which can be connected to any two pins or connection ends of the chip between.

In addition to the change of the electrostatic protection device, the battery protection circuit in the present invention has another improvement, which will be described in detail below.

Please refer to FIG. 1 , the connection relationship of each part thereof has been described in the background, and will not be repeated here. When discharging, the battery protection circuit 110 judges whether the discharge overcurrent is based on the voltage difference between the connection terminal VM (ie, the negative terminal P- of the battery) and VSS (ie, the negative terminal B- of the battery cell). At this time, the voltage at the VM terminal is higher than the voltage at the VSS terminal, and the voltage difference between the two is proportional to the discharge current. If the differential pressure exceeds the predetermined voltage threshold, it is considered that the discharge current exceeds the predetermined current threshold, and the discharge overcurrent protection function is activated, the discharge control terminal D _OUT is pulled down to the negative B-potential of the battery cell, and the discharge power switch 120 is prohibited from performing discharge. When the cause of the discharge overcurrent is eliminated, it is hoped that the battery protection circuit 110 can automatically detect and automatically recover from the discharge overcurrent state.

In the present invention, as shown in FIG. 8 , the battery protection circuit 110 includes a control circuit and a discharge path arranged between the connection terminal VM and the connection terminal VSS. Resistor R0, diode D0 and switching device MN0 between terminals VSS. The control circuit judges whether the discharge overcurrent is based on the voltage difference between the connection terminal VM (ie, the negative pole P- of the battery) and VSS (ie, the negative pole B- of the battery cell), and prohibits the discharge when the discharge overcurrent is detected. The power switch 120 discharges, so that it enters the discharge overcurrent protection state. At the same time, it also controls the switching device MN0 to conduct, so that the discharge path between the connection terminal VM and the connection terminal VSS is conducted.

During discharge overcurrent protection, the load between the positive and negative poles P+/P- of the battery will pull up the negative pole P- voltage to a potential close to the positive pole P+, so that the voltage at the VM terminal will be higher than the voltage at the VSS terminal. However, in the present invention, a path between the connection terminal VM and VSS that is turned on in the discharge overcurrent state is provided, so that in the discharge protection state, the connection terminal VSS provides a pull-down current to the connection terminal VM. When the cause of the overcurrent is eliminated, such as the short circuit is eliminated, the voltage at the connection terminal VM will be pulled down. Therefore, in the present invention, the control circuit determines whether to exit the discharge overcurrent protection state according to the voltage of the connection terminal VM. In the discharge overcurrent state, if the voltage of the connection terminal VM is lower than the predetermined voltage threshold, the control circuit decides to exit the discharge overcurrent protection state, and controls the discharge power switch 120 to resume normal discharge; otherwise, continue to maintain the discharge overcurrent protection state. After the control circuit 210 determines to exit the discharge overcurrent protection state, it controls the switch device MN0 to be turned off, so that the discharge path between the connection terminal VM and the connection terminal VSS is closed, and leakage current is prevented.

In order to reduce power consumption, in the discharge overcurrent protection state, the pull-down current flowing from the connection terminal VM to the connection terminal VSS is very small, which is a current of milliamps or below. In the present invention, the resistance R0 can be adjusted by setting the size of the resistor R0. The magnitude of the pull-down current mentioned above.

The cathode of the diode D0 is connected to a connection terminal of the switching device MN0 , the anode is connected to the connection terminal VM, and the other connection terminal of the switching device MN0 is connected to the connection terminal VSS.

In one embodiment, as shown in FIG. 2, the switching device MN0 is an NMOS field effect transistor, the gate of which is connected to the control circuit, and the control circuit outputs a control signal S1 to control the conduction of the switching device MN0 and deadline. When entering the discharge overcurrent protection state, the control switch device MN0 is turned on, and when exiting the discharge overcurrent state, the control switch device MN0 is turned off. Diode D0 is used to allow the connection terminal VM to pass current to the connection terminal VSS in one direction, prevent VSS from leaking to VM, and use the reverse withstand voltage capability of diode D0 to withstand most of the voltage drop from VM to VSS when the voltage of VM is lower than VSS . Resistor R0 can also be placed between MN0 and diode D0, and can also be placed between MN0 and VSS.

In the present invention, words such as "connected", "connected", "connected" and "connected" that indicate electrical connection, unless otherwise specified, indicate direct or indirect electrical connection.

It should be pointed out that any changes made by those skilled in the art to the specific embodiments of the present invention will not depart from the scope of the claims of the present invention. Accordingly, the scope of the claims of the present invention is not limited only to the foregoing specific embodiments.

Claims (10)

1. the electrostatic discharge protective circuit of an integrated circuit; described integrated circuit has the first link and the second link; it is characterized in that; described electrostatic discharge protective circuit comprises the electrostatic protection device being connected to the first link and the second link; this electrostatic protection device comprises buried regions, be positioned at P trap above buried regions, be positioned at N trap above buried regions and adjacent with P trap, inject the first injection region of being formed on the top of P trap and inject the second injection region formed on the top of N trap

Wherein the first injection region is connected with the first link, and the second injection region is connected with the second link,

This electrostatic protection device forms the first parasitic diode and the second parasitic diode,

Wherein the negative electrode of the first parasitic diode is connected with the second link, and the anode of the first parasitic diode is connected with the anode of the second parasitic diode, and the negative electrode of the second parasitic diode is connected with the first link; Or the anode of the first parasitic diode is connected with the first link, the negative electrode of the first parasitic diode is connected with the negative electrode of the second parasitic diode, and the anode of the second parasitic diode is connected with the second link.

2. electrostatic discharge protective circuit according to claim 1; it is characterized in that; buried regions is N-type; first injection region and the second injection region are N-type; described N trap is two; P trap is clipped in the middle by two N traps, and the top of each N trap is formed with the second injection region, and the N-type doping content of N-type injection region is high compared with the N-type doping content of N trap.

3. electrostatic discharge protective circuit according to claim 2, is characterized in that, when having electrostatic between the first link and the second link, described electrostatic protection device provides the path of the electrostatic leakage between the first link and the second link.

4. electrostatic discharge protective circuit according to claim 1, is characterized in that, buried regions is P type, and the first injection region and the second injection region are P type, and described P trap is two, and N trap is clipped in the middle by two P traps,

The top of each P trap is formed with the first injection region, and the P type doping content of P type injection region is high compared with the P type doping content of P trap.

5. electrostatic discharge protective circuit according to claim 4, is characterized in that, when having electrostatic between the first link and the second link, described electrostatic protection device provides the path of the electrostatic leakage between the first link and the second link.

6. a battery protecting circuit; it charging control end comprising the battery cathode link VM be connected with battery cathode, battery battery core negative pole link VSS, the power end VDD be connected with battery battery core negative pole, the control of discharge end be connected with the control end of discharge power switch and be connected with the control end of charge power switch

It is characterized in that, it also comprises the electrostatic protection device as described in be connected between battery cathode link VM and power end VDD as arbitrary in claim 1-5, and wherein said battery cathode link VM is the first link, and described power end VDD is the second link.

7. battery protecting circuit according to claim 6; it is characterized in that; it also comprises control circuit and is connected on the discharge path between battery cathode link VM and battery battery core negative pole link VSS, this discharge path comprises switching device, diode and resistance R0

After entering electric discharge overcurrent protection state, described control circuit controls described switch device conductive to make the discharge path conducting between battery cathode link and battery battery core negative pole link,

Described control circuit determines whether to exit electric discharge overcurrent protection state according to the voltage of battery cathode link; after determining to exit electric discharge overcurrent protection state, described control circuit controls the cut-off of described switching device to make the discharge path between battery cathode link and battery battery core negative pole link end.

8. battery protecting circuit according to claim 7; it is characterized in that; the negative electrode of described diode connects a link of described switching device; the anode of described diode is connected with described battery cathode link; another link of described switching device is connected with described battery battery core negative pole link, and described discharge path provides milliampere rank and following electric current.

9. battery protecting circuit according to claim 7; it is characterized in that; under electric discharge overcurrent protection state; when the voltage of described battery cathode link is lower than predetermined voltage threshold; described control circuit is determined to exit electric discharge overcurrent protection state, and described control circuit determines whether to enter electric discharge overcurrent protection state according to the pressure reduction between battery cathode link and battery battery core negative pole link.

10. battery protecting circuit according to claim 7, is characterized in that, described switching device is nmos fet, and described control circuit outputs control signals to the grid of described nmos fet.