JP5286809B2 - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit Download PDF

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JP5286809B2
JP5286809B2 JP2008025286A JP2008025286A JP5286809B2 JP 5286809 B2 JP5286809 B2 JP 5286809B2 JP 2008025286 A JP2008025286 A JP 2008025286A JP 2008025286 A JP2008025286 A JP 2008025286A JP 5286809 B2 JP5286809 B2 JP 5286809B2
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resistor
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秀憲 田中
浩平 柴田
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Mitsumi Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/647—Resistive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62—Protection against overvoltage, e.g. fuses, shunts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/46—Accumulators structurally combined with charging apparatus
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • General Chemical & Material Sciences (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Secondary Cells (AREA)
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Description

本発明は、半導体集積回路に関し、半導体チップが単体でパッケージに収納されるか、又は、半導体チップが周辺に接続される電子部品と共に基板に実装され絶縁材でモールドされる半導体集積回路に関する。   The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit in which a semiconductor chip is housed in a single package or mounted on a substrate together with electronic components connected to the periphery and molded with an insulating material.

近年、二次電池としてリチウムイオン電池がデジタルカメラなど携帯機器に搭載されている。リチウムイオン電池は過充電及び過放電に弱いため、過充電及び過放電の保護回路を備えた電池パックの形態で使用される。   In recent years, lithium ion batteries as secondary batteries have been mounted on portable devices such as digital cameras. Lithium ion batteries are vulnerable to overcharge and overdischarge, and are therefore used in the form of a battery pack having an overcharge and overdischarge protection circuit.

図４に、従来の保護回路を用いた電池パックの一例の回路構成図を示す。同図中、リチウムイオン電池１０の正極、負極それぞれは電池パックの外部端子Ｂ＋，Ｂ−に接続されている。端子Ｂ＋，Ｂ−間には抵抗Ｒ１とコンデンサＣ１の直列回路が接続されている。端子Ｂ＋は電池パックの外部端子Ｐ＋に接続され、端子Ｂ−は、電流遮断用のｎチャネルＭＯＳ（金属酸化膜半導体）ＦＥＴ（電界効果トランジスタ）であるトランジスタＭ１，Ｍ２を介して電池パックの外部端子Ｐ−に接続されている。   FIG. 4 shows a circuit configuration diagram of an example of a battery pack using a conventional protection circuit. In the figure, the positive electrode and the negative electrode of the lithium ion battery 10 are connected to external terminals B + and B− of the battery pack. A series circuit of a resistor R1 and a capacitor C1 is connected between the terminals B + and B−. The terminal B + is connected to the external terminal P + of the battery pack, and the terminal B− is connected to the outside of the battery pack via transistors M1 and M2 which are n-channel MOS (metal oxide semiconductor) FETs (field effect transistors) for current interruption. Connected to terminal P-.

また、端子Ｐ−，Ｐ−間にはコンデンサＣ２が接続され、端子Ｂ−，Ｐ−間にはコンデンサＣ３が接続されている。端子Ｐ＋，Ｐ−間には負荷又は充電器が接続される。   A capacitor C2 is connected between the terminals P- and P-, and a capacitor C3 is connected between the terminals B- and P-. A load or a charger is connected between the terminals P + and P−.

トランジスタＭ１，Ｍ２はドレインを共通接続され、トランジスタＭ１のソースは端子Ｂ−を介してリチウムイオン電池１０の負極に接続され、トランジスタＭ２のソースは端子Ｐ−に接続されている。トランジスタＭ１，Ｍ２それぞれのゲートは保護回路１１の端子１１ｄ，１１ｅに接続されている。   The transistors M1 and M2 have drains connected in common, the source of the transistor M1 is connected to the negative electrode of the lithium ion battery 10 via the terminal B-, and the source of the transistor M2 is connected to the terminal P-. The gates of the transistors M1 and M2 are connected to the terminals 11d and 11e of the protection circuit 11, respectively.

保護回路１１は、単体でパッケージに収納された半導体集積回路であり、過充電検出回路、過放電検出回路、過電流検出回路を内蔵している。また、保護回路１１はリチウムイオン電池１０の正極から抵抗Ｒ１を通して端子１１ａに電源ＶＤＤを供給されると共に、リチウムイオン電池１０の負極から端子１１ｂに電源ＶＳＳを供給されて動作し、過電流検出用の端子１１ｃは抵抗Ｒ２を介して端子Ｐ−に接続されている。   The protection circuit 11 is a semiconductor integrated circuit housed in a package as a single unit, and includes an overcharge detection circuit, an overdischarge detection circuit, and an overcurrent detection circuit. In addition, the protection circuit 11 operates by being supplied with the power VDD from the positive electrode of the lithium ion battery 10 through the resistor R1 to the terminal 11a and also supplied with the power VSS from the negative electrode of the lithium ion battery 10 to the terminal 11b. The terminal 11c is connected to the terminal P- through a resistor R2.

なお、抵抗Ｒ２は端子Ｐ＋，Ｐ−間に、充電器が極性を逆にして誤接続された場合、又は、保護回路１１の定格電圧を超える電圧の充電器が接続された場合の電流制限を行うために設けられている。   The resistor R2 limits the current when the charger is incorrectly connected between the terminals P + and P−, or when a charger having a voltage exceeding the rated voltage of the protection circuit 11 is connected. Provided to do.

保護回路１１は、通常の充電時又は放電時に端子１１ｄ，１１ｅを共にハイレベルとしてトランジスタＭ１，Ｍ２を導通する。また、過放電検出回路或いは過電流検出回路で過放電或いは過電流を検出したとき端子１１ｄの出力をローレベルとしてトランジスタＭ１を遮断し、過充電検出回路で過充電を検出したとき１１ｅの出力をローレベルとしてトランジスタＭ２を遮断する。   The protection circuit 11 conducts the transistors M1 and M2 by setting both the terminals 11d and 11e to a high level during normal charging or discharging. Further, when overdischarge or overcurrent is detected by the overdischarge detection circuit or overcurrent detection circuit, the output of the terminal 11d is set to low level to shut off the transistor M1, and when overcharge is detected by the overcharge detection circuit, the output of 11e is output. The transistor M2 is shut off as a low level.

なお、特許文献１には、充放電時の電流経路を遮断するスイッチング素子に熱結合されたＰＴＣサーミスタを持つ電池パックが記載されている。
特開２００６−３２０１５号公報 Patent Document 1 describes a battery pack having a PTC thermistor that is thermally coupled to a switching element that cuts off a current path during charging and discharging.
Japanese Patent Laid-Open No. 2006-32015

このように、従来の保護回路１１は、抵抗Ｒ２を外付けにしているため、電子部品の点数が多くなり、装置全体の製造コストが高くなり、また、実装面積が大きくなるという問題があった。   As described above, since the conventional protection circuit 11 has the resistor R2 externally provided, there are problems that the number of electronic components increases, the manufacturing cost of the entire apparatus increases, and the mounting area increases. .

本発明は、上記の点に鑑みなされたもので、電子部品の点数を減少することができ、装置全体の製造コスト及び実装面積を低減できる半導体集積回路を提供することを目的とする。   The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor integrated circuit that can reduce the number of electronic components and can reduce the manufacturing cost and mounting area of the entire device.

本発明の一実施態様では、半導体チップが単体でパッケージに収納されるパッケージ型か、又は、半導体チップが周辺に接続される電子部品と共に基板に実装され絶縁材でモールドされるチップオンボード型の半導体集積回路であって、
前記半導体チップの外部端子に一端を接続され他端に静電保護用のダイオード（Ｄ１）が接続されて前記半導体チップ内に設けられた電流制限用の抵抗（Ｒ１０）と、
前記電流制限用の抵抗（Ｒ１０）の両端間に並列に接続されて前記半導体チップ内に設けられたヒューズ（ＦＳ）とを有し、
当該半導体集積回路が前記パッケージ型か前記チップオンボード型かに応じて前記ヒューズの切断の有無が決定される。 In one embodiment of the present invention, a package type in which a semiconductor chip is housed in a single package, or a chip-on-board type in which a semiconductor chip is mounted on a substrate together with electronic components connected to the periphery and molded with an insulating material . a semiconductor integrated circuit,
A current limiting resistor (R10) provided in the semiconductor chip with one end connected to the external terminal of the semiconductor chip and the other end connected with a diode (D1) for electrostatic protection;
Have a both ends fuse provided in the semiconductor chip are connected in parallel between the resistor (R10) for the current limiting (FS),
Whether or not the fuse is cut is determined depending on whether the semiconductor integrated circuit is the package type or the chip-on-board type .

好ましくは、前記半導体チップが単体でパッケージに収納されるパッケージ型の場合、前記ヒューズ（ＦＳ）は切断せず、前記外部端子に電流制限用の外付け抵抗（Ｒ２）を接続する。 Preferably, in the case of a package type in which the semiconductor chip is housed in a single package, the fuse (FS) is not cut and a current limiting external resistor (R2) is connected to the external terminal.

好ましくは、前記半導体チップが周辺に接続される電子部品と共に基板に実装され絶縁材でモールドされるチップオンボード型の場合、前記ヒューズ（ＦＳ）を切断して、前記外部端子に電流制限用の外付け抵抗を接続しない。 Preferably, in the case of a chip-on-board type in which the semiconductor chip is mounted on a substrate together with electronic components connected to the periphery and molded with an insulating material, the fuse (FS) is cut and current limiting is applied to the external terminal. Do not connect an external resistor.

なお、上記括弧内の参照符号は、理解を容易にするために付したものであり、一例にすぎず、図示の態様に限定されるものではない。   Note that the reference numerals in the parentheses are given for ease of understanding, are merely examples, and are not limited to the illustrated modes.

本発明によれば、電子部品の点数を減少することができ、装置全体の製造コスト及び実装面積を低減できる。   According to the present invention, the number of electronic components can be reduced, and the manufacturing cost and mounting area of the entire apparatus can be reduced.

以下、図面に基づいて本発明の実施形態について説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<パッケージ型>
図１は、本発明の半導体集積回路を用いた電池パックの一実施形態の回路構成図を示す。同図中、図４と同一部分には同一符号を付す。 <Package type>
FIG. 1 shows a circuit configuration diagram of an embodiment of a battery pack using a semiconductor integrated circuit of the present invention. In the figure, the same parts as those in FIG.

図１において、リチウムイオン電池２０の正極、負極それぞれは電池パックの外部端子Ｂ＋，Ｂ−に接続されている。端子Ｂ＋，Ｂ−間には抵抗Ｒ１とコンデンサＣ１の直列回路が接続されている。端子Ｂ＋は電池パックの外部端子Ｐ＋に接続され、端子Ｂ−は、電流遮断用のｎチャネルＭＯＳＦＥＴであるトランジスタＭ１，Ｍ２を介して電池パックの外部端子Ｐ−に接続されている。トランジスタＭ１，Ｍ２それぞれのゲートは保護回路２１Ａの端子２１ｄ，２１ｅに接続されている。   In FIG. 1, a positive electrode and a negative electrode of a lithium ion battery 20 are connected to external terminals B + and B− of the battery pack. A series circuit of a resistor R1 and a capacitor C1 is connected between the terminals B + and B−. The terminal B + is connected to the external terminal P + of the battery pack, and the terminal B− is connected to the external terminal P− of the battery pack through transistors M1 and M2 which are n-channel MOSFETs for interrupting current. The gates of the transistors M1 and M2 are connected to the terminals 21d and 21e of the protection circuit 21A.

また、端子Ｐ−，Ｐ−間にはコンデンサＣ２が接続され、端子Ｂ−，Ｐ−間にはコンデンサＣ３が接続されている。端子Ｐ＋，Ｐ−間には負荷又は充電器が接続される。   A capacitor C2 is connected between the terminals P- and P-, and a capacitor C3 is connected between the terminals B- and P-. A load or a charger is connected between the terminals P + and P−.

トランジスタＭ１，Ｍ２はドレインを共通接続され、トランジスタＭ１のソースは端子Ｂ−を介してリチウムイオン電池２０の負極に接続され、トランジスタＭ２のソースは端子Ｐ−に接続されている。   The transistors M1 and M2 have drains connected in common, the source of the transistor M1 is connected to the negative electrode of the lithium ion battery 20 via the terminal B-, and the source of the transistor M2 is connected to the terminal P-.

保護回路２１Ａは、半導体チップ単体でパッケージに収納された半導体集積回路であり、過充電検出回路、過放電検出回路、過電流検出回路を内蔵すると共に、抵抗Ｒ１０、ヒューズＦＳ及びダイオードＤ１が設けられている。   The protection circuit 21A is a semiconductor integrated circuit housed in a package as a single semiconductor chip, and includes an overcharge detection circuit, an overdischarge detection circuit, an overcurrent detection circuit, and is provided with a resistor R10, a fuse FS, and a diode D1. ing.

保護回路２１Ａの過電流検出用の端子２１ｃには電流制限用の抵抗Ｒ１０の一端が接続され、抵抗Ｒ１０の他端が上記過電流検出回路に接続されている。また、抵抗Ｒ１０と並列にヒューズＦＳが接続され、抵抗Ｒ１０の過電流検出回路に接続された他端には静電保護用のダイオードＤ１のカソードが接続され、ダイオードＤ１のアノードは接地されている。ヒューズＦＳが切断されていないときは、抵抗Ｒ１０の両端間はヒューズＦＳにより短絡されている。   One end of a current limiting resistor R10 is connected to the overcurrent detection terminal 21c of the protection circuit 21A, and the other end of the resistor R10 is connected to the overcurrent detection circuit. In addition, a fuse FS is connected in parallel with the resistor R10, the cathode of the diode D1 for electrostatic protection is connected to the other end of the resistor R10 connected to the overcurrent detection circuit, and the anode of the diode D1 is grounded. . When the fuse FS is not cut, both ends of the resistor R10 are short-circuited by the fuse FS.

なお、従来、静電保護用のダイオードＤ１は端子２１ｃにカソードを接続されていたのであるが、電流制限用の抵抗Ｒ１０を保護回路２１Ａに内蔵したために、抵抗Ｒ１０の端子２１ｃに接続された一端とは逆に抵抗Ｒ１０の他端にカソードを接続されており、ヒューズＦＳが切断されていないときは、ダイオードＤ１のカソードはヒューズＦＳを介して端子２１ｃに接続されることになる。   Conventionally, the electrostatic protection diode D1 has a cathode connected to the terminal 21c. However, since the current limiting resistor R10 is built in the protection circuit 21A, one end connected to the terminal 21c of the resistor R10. On the other hand, when the cathode is connected to the other end of the resistor R10 and the fuse FS is not cut, the cathode of the diode D1 is connected to the terminal 21c via the fuse FS.

また、保護回路２１Ａはリチウムイオン電池２０の正極から抵抗Ｒ１を通して端子２１ａに電源ＶＤＤを供給されると共に、リチウムイオン電池２０の負極から端子２１ｂに電源ＶＳＳを供給されて動作し、過電流検出用の端子２１ｃは電流制限用の外付け抵抗Ｒ２（Ｒ２＝Ｒ１０）を介して端子Ｐ−に接続されている。   The protection circuit 21A operates by being supplied with power VDD from the positive electrode of the lithium ion battery 20 through the resistor R1 to the terminal 21a, and also supplied with power supply VSS from the negative electrode of the lithium ion battery 20 to the terminal 21b. The terminal 21c is connected to the terminal P- through an external resistor R2 (R2 = R10) for current limiting.

なお、抵抗Ｒ２は端子Ｐ＋，Ｐ−間に、充電器が極性を逆にして誤接続された場合、又は、保護回路２１Ａの定格電圧を超える電圧の充電器が接続された場合の電流制限用であり、保護回路２１Ａに内蔵された抵抗Ｒ１０がヒューズＦＳにより短絡されているために設けられている。   The resistor R2 is used for current limiting when the charger is erroneously connected between the terminals P + and P-, or when a charger having a voltage exceeding the rated voltage of the protection circuit 21A is connected. The resistor R10 built in the protection circuit 21A is provided because it is short-circuited by the fuse FS.

保護回路２１Ａは、通常の充電時又は放電時に端子２１ｄ，２１ｅを共にハイレベルとしてトランジスタＭ１，Ｍ２を導通する。また、過放電検出回路或いは過電流検出回路で過放電或いは過電流を検出したとき端子２１ｄの出力をローレベルとしてトランジスタＭ１を遮断し、過充電検出回路で過充電を検出したとき２１ｅの出力をローレベルとしてトランジスタＭ２を遮断する。   The protection circuit 21A conducts the transistors M1 and M2 by setting both the terminals 21d and 21e to a high level during normal charging or discharging. Further, when overdischarge or overcurrent is detected by the overdischarge detection circuit or overcurrent detection circuit, the output of the terminal 21d is set to low level to shut off the transistor M1, and when overcharge is detected by the overcharge detection circuit, the output of 21e is output. The transistor M2 is shut off as a low level.

<ＣＯＢ型>
図２は、本発明の半導体集積回路を用いた電池パックの一実施形態の変形例の回路構成図を示す。同図中、図１と同一部分には同一符号を付す。 <COB type>
FIG. 2 shows a circuit configuration diagram of a modification of the embodiment of the battery pack using the semiconductor integrated circuit of the present invention. In the figure, the same parts as those in FIG.

図２において、リチウムイオン電池２０の正極、負極それぞれは電池パックの外部端子Ｂ＋，Ｂ−に接続されている。端子Ｂ＋，Ｂ−間には抵抗Ｒ１とコンデンサＣ１の直列回路が接続されている。端子Ｂ＋は電池パックの外部端子Ｐ＋に接続され、端子Ｂ−は、電流遮断用のｎチャネルＭＯＳＦＥＴであるトランジスタＭ１，Ｍ２を介して電池パックの外部端子Ｐ−に接続されている。   In FIG. 2, the positive electrode and the negative electrode of the lithium ion battery 20 are connected to the external terminals B + and B− of the battery pack. A series circuit of a resistor R1 and a capacitor C1 is connected between the terminals B + and B−. The terminal B + is connected to the external terminal P + of the battery pack, and the terminal B− is connected to the external terminal P− of the battery pack through transistors M1 and M2 which are n-channel MOSFETs for interrupting current.

また、端子Ｐ−，Ｐ−間にはコンデンサＣ２が接続され、端子Ｂ−，Ｐ−間にはコンデンサＣ３が接続されている。端子Ｐ＋，Ｐ−間には負荷又は充電器が接続される。   A capacitor C2 is connected between the terminals P- and P-, and a capacitor C3 is connected between the terminals B- and P-. A load or a charger is connected between the terminals P + and P−.

トランジスタＭ１，Ｍ２はドレインを共通接続され、トランジスタＭ１のソースは端子Ｂ−を介してリチウムイオン電池２０の負極に接続され、トランジスタＭ２のソースは端子Ｐ−に接続されている。トランジスタＭ１，Ｍ２それぞれのゲートは保護回路２１Ｂの端子２１ｄ，２１ｅに接続されている。   The transistors M1 and M2 have drains connected in common, the source of the transistor M1 is connected to the negative electrode of the lithium ion battery 20 via the terminal B-, and the source of the transistor M2 is connected to the terminal P-. The gates of the transistors M1 and M2 are connected to the terminals 21d and 21e of the protection circuit 21B.

保護回路２１Ｂは、半導体チップであり、過充電検出回路、過放電検出回路、過電流検出回路を内蔵すると共に、抵抗Ｒ１０、ヒューズＦＳ及びダイオードＤ１が設けられている。保護回路２１Ｂはパッケージに収納されていないだけで、保護回路２１Ａと同一構成である。   The protection circuit 21B is a semiconductor chip and includes an overcharge detection circuit, an overdischarge detection circuit, and an overcurrent detection circuit, and is provided with a resistor R10, a fuse FS, and a diode D1. The protection circuit 21B is not housed in the package, and has the same configuration as the protection circuit 21A.

保護回路２１Ｂの過電流検出用の端子２１ｃには電流制限用の抵抗Ｒ１０の一端が接続され、抵抗Ｒ１０の他端が上記過電流検出回路に接続されている。また、抵抗Ｒ１０と並列に接続されたヒューズＦＳは切断され、抵抗Ｒ１０の過電流検出回路に接続された他端には静電保護用のダイオードＤ１のカソードが接続され、ダイオードＤ１のアノードは接地されている。   One end of a current limiting resistor R10 is connected to the overcurrent detection terminal 21c of the protection circuit 21B, and the other end of the resistor R10 is connected to the overcurrent detection circuit. The fuse FS connected in parallel with the resistor R10 is disconnected, the cathode of the diode D1 for electrostatic protection is connected to the other end connected to the overcurrent detection circuit of the resistor R10, and the anode of the diode D1 is grounded. Has been.

また、保護回路２１Ｂはリチウムイオン電池２０の正極から抵抗Ｒ１を通して端子２１ａに電源ＶＤＤを供給されると共に、リチウムイオン電池２０の負極から端子２１ｂに電源ＶＳＳを供給されて動作し、過電流検出用の端子２１ｃは直接端子Ｐ−に接続されている。   The protection circuit 21B operates by being supplied with the power VDD from the positive electrode of the lithium ion battery 20 through the resistor R1 to the terminal 21a and supplied with the power VSS from the negative electrode of the lithium ion battery 20 to the terminal 21b. The terminal 21c is directly connected to the terminal P-.

保護回路２１Ｂの半導体チップはパッケージしない裸の状態で、周辺に接続される電子部品である抵抗Ｒ１，コンデンサＣ１，Ｃ２，Ｃ３，トランジスタＭ１，Ｍ２と共に基板に実装され、絶縁材でモールドされて、ＣＯＢ（Ｃｈｉｐ Ｏｎ Ｂｏａｒｄ）型の回路とされている。   The semiconductor chip of the protection circuit 21B is mounted on a substrate together with resistors R1, capacitors C1, C2, C3 and transistors M1, M2 which are electronic components connected to the periphery in a bare state without packaging, and is molded with an insulating material. It is a COB (Chip On Board) type circuit.

ヒューズＦＳが切断されると、静電保護用のダイオードＤ１は端子２１ｃから切り離されるためにダイオードＤ１による端子２１ｃの静電保護は行われないが、保護回路２１Ｂの半導体集積回路チップを抵抗Ｒ１，コンデンサＣ１，Ｃ２，Ｃ３，トランジスタＭ１，Ｍ２と共に基板に実装してモールドしたＣＯＢ型の回路では、端子２１ｃが外部から見えないため端子２１ｃに静電気が入来することがほとんどなく、また、端子２１ｃはトランジスタＭ２によって静電気から保護される。   When the fuse FS is cut, the electrostatic protection diode D1 is disconnected from the terminal 21c, so that the electrostatic protection of the terminal 21c by the diode D1 is not performed, but the semiconductor integrated circuit chip of the protection circuit 21B is connected to the resistor R1, In the COB type circuit mounted on the substrate together with the capacitors C1, C2, C3 and transistors M1, M2, the terminal 21c is not visible from the outside, so that static electricity hardly enters the terminal 21c, and the terminal 21c Is protected from static electricity by the transistor M2.

保護回路２１Ｂは、通常の充電時又は放電時に端子２１ｄ，２１ｅを共にハイレベルとしてトランジスタＭ１，Ｍ２を導通する。また、過放電検出回路或いは過電流検出回路で過放電或いは過電流を検出したとき端子２１ｄの出力をローレベルとしてトランジスタＭ１を遮断し、過充電検出回路で過充電を検出したとき２１ｅの出力をローレベルとしてトランジスタＭ２を遮断する。   The protection circuit 21B conducts the transistors M1 and M2 by setting both the terminals 21d and 21e to a high level during normal charging or discharging. Further, when overdischarge or overcurrent is detected by the overdischarge detection circuit or overcurrent detection circuit, the output of the terminal 21d is set to low level to shut off the transistor M1, and when overcharge is detected by the overcharge detection circuit, the output of 21e is output. The transistor M2 is shut off as a low level.

このように、半導体集積回路をＣＯＢ型とする場合には、ヒューズＦＳを切断することで、電流制限用の外付け抵抗Ｒ２を削除することができ、電子部品の点数を減少することで装置全体の製造コスト及び実装面積を低減できる。   As described above, when the semiconductor integrated circuit is a COB type, by cutting the fuse FS, the current limiting external resistor R2 can be eliminated, and by reducing the number of electronic components, the entire apparatus is reduced. The manufacturing cost and mounting area can be reduced.

<充電保護回路>
図３は、本発明の半導体集積回路を用いた充電保護回路の一実施形態の回路構成図を示す。同図中、充電される側のリチウムイオン電池３１，３２，３３，３４は直列接続され、リチウムイオン電池３１の正極はｐチャネルＭＯＳＦＥＴであるトランジスタＭ１１，Ｍ１２を介して充電保護回路３５の外部端子Ｐ＋に接続され、リチウムイオン電池３４の負極は充電保護回路の外部端子Ｐ−に接続されている。 <Charge protection circuit>
FIG. 3 shows a circuit configuration diagram of an embodiment of a charge protection circuit using the semiconductor integrated circuit of the present invention. In the figure, the charged lithium ion batteries 31, 32, 33, 34 are connected in series, and the positive electrode of the lithium ion battery 31 is an external terminal of the charge protection circuit 35 via transistors M11, M12 which are p-channel MOSFETs. Connected to P +, the negative electrode of the lithium ion battery 34 is connected to the external terminal P- of the charge protection circuit.

また、リチウムイオン電池３１の正極は充電保護回路３５の端子３５ａに接続され、リチウムイオン電池３２の正極は抵抗Ｒ１１を介して充電保護回路３５の端子３５ｂに接続され、リチウムイオン電池３３の正極は抵抗Ｒ１２を介して充電保護回路３５の端子３５ｃに接続され、リチウムイオン電池３４の正極は抵抗Ｒ１３を介して充電保護回路３５の端子３５ｄに接続されている。端子３５ａ，３５ｂ間にはコンデンサＣ１１が接続され、端子３５ｂ，３５ｃ間にはコンデンサＣ１２が接続され、端子３５ｃ，３５ｄ間にはコンデンサＣ１３が接続され、端子３５ｄ，外部端子Ｐ−間にはコンデンサＣ１４が接続されている。   The positive electrode of the lithium ion battery 31 is connected to the terminal 35a of the charge protection circuit 35, the positive electrode of the lithium ion battery 32 is connected to the terminal 35b of the charge protection circuit 35 via the resistor R11, and the positive electrode of the lithium ion battery 33 is The resistor R12 is connected to the terminal 35c of the charge protection circuit 35, and the positive electrode of the lithium ion battery 34 is connected to the terminal 35d of the charge protection circuit 35 via the resistor R13. A capacitor C11 is connected between the terminals 35a and 35b, a capacitor C12 is connected between the terminals 35b and 35c, a capacitor C13 is connected between the terminals 35c and 35d, and a capacitor is connected between the terminal 35d and the external terminal P−. C14 is connected.

トランジスタＭ１１，Ｍ１２はドレインを共通接続され、トランジスタＭ１１のソースはリチウムイオン電池３１の正極に接続され、トランジスタＭ１２のソースは端子Ｐ＋に接続されている。トランジスタＭ１１，Ｍ１２それぞれのゲートは充電保護回路３５の端子３５ｅ，３５ｆに接続されている。   The drains of the transistors M11 and M12 are connected in common, the source of the transistor M11 is connected to the positive electrode of the lithium ion battery 31, and the source of the transistor M12 is connected to the terminal P +. The gates of the transistors M11 and M12 are connected to terminals 35e and 35f of the charge protection circuit 35, respectively.

充電保護回路３５は、半導体チップであり、過充電検出回路、過放電検出回路、過電流検出回路を内蔵すると共に、抵抗Ｒ２０、ヒューズＦ１１及びダイオードＤ１１が設けられている。   The charge protection circuit 35 is a semiconductor chip, and includes an overcharge detection circuit, an overdischarge detection circuit, and an overcurrent detection circuit, and is provided with a resistor R20, a fuse F11, and a diode D11.

充電保護回路３５の過電流検出用の端子３５ｇには電流制限用の抵抗Ｒ２０の一端が接続され、抵抗Ｒ２０の他端が上記過電流検出回路に接続されている。また、抵抗Ｒ２０と並列に接続されたヒューズＦ１１は切断され、抵抗Ｒ２０の過電流検出回路に接続された他端には静電保護用のダイオードＤ１１のカソードが接続され、ダイオードＤ１１のアノードは接地されている。なお、端子３５ｇは充電保護回路の外部端子Ｐ−に接続されている。   One end of a current limiting resistor R20 is connected to the overcurrent detection terminal 35g of the charge protection circuit 35, and the other end of the resistor R20 is connected to the overcurrent detection circuit. The fuse F11 connected in parallel with the resistor R20 is disconnected, the cathode of the diode D11 for electrostatic protection is connected to the other end connected to the overcurrent detection circuit of the resistor R20, and the anode of the diode D11 is grounded. Has been. The terminal 35g is connected to the external terminal P- of the charge protection circuit.

また、充電保護回路３５の端子３５ｈは充電保護回路の外部端子ＣＴＬに接続され、端子３５ｉは充電保護回路の外部端子ＶＲＥＧに接続され、端子３５ｊは抵抗Ｒ１５を介して充電保護回路の外部端子Ｐ−に接続され、端子３５ｉ，３５ｊ間にはコンデンサＣ１６が接続され、端子ＶＲＥＧ，Ｐ−間にはコンデンサＣ１６が接続されている。   The terminal 35h of the charge protection circuit 35 is connected to the external terminal CTL of the charge protection circuit, the terminal 35i is connected to the external terminal VREG of the charge protection circuit, and the terminal 35j is connected to the external terminal P of the charge protection circuit via the resistor R15. The capacitor C16 is connected between the terminals 35i and 35j, and the capacitor C16 is connected between the terminals VREG and P−.

充電保護回路３５の半導体集積回路チップはパッケージしない裸の状態で、周辺に接続される電子部品である抵抗Ｒ１１〜Ｒ１５，コンデンサＣ１１〜Ｃ１７，トランジスタＭ１１，Ｍ１２と共に基板に実装され、絶縁材でモールドされて、ＣＯＢ（Ｃｈｉｐ Ｏｎ Ｂｏａｒｄ）型の回路とされている。   The semiconductor integrated circuit chip of the charge protection circuit 35 is mounted on a substrate together with resistors R11 to R15, capacitors C11 to C17 and transistors M11 and M12, which are electronic components connected to the periphery, in a bare state without packaging, and is molded with an insulating material. Thus, the circuit is a COB (Chip On Board) type circuit.

これに対し、充電保護回路３５が半導体チップ単体でパッケージに収納された半導体集積回路の場合には、ヒューズＦ１１は切断されず、端子３５ｇ，Ｐ＋間に破線で示すように抵抗Ｒ２１（Ｒ２１＝Ｒ２０）が接続される。   On the other hand, when the charge protection circuit 35 is a semiconductor integrated circuit housed in a package of a single semiconductor chip, the fuse F11 is not cut and the resistor R21 (R21 = R20) is shown between the terminals 35g and P + as indicated by a broken line. ) Is connected.

この実施形態においても、半導体集積回路をＣＯＢ型とする場合には、ヒューズＦＳを切断することで、電流制限用の外付け抵抗Ｒ２１を削除することができ、電子部品の点数を減少することで装置全体の製造コスト及び実装面積を低減できる。   Also in this embodiment, when the semiconductor integrated circuit is a COB type, by cutting the fuse FS, the current limiting external resistor R21 can be eliminated, and the number of electronic components can be reduced. The manufacturing cost and mounting area of the entire apparatus can be reduced.

本発明の半導体集積回路を用いた電池パックの第一実施形態の回路構成図である。It is a circuit block diagram of 1st embodiment of the battery pack using the semiconductor integrated circuit of this invention. 本発明の半導体集積回路を用いた電池パックの第一実施形態の変形例の回路構成図である。It is a circuit block diagram of the modification of 1st embodiment of the battery pack using the semiconductor integrated circuit of this invention. 本発明の半導体集積回路を用いた充電保護回路の一実施形態の回路構成図である。It is a circuit block diagram of one Embodiment of the charge protection circuit using the semiconductor integrated circuit of this invention. 従来の保護回路を用いた電池パックの一例の回路構成図である。It is a circuit block diagram of an example of the battery pack using the conventional protection circuit.

符号の説明Explanation of symbols

２０，３１〜３４ リチウムイオン電池
２１Ａ，２１Ｂ 保護回路
３５ 充電保護回路
Ｃ１〜Ｃ１７ コンデンサ
Ｒ１〜Ｒ２１ 抵抗
Ｍ１〜Ｍ１２ トランジスタ 20, 31-34 Lithium ion battery 21A, 21B Protection circuit 35 Charge protection circuit C1-C17 Capacitor R1-R21 Resistance M1-M12 Transistor

Claims (3)

半導体チップが単体でパッケージに収納されるパッケージ型か、又は、半導体チップが周辺に接続される電子部品と共に基板に実装され絶縁材でモールドされるチップオンボード型の半導体集積回路であって、
前記半導体チップの外部端子に一端を接続され他端に静電保護用のダイオードが接続されて前記半導体チップ内に設けられた電流制限用の抵抗と、
前記電流制限用の抵抗の両端間に並列に接続されて前記半導体チップ内に設けられたヒューズとを有し、
当該半導体集積回路が前記パッケージ型か前記チップオンボード型かに応じて前記ヒューズの切断の有無が決定されることを特徴とする半導体集積回路。 A package type in which a semiconductor chip is housed in a single package, or a chip-on-board type semiconductor integrated circuit in which a semiconductor chip is mounted on a substrate together with electronic components connected to the periphery and molded with an insulating material,
One end connected to the external terminal of the semiconductor chip and the other end connected to a diode for electrostatic protection, and a current limiting resistor provided in the semiconductor chip,
The current is connected in parallel to across the resistor for limiting possess a fuse provided in the semiconductor chip,
Whether or not the fuse is cut is determined depending on whether the semiconductor integrated circuit is the package type or the chip-on-board type . 請求項１記載の半導体集積回路において、
前記半導体チップが単体でパッケージに収納されるパッケージ型の場合、前記ヒューズは切断せず、前記外部端子に電流制限用の外付け抵抗を接続することを特徴とする半導体集積回路。 The semiconductor integrated circuit according to claim 1,
In the case of a package type in which the semiconductor chip is housed in a single package, the fuse is not cut, and an external resistor for current limiting is connected to the external terminal. 請求項１記載の半導体集積回路において、
前記半導体チップが周辺に接続される電子部品と共に基板に実装され絶縁材でモールドされるチップオンボード型の場合、前記ヒューズを切断して、前記外部端子に電流制限用の外付け抵抗を接続しないことを特徴とする半導体集積回路。 The semiconductor integrated circuit according to claim 1,
In the case of a chip-on-board type in which the semiconductor chip is mounted on a substrate together with electronic components connected to the periphery and molded with an insulating material, the fuse is cut and no external current limiting resistor is connected to the external terminal A semiconductor integrated circuit.
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