CN103871837B - 改善晶圆翘曲度的方法 - Google Patents

改善晶圆翘曲度的方法 Download PDF

Info

Publication number
CN103871837B
CN103871837B CN201210552256.4A CN201210552256A CN103871837B CN 103871837 B CN103871837 B CN 103871837B CN 201210552256 A CN201210552256 A CN 201210552256A CN 103871837 B CN103871837 B CN 103871837B
Authority
CN
China
Prior art keywords
adhesive film
film material
wafer
pad pasting
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201210552256.4A
Other languages
English (en)
Other versions
CN103871837A (zh
Inventor
程晋广
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201210552256.4A priority Critical patent/CN103871837B/zh
Publication of CN103871837A publication Critical patent/CN103871837A/zh
Application granted granted Critical
Publication of CN103871837B publication Critical patent/CN103871837B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

本发明公开了一种改善晶圆翘曲度的方法，包括如下步骤：准备具有不同热胀系数的贴膜材料；对翘曲晶圆进行曲率测试；根据晶圆的翘曲度选择贴膜材料及贴膜环境温度；将贴膜环境、贴膜材料及晶圆的温度升高到贴膜环境温度；在贴膜环境温度下，将所选贴膜材料贴到晶圆表面上；将贴膜后的晶圆冷却至室温；在晶圆上完成器件工艺；器件工艺完成后将贴膜材料去除。本发明能改善晶圆翘曲度，降低晶圆翘曲器件工艺的不利影响，且工艺简单、成本低廉。

Description

改善晶圆翘曲度的方法
技术领域
本发明涉及一种半导体集成电路制造工艺方法，特别是涉及一种改善晶圆翘曲度的方法。
背景技术
在绝缘栅双极型晶体管（IGBT）、硅通孔（TSV）等器件中都会采用到深沟槽工艺，在上述具有深沟槽工艺的器件的制造过程中，由于深沟槽的作用会对晶圆产生严重的翘曲，翘曲的存在会使晶圆的形状改变从而在进行光刻时光刻精度会变差，而且还会在光刻作业过程中光刻机台无法实现对晶圆的良好吸附而无法进行光刻作业；同时翘曲的存在会使晶圆的自身产生较大的应力而容易在搬送过程中、或划片工艺中使晶圆破裂。因此，如何改善晶圆的翘曲度也即降低晶圆的翘曲度对器件工艺的不利影响成为一个半导体制造工艺中的一个重要课题。
发明内容
本发明所要解决的技术问题是提供一种改善晶圆翘曲度的方法，能改善晶圆翘曲度，降低晶圆翘曲器件工艺的不利影响，且工艺简单、成本低廉。
为解决上述技术问题，本发明提供的改善晶圆翘曲度的方法，其特征在于，包括如下步骤：
步骤一、准备具有不同热胀系数的贴膜材料，所述贴膜材料能够包括多种，每一种所述贴膜材料在一系列的环境温度变化下提供不同的张力。
步骤二、在室温下对翘曲晶圆进行曲率测试得到所述晶圆的翘曲度。
步骤三、根据所述晶圆的翘曲度选择所述贴膜材料的种类以及所选择的贴膜材料所对应的贴膜环境温度。
步骤四、将贴膜环境、所选择的所述贴膜材料及所述晶圆的温度都升高到所述贴膜环境温度。
步骤五、在所述贴膜环境温度下，将所选的所述贴膜材料贴到所述晶圆背面表面上。
步骤六、将贴膜后的所述晶圆冷却至室温，使室温时所述晶圆的表面平整。
步骤七、在所述晶圆上完成器件工艺。
步骤八、器件工艺完成后将所述贴膜材料去除。
进一步的改进是，步骤一中所述贴膜材料有机的、高分子的具有不同热胀系数的材料。
进一步的改进是，所述贴膜材料为蓝膜。
进一步的改进是，步骤四中所述贴膜环境为一作业腔。
进一步的改进是，所述贴膜环境温度为-200℃～200℃。
进一步的改进是，步骤三中所述晶圆的翘曲度、所述贴膜材料和所述贴膜环境温度的关系通过实验确定。
进一步的改进是，步骤七中所述器件工艺包括光刻工艺、划片工艺。
本发明通过对晶圆的翘曲度的测试，根据测试结果选择贴膜材料及贴膜环境温度，并在晶圆、贴膜材料和作业腔的温度都设定为贴膜环境温度的条件下对晶圆进行贴膜，利用降温后贴膜材料的热胀冷缩效应将翘曲的晶圆拉平，从而能大大改善晶圆的翘曲度也即能大大降低晶圆的翘曲度值，从而降低晶圆翘曲器件工艺的不利影响，特别是能使光刻、划片等工艺能够顺利进行，能够大大提高生产效率和产品良率。另外，本发明所采用的贴膜材料为有机的、高分子的具有不同热胀系数的材料如蓝膜，所以材料成本低，且贴膜工艺简单仅需将晶圆、贴膜材料和作业腔的温度都设定为贴膜环境温度就能实现，并不需要其它复杂的工艺条件，所以本发明成本低廉。
附图说明
下面结合附图和具体实施方式对本发明作进一步详细的说明：
图1是本发明实施例方法的流程图；
图2-图4是本发明实施例方法各步骤中晶圆的剖面图。
具体实施方式
如图1所示，是本发明实施例方法的流程图；如图2至图4所示，是本发明实施例方法各步骤中晶圆的剖面图。本发明实施例改善晶圆翘曲度的方法包括如下步骤：
步骤一、准备具有不同热胀系数的贴膜材料，所述贴膜材料能够包括多种，每一种所述贴膜材料在一系列的环境温度变化下提供不同的张力。所述贴膜材料有机的、高分子的具有不同热胀系数的材料，较佳为，所述贴膜材料为蓝膜。
步骤二、如图2所示，在室温下对翘曲晶圆1进行曲率测试得到所述晶圆1的翘曲度。
步骤三、根据所述晶圆1的翘曲度选择贴膜材料及贴膜环境温度。所述晶圆的翘曲度、所述贴膜材料和所述贴膜环境温度的关系通过实验确定，如通过实验做出所述晶圆的翘曲度、所述贴膜材料和所述贴膜环境温度的关系曲线。较佳为，所述贴膜环境温度为-200℃～200℃。
步骤四、将贴膜环境、所选的所述贴膜材料及所述晶圆的温度升高到所述贴膜环境温度；所述贴膜环境为一作业腔。
步骤五、如图3所示，在所述贴膜环境温度下，在作业腔中将所选的所述贴膜材料2贴到所述晶圆1表面上。
步骤六、如图4所示，将贴膜后的所述晶圆1冷却至室温，使室温时所述晶圆1的表面平整。
步骤七、在所述晶圆1上完成器件工艺，所述器件工艺包括光刻工艺、划片工艺。
步骤八、器件工艺完成后将所述贴膜材料2去除。
以上通过具体实施例对本发明进行了详细的说明，但这些并非构成对本发明的限制。在不脱离本发明原理的情况下，本领域的技术人员还可做出许多变形和改进，这些也应视为本发明的保护范围。

Claims (6)

1.一种改善晶圆翘曲度的方法，其特征在于，包括如下步骤：
步骤一、准备具有不同热胀系数的贴膜材料，所述贴膜材料能够包括多种，每一种所述贴膜材料在一系列的环境温度变化下提供不同的张力；
步骤二、在室温下对翘曲晶圆进行曲率测试得到所述晶圆的翘曲度；
步骤三、根据所述晶圆的翘曲度选择所述贴膜材料的种类以及所选择的贴膜材料所对应的贴膜环境温度；
步骤四、将贴膜环境、所选择的所述贴膜材料及所述晶圆的温度都升高到所述贴膜环境温度；
步骤五、在所述贴膜环境温度下，将所选的所述贴膜材料贴到所述晶圆背面表面上；
步骤六、将贴膜后的所述晶圆冷却至室温，使室温时所述晶圆的表面平整；
步骤七、在所述晶圆上完成器件工艺；
步骤八、器件工艺完成后将所述贴膜材料去除。
2.如权利要求1所述的方法，其特征在于：步骤一中所述贴膜材料为有机的、高分子的具有不同热胀系数的材料。
3.如权利要求1或2所述的方法，其特征在于：所述贴膜材料为蓝膜。
4.如权利要求1所述的方法，其特征在于：步骤四中所述贴膜环境为一作业腔。
5.如权利要求1所述的方法，其特征在于：步骤三中所述晶圆的翘曲度、所述贴膜材料和所述贴膜环境温度的关系通过实验确定。
6.如权利要求1所述的方法，其特征在于：步骤七中所述器件工艺包括光刻工艺、划片工艺。
CN201210552256.4A 2012-12-18 2012-12-18 改善晶圆翘曲度的方法 Active CN103871837B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210552256.4A CN103871837B (zh) 2012-12-18 2012-12-18 改善晶圆翘曲度的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210552256.4A CN103871837B (zh) 2012-12-18 2012-12-18 改善晶圆翘曲度的方法

Publications (2)

Publication Number Publication Date
CN103871837A CN103871837A (zh) 2014-06-18
CN103871837B true CN103871837B (zh) 2016-08-17

Family

ID=50910252

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210552256.4A Active CN103871837B (zh) 2012-12-18 2012-12-18 改善晶圆翘曲度的方法

Country Status (1)

Country Link
CN (1) CN103871837B (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105702564B (zh) * 2016-03-29 2018-10-16 上海华力微电子有限公司 一种改善晶圆翘曲度的方法
KR101930742B1 (ko) * 2017-05-29 2019-03-11 주식회사 이오테크닉스 휨 감소 장치 및 휨 감소 방법
CN108878347B (zh) * 2018-07-03 2020-11-27 宁波江丰电子材料股份有限公司 一种不锈钢晶片载体及其制备方法
CN110828352A (zh) * 2018-08-07 2020-02-21 福科胶研股份有限公司 晶圆承载方法
CN109155235A (zh) 2018-08-16 2019-01-04 长江存储科技有限责任公司 使用背面补偿结构的晶圆平整度控制
CN110610877A (zh) * 2019-09-18 2019-12-24 中芯长电半导体（江阴）有限公司 降低晶圆翘曲度的装置及方法、半导体设备
KR20210044654A (ko) * 2019-10-15 2021-04-23 에스케이하이닉스 주식회사 웨이퍼 지지 구조체
CN116058100A (zh) 2021-06-30 2023-05-02 长江存储科技有限责任公司 三维存储器装置及其形成方法
CN115836387A (zh) 2021-06-30 2023-03-21 长江存储科技有限责任公司 三维存储器装置及其形成方法
WO2023272623A1 (en) 2021-06-30 2023-01-05 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices and methods for forming the same
WO2023028729A1 (en) * 2021-08-30 2023-03-09 Yangtze Memory Technologies Co., Ltd. Wafer stress control and semiconductor structure
CN116504609B (zh) * 2023-06-28 2023-09-15 北京无线电测量研究所 一种翘曲晶圆应力消除方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101911280A (zh) * 2008-10-16 2010-12-08 日东电工株式会社 保护带粘贴方法和保护带粘贴装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58164231A (ja) * 1982-03-25 1983-09-29 Toshiba Corp 半導体装置の製造方法
JP4856328B2 (ja) * 2001-07-13 2012-01-18 ローム株式会社 半導体装置の製造方法
US6964880B2 (en) * 2003-06-27 2005-11-15 Intel Corporation Methods for the control of flatness and electron mobility of diamond coated silicon and structures formed thereby
FR2924273B1 (fr) * 2007-11-28 2010-02-19 Commissariat Energie Atomique Procede de moderation de deformation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101911280A (zh) * 2008-10-16 2010-12-08 日东电工株式会社 保护带粘贴方法和保护带粘贴装置

Also Published As

Publication number Publication date
CN103871837A (zh) 2014-06-18

Similar Documents

Publication Publication Date Title
CN103871837B (zh) 改善晶圆翘曲度的方法
CN105977140B (zh) 一种改善圆晶片内膜厚均匀性的方法
US9576830B2 (en) Method and apparatus for adjusting wafer warpage
CN105810557A (zh) 半导体晶圆及其整平方法和封装方法
WO2012015550A3 (en) Semiconductor device and structure
TW201616635A (zh) Ｌｅｄ陣列擴張方法及ｌｅｄ陣列單元
WO2008078516A1 (ja) 酸化シリコン薄膜の製造装置及び形成方法
TWI533034B (zh) 軟性彩色濾光片及軟性彩色顯示元件之製造方法
US20180122653A1 (en) Semiconductor structure
WO2020103226A1 (zh) 半导体器件及其制作方法、对位标记的制作方法
CN107611158B (zh) 一种柔性显示面板的制作方法
US9658284B2 (en) Method for forming a test pad and method for performing array test using the test pad
EP3104417A3 (en) Method of manufacturing a protective film for a solar cell
CN105097669A (zh) 一种显示面板及其制造方法
CN204243004U (zh) 热退火设备
CN103579080A (zh) 在半导体晶圆上制备聚硅氮烷的方法和装置
CN103065944B (zh) 一种便携式器件晶圆的制造方法
CN111081622A (zh) 一种器件转移方法
US20210280527A1 (en) Semiconductor device
KR101626466B1 (ko) 플렉시블 디스플레이장치의 제조방법
TWI778303B (zh) 減少帶狀基板於封膠製程後發生翹曲的方法
CN105575870B (zh) 一种半导体器件及其制备方法、电子装置
CN103964375B (zh) 芯片键合方法
US9662812B2 (en) Methods for molding integrated circuits
KR20080049579A (ko) 가요성 어레이 기판의 제조 방법 및 기판 모듈

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant