CN103681338A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

Info

Publication number
CN103681338A
CN103681338A CN201210349744.5A CN201210349744A CN103681338A CN 103681338 A CN103681338 A CN 103681338A CN 201210349744 A CN201210349744 A CN 201210349744A CN 103681338 A CN103681338 A CN 103681338A
Authority
CN
China
Prior art keywords
sige
boron
regeneration zone
doped
silicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201210349744.5A
Other languages
English (en)
Other versions
CN103681338B (zh
Inventor
陈乐乐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201210349744.5A priority Critical patent/CN103681338B/zh
Priority to US13/935,228 priority patent/US8962428B2/en
Publication of CN103681338A publication Critical patent/CN103681338A/zh
Priority to US14/571,561 priority patent/US9087901B2/en
Application granted granted Critical
Publication of CN103681338B publication Critical patent/CN103681338B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856—Source regions
    • H01L29/086—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856—Source regions
    • H01L29/0869—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0886—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

本发明公开了一种半导体器件及其制造方法，涉及半导体技术领域。该方法提供栅结构侧方形成有Sigma形凹陷的衬底，在Sigma形凹陷的内表面外延生长有种子硅锗层，在种子硅锗层内外延生长有掺杂硼的硅锗体；对Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成衬底表面下的凹陷；在衬底表面下的凹陷内进行掺杂硼的硅锗外延生长生成掺杂硼的硅锗再生层，而硅锗再生层中硼的含量大于种子硅锗层中硼的含量。由于Sigma形凹陷靠近衬底表面形成掺杂硼的硅锗外延层中硼的含量可以比较高，从而减小了外部电阻，提高了半导体器件的性能。

Description

半导体器件及其制造方法
技术领域
本发明涉及半导体技术领域，特别涉及一种半导体器件及其制造方法。
背景技术
在先进技术中，提出嵌入式硅锗（Embedded SiGe，eSiGe）工艺，以增大PMOS（Positive Channel Metal Oxide Semiconductor，P沟道金属氧化物半导体场效应）器件沟道区的压缩应力，增强其载流子迁移率；其中使用嵌入式硅锗来形成源区或漏区，从而对沟道区施加应力。进一步提出了形成Sigma（“∑”）形凹陷以填充硅锗的技术方案，增强施加应力的效果，提高PMOS器件性能。
图1A至图1D示意性地示出现有技术中SiGe工艺各个阶段的截面图。
如图1A所示，提供形成有栅极102的衬底100，栅极102还可以具有侧墙103，在衬底中形成有Sigma形凹陷101。
如图1B所示，在Sigma形凹陷101进行种子（Seed）硅锗外延生长形成种子硅锗层104。
如图1C所示，在种子硅锗层104上进行原位掺杂硼的硅锗体（Bulk）外延生长获得原位掺杂硼的硅锗体105。
如图1D所示，在Sigma形凹陷101的种子外延层104和硅锗体105上方进行硅外延生长，获得帽（Cap）外延层106。
为了获得更高的移动性，需要更高的锗含量，但是，更高的锗含量会严重地阻止硼的扩散，结果导致高的外部电阻（ExternalResistance，Rex）。下表1示出了锗百分含量与外部电阻之间的对应关系：
    Ge％   18％   25％
  Rex(ohm)     366     3022
表1
对应于18%的Ge百分含量，Rex为366欧姆，对应于25%的Ge百分含量，Rex为3022欧姆。
过高的外部电阻很大程度上降低了晶体管的性能。
发明内容
本发明的发明人发现上述现有技术中存在问题，并因此针对所述问题中的至少一个问题提出了一种新的技术方案。
本发明的一个目的是提供一种半导体器件的技术方案。
根据本发明的第一方面，提供了一种半导体器件制造方法，包括：提供硅衬底，硅衬底上形成有栅结构，在硅衬底中栅结构侧方形成有Sigma形凹陷；Sigma形凹陷的内表面外延生长有种子硅锗层，种子硅锗层内外延生长有掺杂硼的硅锗体；对Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成硅衬底表面下的凹陷；在硅衬底表面下的凹陷内进行掺杂硼的硅锗外延生长以生成掺杂硼的硅锗再生层，其中，硅锗再生层中硼的含量大于种子硅锗层中硼的含量。
可选地，该方法还包括：在硅锗再生层上进行硅外延生长形成帽（Cap）外延层。
可选地，对Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成衬底表面下的凹陷包括：使用HCL（氯化氢）利用外延生长系统对Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成衬底表面下的凹陷。
可选地，硅锗再生层的深度为50埃~100埃；和/或硅锗再生层中硼的浓度为1E19~1E21。
可选地，硅锗再生层中锗的掺杂浓度为20%~35%。
可选地，掺杂有硼的硅锗外延生长采用RPCVD（ReducedPressure Chemical Vapor Deposition，减压化学气相沉积）外延工艺，工艺气体包括SiH4、二氯二氢硅（DCS）、GeH4、HCl、B2H6、H2；工艺温度500°C~800°C；工艺压力5托（Torr）~25托。
可选地，种子硅锗层中掺杂有少量由掺杂硼的硅锗体扩散来的硼。
根据本发明的另一方面，提供一种半导体器件，其中，半导体器件的衬底上形成有栅结构，在衬底中栅结构侧方形成有Sigma形凹陷；Sigma形凹陷靠近衬底的表面形成有掺杂硼的硅锗再生层，在硅锗再生层下Sigma形凹陷的内表面外延生长有种子硅锗层，种子硅锗层内外延生长有掺杂硼的硅锗体；其中，硅锗再生层中硼的含量大于种子硅锗层中硼的含量。
可选地，硅锗再生层中硼的浓度为1E19~1E21。
可选地，硅锗再生层的深度为50埃~100埃。
可选地，硅锗再生层中锗的掺杂浓度为20%~35%。
可选地，硅锗再生层上外延生长有硅外延层。
本发明的一个优点在于，Sigma形凹陷靠近衬底表面形成掺杂硼的硅锗外延再生层，该掺杂硼的硅锗外延层中硼的含量可以比较高，从而减小了外部电阻，提高了半导体器件的性能。
通过以下参照附图对本发明的示例性实施例的详细描述，本发明的其它特征及其优点将会变得清楚。
附图说明
构成说明书的一部分的附图描述了本发明的实施例，并且连同说明书一起用于解释本发明的原理。
参照附图，根据下面的详细描述，可以更加清楚地理解本发明，其中：
图1A至图1D示意性地示出现有技术中硅锗工艺各个阶段的截面图。
图2A至图2C示意性地示出根据本发明的半导体器件制造方法的一个实施例中各个阶段的截面图。
图3A至图3F示意性地示出根据本发明的半导体器件制造方法的另一个实施例中各个阶段的截面图。
图4示出半导体器件的比较示意图。
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本发明的范围。
同时，应当明白，为了便于描述，附图中所示出的各个部分的尺寸并不是按照实际的比例关系绘制的。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为授权说明书的一部分。
在这里示出和讨论的所有示例中，任何具体值应被解释为仅仅是示例性的，而不是作为限制。因此，示例性实施例的其它示例可以具有不同的值。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步讨论。
图2A至图2C示意性地示出根据本发明的半导体器件制造方法的一个实施例中各个阶段的截面图。
如图2A所示，提供衬底200，衬底200上形成有栅结构202，栅结构202一般形成有203；在衬底200中栅结构202侧方形成有Sigma形凹陷201；Sigma形凹陷201的内表面外延生长有种子硅锗层204，种子硅锗层204内外延生长有掺杂硼的硅锗体205。种子硅锗层204在外延生长时可以掺杂有少量的硼，或者在在外延生长时不掺杂硼，而通过掺杂硼的硅锗体205中的硼扩散到种子硅锗层204中。
步骤204，对Sigma形凹陷201内的种子硅锗层204和硅锗体205进行反向刻蚀以形成衬底表面下的凹陷206。可以通过各向异性的干法刻蚀或者湿法刻蚀形成凹陷206。凹陷206的深度206例如为50埃（A）~100埃。
步骤206，在衬底200表面下的凹陷206内进行掺杂硼的硅锗外延生长以生成掺杂硼的硅锗再生层207，其中，硅锗再生层207中硼的含量大于种子硅锗层204中硼的含量。在一个实施例中，硅锗再生层207中硼的浓度为1E19~1E21。在一个实施例中，硅锗再生层207中锗的掺杂浓度为20%~35%。
上述实施例中，通过对填充Sigma形凹陷的硅锗材料进行反向刻蚀形成衬底表面下的凹陷，并对凹陷进行掺杂有硼的硅锗外延生长，从而使得Sigma形凹陷靠近衬底表面形成掺杂硼的硅锗外延层中硼的含量可以比较高，从而减小了外部电阻，提高了半导体器件的性能。
图3A至图3F示意性地示出根据本发明的半导体器件制造方法的一个实施例中各个阶段的截面图。
如图3A所示，提供形成有栅极302的衬底300，栅极302还具有侧墙303，在衬底中例如通过干法刻蚀和湿法刻蚀形成有Sigma形凹陷301。
如图3B所示，在Sigma形凹陷301的内表面进行掺杂少量硼的种子硅锗外延生长以形成种子硅锗层304。
如图3C所示，在种子硅锗层304内进行原位掺杂硼的硅锗体外延生长获得原位掺杂硼的硅锗体305。
如图3D所示，对Sigma形凹陷中的硅锗体305和种子硅锗层304进行反向刻蚀形成衬底表面下的凹陷306。
如图3E所示，在凹陷306内进行掺杂有硼的硅锗外延生长在衬底表面下Sigma形凹陷中形成掺杂有硼的硅锗再生层307，其中，硅锗再生层307中硼的含量高于种子硅锗层304中硼的含量。
在一个实施例中，硅锗再生层的掺杂硼的硅锗外延生长采用RPCVD外延工艺，工艺气体包括SiH4、DCS、GeH4、HCl、B2H6、H2；工艺温度500°C~800°C；工艺压力5Torr（托）~25Torr（托）。
如图3F所示，在Sigma形凹陷301的掺杂有硼的硅锗再生层307上方进行硅外延生长，获得帽外延层308。
上述实施例中，通过对种子硅锗层和硅锗体进行反向刻蚀形成凹陷，在凹陷内外延生长含硼比较高的硅锗再生层，而在硅锗再生层生成帽外延层，可以获得更好的器件性能。
图4示出半导体器件的比较示意图，其中，图4左侧的示意图是目前技术形成的半导体器件，图4右侧的示意图是根据本发明的技术形成的半导体器件。图4右侧的半导体器件的衬底300上形成有栅结构302和303，在衬底300中栅结构侧方形成有Sigma形凹陷301；Sigma形凹陷301靠近衬底300的表面形成有掺杂硼的硅锗再生层307，在硅锗再生层307下Sigma形凹陷301的内表面外延生长有种子硅锗层304，种子硅锗层304内外延生长有掺杂硼的硅锗体305；硅锗再生层307上外延生长有硅外延层308。其中，硅锗再生层307中硼的含量大于种子硅锗层304中硼的含量。
对于旧的半导体器件，由于硅锗种子层（Seed layer）104的硼的浓度很低或没有，所以在图中的椭圆区域41内会形成高阻区域，特别是在Ge%比较高的情况下，由于Ge阻止Boron扩散的能力很强，越容易形成这高阻层。
在新器件中，采用反向刻蚀把原来高阻区域41给刻蚀掉，然后再生长一层具有高硼浓度的硅锗再生层307，从而在图中的椭圆区域42内不会形成高阻区域，可以很好的把这块的高阻区域给消除掉，形成低阻值的区域，可以得到更低的Rex，无论Ge%多少。
至此，已经详细描述了根据本发明的制造半导体器件的方法和所形成的半导体器件。为了避免遮蔽本发明的构思，没有描述本领域所公知的一些细节。本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。
虽然已经通过示例对本发明的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本发明的范围。本领域的技术人员应该理解，可在不脱离本发明的范围和精神的情况下，对以上实施例进行修改。本发明的范围由所附权利要求来限定。

Claims (12)

1.一种半导体器件制造方法，其特征在于，包括：
提供衬底，所述衬底上形成有栅结构，在所述衬底中所述栅结构侧方形成有Sigma形凹陷；所述Sigma形凹陷的内表面外延生长有种子硅锗层，所述种子硅锗层内外延生长有掺杂硼的硅锗体；
对所述Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成所述衬底表面下的凹陷；
在所述衬底表面下的凹陷内进行掺杂硼的硅锗外延生长以生成掺杂硼的硅锗再生层，其中，所述硅锗再生层中硼的含量大于所述种子硅锗层中硼的含量。
2.根据权利要求1所述的方法，其特征在于，还包括：
在所述硅锗再生层上进行硅外延生长形成帽外延层。
3.根据权利要求1所述的方法，其特征在于，所述对所述Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成所述衬底表面下的凹陷包括：
使用氯化氢利用外延生长系统对所述Sigma形凹陷内的种子硅锗层和硅锗体进行反向刻蚀以形成所述衬底表面下的凹陷。
4.根据权利要求1所述的方法，其特征在于，所述硅锗再生层的深度为50埃~100埃；
或
所述硅锗再生层中硼的浓度为1E19~1E21。
5.根据权利要求1或4所述的方法，其特征在于，所述硅锗再生层中锗的掺杂浓度为20%~35%。
6.根据权利要求5所述的方法，其特征在于，掺杂有硼的硅锗外延生长采用减压化学气相沉积外延工艺，工艺气体包括SiH4、二氯二氢硅、GeH4、氯化氢、B2H6、H2；工艺温度500°C~800°C；工艺压力5托~25托。
7.根据权利要求1所述的方法，其特征在于，所述种子硅锗层中掺杂有少量由所述掺杂硼的硅锗体扩散来的硼。
8.一种半导体器件，其中，所述半导体器件的衬底上形成有栅结构，在所述衬底中所述栅结构侧方形成有Sigma形凹陷；所述Sigma形凹陷靠近所述衬底的表面形成有掺杂硼的硅锗再生层，在所述硅锗再生层下所述Sigma形凹陷的内表面外延生长有种子硅锗层，所述种子硅锗层内外延生长有掺杂硼的硅锗体；
其中，所述硅锗再生层中硼的含量大于所述种子硅锗层中硼的含量。
9.根据权利要求8所述的半导体器件，其特征在于，所述硅锗再生层中所述硼的浓度为1E19~1E21。
10.根据权利要求8所述的半导体器件，其特征在于，所述硅锗再生层的深度为50埃~100埃。
11.根据权利要求8所述的半导体器件，其特征在于，所述硅锗再生层中锗的掺杂浓度为20%~35%。
12.根据权利要求8所述的半导体器件，所述硅锗再生层上外延生长有硅外延层。
CN201210349744.5A 2012-09-18 2012-09-18 半导体器件及其制造方法 Active CN103681338B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201210349744.5A CN103681338B (zh) 2012-09-18 2012-09-18 半导体器件及其制造方法
US13/935,228 US8962428B2 (en) 2012-09-18 2013-07-03 Method of manufacturing a semiconductor device
US14/571,561 US9087901B2 (en) 2012-09-18 2014-12-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210349744.5A CN103681338B (zh) 2012-09-18 2012-09-18 半导体器件及其制造方法

Publications (2)

Publication Number Publication Date
CN103681338A true CN103681338A (zh) 2014-03-26
CN103681338B CN103681338B (zh) 2016-06-08

Family

ID=50273575

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210349744.5A Active CN103681338B (zh) 2012-09-18 2012-09-18 半导体器件及其制造方法

Country Status (2)

Country Link
US (2) US8962428B2 (zh)
CN (1) CN103681338B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109920837A (zh) * 2017-12-12 2019-06-21 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105702727B (zh) * 2014-11-28 2020-06-16 联华电子股份有限公司 金属氧化物半导体装置与其形成方法
KR102192571B1 (ko) * 2014-12-04 2020-12-17 삼성전자주식회사 버퍼 층을 갖는 반도체 소자 및 그 형성 방법
CN105990342B (zh) * 2015-02-13 2019-07-19 上海华力微电子有限公司 具有用于嵌入锗材料的成形腔的半导体器件及其制造工艺
KR102326316B1 (ko) 2015-04-10 2021-11-16 삼성전자주식회사 반도체 소자의 제조 방법
CN106783965A (zh) * 2016-12-01 2017-05-31 上海华力微电子有限公司 一种锗硅源漏极及制备方法
US10056329B1 (en) 2017-05-02 2018-08-21 International Business Machines Corporation Programmable buried antifuse
CN108962754B (zh) * 2017-05-19 2021-11-30 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法
US11764058B2 (en) 2021-09-28 2023-09-19 Applied Materials, Inc. Three-color 3D DRAM stack and methods of making

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101281926A (zh) * 2007-04-05 2008-10-08 台湾积体电路制造股份有限公司 半导体结构
US7456087B2 (en) * 2007-02-09 2008-11-25 United Microelectronics Corp. Semiconductor device and method of fabricating the same
US20120058616A1 (en) * 2010-09-02 2012-03-08 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices using preliminary trenches with epitaxial growth
US20120091469A1 (en) * 2010-10-13 2012-04-19 Park Keum-Seok Semiconductor Devices Having Shallow Junctions
CN102637728A (zh) * 2011-02-14 2012-08-15 台湾积体电路制造股份有限公司 制造应变源极/漏极结构的方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810480B (zh) * 2011-06-02 2016-01-06 中芯国际集成电路制造(北京)有限公司 半导体器件的制造方法
CN102842503B (zh) * 2011-06-20 2015-04-01 中芯国际集成电路制造(北京)有限公司 半导体器件的制造方法
US8975672B2 (en) * 2011-11-09 2015-03-10 United Microelectronics Corp. Metal oxide semiconductor transistor and manufacturing method thereof
CN103681845B (zh) * 2012-09-19 2016-08-10 中芯国际集成电路制造(上海)有限公司 半导体器件及其制造方法
US20140159052A1 (en) * 2012-12-11 2014-06-12 Globalfoundries Inc. Method and structure for transistor with reduced drain-induced barrier lowering and on resistance
US8853060B1 (en) * 2013-05-27 2014-10-07 United Microelectronics Corp. Epitaxial process

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7456087B2 (en) * 2007-02-09 2008-11-25 United Microelectronics Corp. Semiconductor device and method of fabricating the same
CN101281926A (zh) * 2007-04-05 2008-10-08 台湾积体电路制造股份有限公司 半导体结构
US20120058616A1 (en) * 2010-09-02 2012-03-08 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices using preliminary trenches with epitaxial growth
US20120091469A1 (en) * 2010-10-13 2012-04-19 Park Keum-Seok Semiconductor Devices Having Shallow Junctions
CN102637728A (zh) * 2011-02-14 2012-08-15 台湾积体电路制造股份有限公司 制造应变源极/漏极结构的方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109920837A (zh) * 2017-12-12 2019-06-21 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
CN109920837B (zh) * 2017-12-12 2022-04-22 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法

Also Published As

Publication number Publication date
US8962428B2 (en) 2015-02-24
US9087901B2 (en) 2015-07-21
CN103681338B (zh) 2016-06-08
US20140077264A1 (en) 2014-03-20
US20150097235A1 (en) 2015-04-09

Similar Documents

Publication Publication Date Title
CN103681338A (zh) 半导体器件及其制造方法
CN102931083B (zh) 半导体器件及其制造方法
US10658175B2 (en) Semiconductor device and manufacturing method therefor
CN105448991B (zh) 晶体管及其形成方法
JP2006186240A5 (zh)
CN104576391B (zh) 一种pmos器件及其制备方法
CN102956445A (zh) 一种锗硅外延层生长方法
US9748386B2 (en) Epitaxial structure of semiconductor device and manufacturing method thereof
KR101565644B1 (ko) Epi 이상을 줄이기 위한 순환 증착 에칭 화학적 기상 증착 에피택시
CN105529268B (zh) 晶体管及其形成方法
US10008383B2 (en) Semiconductor structure and manufacturing method thereof
CN105514158A (zh) 半导体结构和测试结构的形成方法、测试方法
CN103000499B (zh) 一种锗硅硼外延层生长方法
US20170110580A1 (en) Coms structure and fabrication method thereof
US20120012906A1 (en) Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE GRADED JUNCTIONS AND METHOD FOR FORMING THE SAME
CN102931082B (zh) 半导体器件及其制造方法
CN105575763B (zh) 应力层的形成方法和晶体管的形成方法
CN103377897B (zh) 一种硅锗源/漏结构的形成方法
CN104733317A (zh) 晶体管的形成方法
CN105632927B (zh) Pmos晶体管的形成方法
CN103094107B (zh) 一种深沟槽的硅外延填充方法
CN103311122B (zh) 晶体管的形成方法
Wang et al. Selective Epitaxy of Group IV Materials for CMOS Application
CN109920837B (zh) 半导体器件及其形成方法
CN109300788A (zh) 半导体结构及其形成方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant