CN103617952B - Diode wet etching method - Google Patents
Diode wet etching method Download PDFInfo
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- CN103617952B CN103617952B CN201310635376.5A CN201310635376A CN103617952B CN 103617952 B CN103617952 B CN 103617952B CN 201310635376 A CN201310635376 A CN 201310635376A CN 103617952 B CN103617952 B CN 103617952B
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- barrier layer
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000001039 wet etching Methods 0.000 title claims abstract description 19
- 230000004888 barrier function Effects 0.000 claims abstract description 59
- 239000002184 metal Substances 0.000 claims abstract description 44
- 229910052751 metal Inorganic materials 0.000 claims abstract description 44
- 238000005530 etching Methods 0.000 claims abstract description 35
- 230000007797 corrosion Effects 0.000 claims abstract description 27
- 238000005260 corrosion Methods 0.000 claims abstract description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 42
- 229910052710 silicon Inorganic materials 0.000 claims description 42
- 239000010703 silicon Substances 0.000 claims description 42
- 239000007788 liquid Substances 0.000 claims description 40
- 230000003628 erosive effect Effects 0.000 claims description 11
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 10
- 239000000758 substrate Substances 0.000 description 3
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 239000003518 caustics Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229960000583 acetic acid Drugs 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 239000012362 glacial acetic acid Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000008450 motivation Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Weting (AREA)
Abstract
The invention discloses diode wet etching method.This diode wet etching method comprises the following steps: a, etching conductive layer and barrier layer, forms multiple unit that is corroded；B, corrosion are formed at multiple adhesion layer being corroded between unit；C, the marginal portion corroding the conductive layer of multiple unit that is corroded and the marginal portion on barrier layer, the edge of the adhesion layer of the unit that makes to be corroded exposes from conductive layer and barrier layer.The present invention adds step anticaustic conductive layer and the step on barrier layer than existing wet etching.So make to obtain adhesion layer and expose a limit than barrier layer above and conductive layer more, effectively reduce the generation of adhesion layer undercutting situation.When checking under mirror, judge the whether undercutting of bottom metal layer adhesion layer according to the presence or absence on this limit.This limit exists, and illustrates undercutting do not occur, and the existence on this limit will not produce impact to the use of product.
Description
Technical field
The present invention relates to diode fabricating method, particularly to Schottky-barrier diode wet etching side
Method.
Background technology
The front of Schottky-barrier diode (SBD) uses multi-layer metal structure, in such an embodiment
Adhesion layer 1, barrier layer 2 (filter course) and conductive layer 3 upwards it is followed successively by by silicon substrate 4.
In Schottky-barrier diode manufacture process, the wet method of the more metal layers corrosion on silicon substrate
Caustic solution has multiple.Such as:
Method 1, takes successively to corrode, first etching conductive layer, and then corrosion barrier layer corrodes the most again
Adhesion layer.This method is high to technological requirement, wants that the preferable effectiveness comparison reached as described in Figure 1 is difficult,
Easily cause the excessive erosion (undercutting as shown in figure 2 at 10) of bottom metal layer adhesion layer, or cause
The layering of metal, metal edge is uneven waits technological problems.
Method 2, takes the method that barrier layer is corroded together with conductive layer, corrodes adhesion layer the most again.Adopt
Multiple layer metal is corroded the most common by method 2.This method ratio method 1 wants simple, but shortcoming is also
It is the easy undercutting of bottom metal layer, produces the problem as shown in Fig. 2 10, i.e. bottom metal layer and adhere to
Layer is by undercutting.It is to see from above during owing to checking under mirror, can only see the surface condition of conductive layer,
The situation after can not checking adhesion layer corrosion below even if underlying metal is corroded, therefore undercutting
Situation is not easy to be examined out.Undercutting problem once occurs, the reliability of device can be affected, and
The serious meeting of undercutting causes the problems such as metal liftoff.
But, it is intrinsic that problems is generally considered to be this technique, do not attract people's attention and
The motivation improved.
Summary of the invention
It is an object of the invention to provide a kind of diode wet etching method, above-mentioned existing skill can be overcome
One or more in art defect.
According to an aspect of the invention, it is provided diode wet etching method, comprise the following steps:
A, etching conductive layer and barrier layer, form multiple unit that is corroded；B, corrode multiple described in be corroded
Adhesion layer between unit；C, corrode multiple described in be corroded the marginal portion of conductive layer of unit and stop
The marginal portion of layer, make described in the be corroded edge of adhesion layer of unit reveal from conductive layer and barrier layer
Go out.
The present invention adds step anticaustic conductive layer and the step on barrier layer than existing wet etching
Suddenly.So make adhesion layer expose a limit than barrier layer above and conductive layer more, effectively reduce adhesion
The generation of layer undercutting situation.When checking under mirror, judge underlying metal according to the presence or absence on this limit
Layer adhesion layer whether undercutting.This limit exists, and illustrates undercutting do not occur, and the existence on this limit will not be to product
Use produce impact.
In some embodiments, step a includes, executes on the silicon chip of band multiple layer metal to be corroded
Add mask；In mask silicon chip inserts conductive layer corrosive liquid, the conductive layer in mask window is carried out
Once corrode；The silicon chip eroding conductive layer is inserted in the corrosive liquid of barrier layer, in mask window
Barrier layer once corrode.
In some embodiments, step c includes: silicon chip step b obtained inserts conductive layer corrosive liquid
In, the conductive layer in mask window is carried out anticaustic；To insert through the silicon chip of conductive layer anticaustic
In the corrosive liquid of barrier layer, the barrier layer in mask window is carried out anticaustic.
In some embodiments, step a includes: execute on the silicon chip of band multiple layer metal to be corroded
Adding mask, mask window is the cut edge of monocrystalline；Mask silicon chip inserts energy etching conductive layer simultaneously
And in the conductive layer on barrier layer-barrier layer corrosive liquid, the conductive layer in mask window and barrier layer are carried out
Once corrode.Thus, reduce corrosion step, make technique simple, reduce the layering of each layer and metal edge
The phenomenon such as uneven.
In some embodiments, step c includes: is again inserted by the silicon chip obtained in step b and leads
In the erosion liquid that electric layer-barrier layer is rotten, conductive layer and barrier layer are carried out anticaustic.Thus, corruption is reduced
Erosion step, makes technique simple, reduces the layering of metal, the generation of the phenomenons such as metal edge is uneven.
In some embodiments, in step c, etching time is shorter than etching time in step a.Make to glue
Barrier layer that attached layer is upper and conductive layer again will not be to barrier layer and conductions while exposing a limit more
Layer excessive corrosion.
In some embodiments, in step b, use the corrosion of adhesion layer corrosive liquid multiple described rotten
Adhesion layer between erosion unit.
In some embodiments, after corroding, the silicon chip through corrosion treatmentCorrosion Science is washed by water every time.Remove residual
The corrosive liquid stayed, prevents from, to conductive layer and barrier layer excessive corrosion, eliminating the shadow to next process step
Ring.
In some embodiments, after described step c, step d is also included: by process through step c
Silicon chip checks, it can be seen that the edge of adhesion layer exposes from conductive layer and barrier layer and is judged as not
Undercutting occurs.Thus may determine that diode is the most qualified.
The problem being easily generated undercut when instant invention overcomes multiple layer metal corrosion on silicon chip.Solve simultaneously
The problem that underlying metal undercutting of having determined is difficult to be found.
Accompanying drawing explanation
Fig. 1 is the structural representation after the multiple layer metal corrosion of ideally diode；
Fig. 2 produces undercutting situation schematic diagram for using existing wet etching method；
Fig. 3 be use the present invention diode wet etching method corrosion after structural representation.
Detailed description of the invention
Below the lithographic method of the present invention is described in further detail.
As it is shown in figure 1, the multi-layer metal structure in silicon substrate 4 front of Schottky-barrier diode is successively
For adhesion layer 1, barrier layer 2 and conductive layer 3.For manufacturing the layer of the silicon chip of Schottky-barrier diode
Structure is identical with the Rotating fields of Schottky-barrier diode.
Embodiment 1
Step a:
Use mask etch method, the silicon chip of band multiple layer metal to be corroded applies in a conventional manner
Mask, mask window position is the cut edge of multiple unit that is corroded；
Being inserted by mask silicon chip can be in the conductive layer corrosive liquid of etching conductive layer 3, in mask window
Conductive layer 3 once corrode, form multiple unit that is corroded；
The silicon chip eroding conductive layer is washed by water；
Being inserted by silicon chip after bath can be in the barrier layer corrosive liquid of corrosion barrier layer 2, to mask window
Interior barrier layer 2 is once corroded, and is eroded on multiple barrier layers 2 being corroded between unit；
The silicon chip eroding barrier layer 2 is washed by water.
Step b:
Multiple adhesion layers being corroded between unit are corroded with the adhesion layer corrosive liquid that can corrode adhesion layer 1
1, make multiple be corroded completely separable between unit；
The silicon chip eroding adhesion layer 1 is washed by water, removes the adhesion layer corrosive liquid of residual, prevent viscous
The adhesion layer corrosive liquid of attached layer 1 excessive corrosion and elimination remaining processes the impact of step to next.
Step c:
Silicon chip step b obtained is inserted in conductive layer corrosive liquid, carries out the conductive layer 3 in mask window
Anticaustic.In this step, conductive layer corrosive liquid is identical with conductive layer corrosive liquid in step a, etching time
Shorter than the time that conductive layer in step a once corrodes；During the corrosion in step a, conductive layer 3 once corroded
Between right equal to or more than in traditional method to the etching time sum of conductive layer 3 anticaustic with step c
The etching time of conductive layer 3.Different according to conductive layer metal thickness, determine the ratio of twice etching time,
Such as when metal thickness is bigger, can select for the first time and second time etching time ratio is for 8:2, metal is thick
When spending less, then the time can be selected than for 7:3 etc..
Silicon chip through conductive layer anticaustic is washed by water；
Silicon chip through conductive layer anticaustic is inserted in the corrosive liquid of barrier layer, to the stop in mask window
Layer 2 carries out anticaustic, and the edge of the adhesion layer 1 of the unit that makes to be corroded is from conductive layer 3 and 2, barrier layer dew
Go out.In this step, barrier layer corrosive liquid is identical with barrier layer corrosive liquid in step a, and etching time is than step a
The time that middle barrier layer is once corroded is short.
To barrier layer 2 anticaustic in the etching time in step a, barrier layer 2 once corroded and step c
Etching time sum equal to or more than etching time to barrier layer 2 in traditional method.
Silicon chip through barrier layer anticaustic is washed by water, and dries.
Step d: the silicon chip processed through step c is checked under mirror, as shown in Figure 3, it is possible to see
The judgement exposed from conductive layer and barrier layer to the edge 11 of adhesion layer 1 is not for there is undercutting.At mirror
Lower when checking, judge adhesion layer whether undercutting according to the presence or absence at this edge 11.This edge 11
Exist, illustrate that undercutting does not occurs, and the existence at this edge 11 will not produce impact to the use of product.
Embodiment 2
Step a:
Use mask etch method, the silicon chip of band multiple layer metal to be corroded applies mask, mask windows
Mouth position is the cut edge of multiple unit that is corroded；
Mask silicon chip is inserted can the conductive layer-barrier layer on simultaneously etching conductive layer 3 and barrier layer 2 rotten
In erosion liquid, the conductive layer 3 in mask window and barrier layer 2 are once corroded, forms multiple being corroded
Unit；
The silicon chip bath once will corroded through conductive layer and barrier layer.
Step b:
Multiple adhesion layers being corroded between unit are corroded with the adhesion layer corrosive liquid that can corrode adhesion layer 1
1, make multiple be corroded completely separable between unit.The silicon chip eroding adhesion layer 1 is washed by water.
Step c: again inserted by the silicon chip obtained in step b in conductive layer-barrier layer corrosive liquid is right
Conductive layer 3 and barrier layer 2 carry out anticaustic, make the edge of adhesion layer 1 from conductive layer 3 and stop
Layer exposes for 2 times, obtains diode shown in Fig. 3, conductive layer 3 that i.e. adhesion layer 1 is upper and stopping
Layer more than 2 exposes an edge 11.Conductive layer-barrier layer corrosive liquid and the conduction in step a in this step
Layer-barrier layer corrosive liquid is identical, and etching time is shorter than etching time in step a, thus can either make to glue
The edge of attached layer 1 exposes for 2 from conductive layer 3 and barrier layer, and convenient inspection product is the most qualified, again
Will not too much etching conductive layer 3 and barrier layer 2.Then wash by water, and dry.
Step d: the silicon chip processed through step c is checked under mirror, it can be seen that adhesion layer 1
Edge 11 exposes for 2 from conductive layer 3 and barrier layer and is judged as undercutting do not occur.When checking under mirror,
Presence or absence according to this edge 11 judges adhesion layer whether undercutting.This edge 11 exists, explanation
Undercutting does not occurs, and the existence at this edge 11 will not produce impact to the use of product.
In the above-mentioned embodiment of the present invention, total etching time as above institute that anticaustic technique combines
State, be to need design.The corrosion of the first step is the most different from the time used by conventional caustic solution.
Such as: use conventional method to corrode with 7 minutes；And after using the method for embodiment of the present invention, the
Once corrosion was with 5 minutes, and second time corrosion was with 2 minutes.The Schottky-barrier diode of prior art
Preparation technology in, there is no such simple edge of corrosion again and expose the anticaustic of following metal
Technique (in the present invention, referred to as returning of metal is floated).
The multi-layer metal structure of current most Schottky-barrier diodes is: adhesion layer 1 is Ti gold
Belonging to layer, barrier layer 2 is Ni metal level, and conductive layer 3 is Ag metal level.Other is commonly used to also have some
Metal structure, such as: Ti/Ni/AL, V/Ni/Ag, V/Ni/AL etc..
As a example by the diode of Ti/Ni/Ag=2000/3000/30000 angstrom, corrosion step ibid, wherein:
In step a use corrosive liquid be Ni-Ag corrosive liquid, Ni-Ag corrosive liquid be volume ratio be 1:2
Nitric acid and glacial acetic acid.Wherein, etching time is 10 minutes.Nitric acid and ice second in Ni-Ag corrosive liquid
Acid volume ratio can between 1:2～1:3 value.Etching time can also be between 5～10 minutes
Other numerical value.
Corrosive liquid used in step b is Ti corrosive liquid, Ti corrosive liquid be volume ratio be 50:1 water and
Fluohydric acid..Etching time is 30 seconds.Etching time can also be the numerical value between 30～60 seconds, with
Depending on sample is according to the thickness of metal level.
Using the corrosive liquid identical with step a in step c, etching time is 2 minutes.During corrosion
Between shorter than etching time in step a, the edge that can erode Ni metal level and Ag metal level makes Ti
The edge of metal level exposes from the lower section of Ni metal level and Ag metal level, does not results in again Ni metal
Layer and Ag metal level too much corrode.In this step, etching time can also be its between 1～3 minute
Its numerical value.
To leading in the etching time in step a, conductive layer 3 and barrier layer 2 once corroded and step c
The etching time sum of electric layer 3 and barrier layer 2 anticaustic equals to or more than in traditional method conduction
Layer 3 and the etching time on barrier layer 2.
Flushing period in step a1, step b1 and step c1 is 10 minutes.
When multiple layer metal on diode is the structures such as Ti/Ni/Al, V/Ni/Ag, V/Ni/Al, can use
Corresponding corrosive liquid the thickness according to each layer metal level arrange etching time according to the same energy of above-mentioned steps
Obtain the product of structure shown in Fig. 3.
Above-described is only some embodiments of the present invention.For those of ordinary skill in the art
For, without departing from the concept of the premise of the invention, it is also possible to make some deformation and improvement,
These broadly fall into protection scope of the present invention.
Claims (8)
1. diode wet etching method, wherein, comprises the following steps:
A, etching conductive layer and barrier layer, form multiple unit that is corroded；
B, corrode multiple described in the adhesion layer that is corroded between unit；
Be corroded described in c, corrosion the marginal portion of conductive layer of unit and the marginal portion on barrier layer, makes
The edge of the adhesion layer of the described unit that is corroded exposes from conductive layer and barrier layer；And
D, the silicon chip processed through step c is checked, it can be seen that the edge of adhesion layer is from conductive layer
And expose under barrier layer and be judged as that undercutting does not occurs.
Diode wet etching method the most according to claim 1, wherein, described step a bag
Include,
The silicon chip of band multiple layer metal to be corroded applies mask；
In mask silicon chip inserts conductive layer corrosive liquid, the conductive layer in mask window is carried out once
Corrosion；
The silicon chip eroding conductive layer is inserted in the corrosive liquid of barrier layer, to the stop in mask window
Layer once corrodes.
Diode wet etching method the most according to claim 2, wherein, described step c bag
Include:
Silicon chip step b obtained is inserted in conductive layer corrosive liquid, enters the conductive layer in mask window
Row anticaustic；
Silicon chip through conductive layer anticaustic is inserted in the corrosive liquid of barrier layer, to the resistance in mask window
Barrier carries out anticaustic.
Diode wet etching method the most according to claim 1, wherein, step a includes
The silicon chip of band multiple layer metal to be corroded applies mask；
Mask silicon chip is inserted conductive layer-barrier layer corrosion on energy etching conductive layer and barrier layer simultaneously
In liquid, the conductive layer in mask window and barrier layer are once corroded.
Diode wet etching method the most according to claim 4, wherein, step c includes:
The silicon chip obtained in step b is inserted again in conductive layer-barrier layer corrosive liquid, to conductive layer and stop
Layer carries out anticaustic.
Diode wet etching method the most according to claim 5, wherein, corrodes in step c
Time is shorter than etching time in step a.
7. according to the diode wet etching method described in any one of claim 1～6, wherein, institute
State in step b, use the corrosion of adhesion layer corrosive liquid multiple described in the adhesion layer that is corroded between unit.
Diode wet etching method the most according to claim 7, wherein, every time right after corrosion
Silicon chip through corrosion treatmentCorrosion Science is washed by water.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310635376.5A CN103617952B (en) | 2013-11-29 | 2013-11-29 | Diode wet etching method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310635376.5A CN103617952B (en) | 2013-11-29 | 2013-11-29 | Diode wet etching method |
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| Publication Number | Publication Date |
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| CN103617952A CN103617952A (en) | 2014-03-05 |
| CN103617952B true CN103617952B (en) | 2016-08-17 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101710571A (en) * | 2009-12-14 | 2010-05-19 | 天水天光半导体有限责任公司 | Forward and reverse corrosion technology of Schottky diode metal structure |
| CN102915927A (en) * | 2012-10-11 | 2013-02-06 | 杭州立昂微电子股份有限公司 | Wet etching method for metal layer on front surface of high inverse-voltage Schottky diode |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02155232A (en) * | 1988-12-08 | 1990-06-14 | Sanken Electric Co Ltd | Etching method |
| JPH05102524A (en) * | 1991-10-11 | 1993-04-23 | Oki Electric Ind Co Ltd | Semiconductor element |
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- 2013-11-29 CN CN201310635376.5A patent/CN103617952B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101710571A (en) * | 2009-12-14 | 2010-05-19 | 天水天光半导体有限责任公司 | Forward and reverse corrosion technology of Schottky diode metal structure |
| CN102915927A (en) * | 2012-10-11 | 2013-02-06 | 杭州立昂微电子股份有限公司 | Wet etching method for metal layer on front surface of high inverse-voltage Schottky diode |
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