CN105253854B - Method for protecting metal electrode during SOI MEMS sacrificial layer etching - Google Patents
Method for protecting metal electrode during SOI MEMS sacrificial layer etching Download PDFInfo
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- CN105253854B CN105253854B CN201510769731.7A CN201510769731A CN105253854B CN 105253854 B CN105253854 B CN 105253854B CN 201510769731 A CN201510769731 A CN 201510769731A CN 105253854 B CN105253854 B CN 105253854B
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- metal electrode
- soi
- structure sheaf
- etching
- insulating barrier
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Abstract
A method for protecting a metal electrode during SOI MEMS sacrificial layer etching comprises the steps of conducting photoetching on the surface of an SOI silicon wafer structural layer, and manufacturing the metal electrode with the stripping technology; sputtering metallic aluminum on the surface of the SOI silicon wafer structural layer; conducting photoetching on the surface of the SOI silicon wafer structural layer to define an MEMS structural pattern; etching metallic aluminum exposed from the surface of the SOI silicon wafer structural layer; conducting DRIE anisotropic etching deep into an insulating layer by means of the metallic aluminum and a photoresist mask; etching the insulating layer for structure release; removing photoresist on the SOI silicon wafer structural layer through acetone soaking; etching aluminum on the surface of the SOI silicon wafer structural layer; conducting cracking, packaging and testing. According to the method, sacrificial layer etching is achieved by means of a glycerinum, HF and NH4F mixed solution, the metal electrode is protected through aluminum, sacrificial layer etching time can be prolonged remarkably, technology flexibility is improved, and the completeness of the metal electrode is higher.
Description
Technical field
The invention belongs to microelectromechanical systems micro-processing technology field, and in particular to a kind of SOI MEMS sacrificial layers corrosion
When metal electrode guard method.
Background technology
In recent years, SOI technology obtained great development, and using it for MEMS fields has following advantage:Monocrystal silicon structure
Layer has outstanding mechanical property;There is outstanding etching-stop ability as sacrifice layer and insulating barrier using SiO2 oxygen buried layers,
The complete, structure sheaf of the uniform precise control of zero defect, thickness is readily available in MEMS processing;Laminate construction thickness can be improved;Entirely
Silicon structure, it is compatible with CMOS technology, can be integrated with more dense circuit.Currently, SOI MEMS mainly use two kinds of techniques:Front
Release process and back side release process.Front release process is used and etches release aperture simultaneously when structure is etched, using HF solution
The silicon dioxide insulating layer release structure of centre is eroded, the process is simple, processing cost can be reduced, but the dioxy in the middle of corrosion
During SiClx insulating barrier, HF solution easily corrodes metal electrode, causes metal electrode to come off, it is impossible to lead packages.The back side discharges work
Skill removes middle silicon dioxide insulating layer using in the perforate of the soi wafer back side, and the technics comparing is complicated, but can be to avoid
Infringement when removing middle silicon dioxide insulating layer to metal electrode.Therefore, if be avoided that to remove middle silica exhausted
To the infringement of metal electrode during edge layer, SOI fronts release process has good advantage.It is current general by improving the anti-of electrode
Corrosivity and extend the metal electrode corrosion resistant time using photoresist protection, but these methods extension time is shorter.
Therefore, in order to improve the flexibility of technique, in addition it is also necessary to study one kind can further extend metal electrode it is corrosion-resistant when
Between method.
The content of the invention
In view of the shortcomings of the prior art, metal electrode when corroding it is an object of the invention to provide a kind of SOI MEMS sacrificial layers
Guard method, realize the extension of the etching time of sacrifice layer.
The guard method of metal electrode when a kind of SOI MEMS sacrificial layers are corroded, the SOI include structure sheaf, substrate layer with
And the insulating barrier between the structure sheaf and the substrate layer, the guard method comprises the following steps:
S1, SOI silicon chip structure layer surfaces carry out photoetching, using stripping technology make metal electrode;
S2, in the soi wafer structure layer surface splash-proofing sputtering metal aluminium;
S3, in the soi wafer structure sheaf photomask surface, defines MEMS structure figure;
S4, corrodes the metallic aluminium exposed in the soi wafer structure layer surface;
S5, using the metallic aluminium and photoresist to the soi wafer structure sheaf mask, is carved using DRIE anisotropy
Erosion, etching depth to insulating barrier;
S6, corrodes the insulating barrier, discharges structure;
S7, the photoresist above the soi wafer structure sheaf is removed with acetone soak;
S8, the metallic aluminium in corrosion soi wafer structure layer surface;
S9, sliver, encapsulation, test.
Preferably, the metal electrode in the step S1 is TiW/Au metal electrodes.
Preferably, the insulating barrier includes silica.
Preferably, corrosive liquid when corroding the insulating barrier in the step S6 is that silica and aluminium are corroded
Selection is the mixing liquid of glycerine, HF and NH4F than corrosive liquid high, the liquid, and its proportionate relationship is:Glycerine:HF:
40%NH4F=2:1:4。
Preferably, corrosive liquid when corroding the metallic aluminium in soi wafer structure layer surface in the step S8 is phosphorus
Acid or other corrosive liquids small to the metal electrode corrosivity.
Technical scheme has the advantages that:
The application provides a kind of guard method of metal electrode when SOI MEMS sacrificial layers are corroded, by suitable proportioning with
And etching condition control, the mixed liquor of glycerine, HF and NH4F can be caused to the corrosion selection of silica and aluminium than very high,
Using the mixed solution of glycerine, HF and NH4F when SOI MEMS sacrificial layers are corroded, metal electrode is protected using aluminium, significantly extended sacrificial
The etching time of domestic animal layer.Therefore, the technology, can be significantly compared with prior art simultaneously using photoresist and aluminium protection metal electrode
Extend the etching time of sacrifice layer, increase the flexibility of technique, and metal electrode integrality is more preferable.
Brief description of the drawings
Below by drawings and Examples, technical scheme is described in further detail.
Fig. 1 is the SOI wafer piece vertical section schematic diagram used in the inventive method processing.
Fig. 2(a)-(f)It is the inventive method work flow schematic diagram.
Description of reference numerals, the 1. photoetching of 2. insulating barrier of structure sheaf, 3. substrate layer, 4. metal electrode, 5. metallic aluminium 6.
Glue.
Specific embodiment
In order to have a clear understanding of technical scheme, its detailed structure will be set forth in the description that follows.Obviously, originally
Simultaneously deficiency is limited to the specific details that those skilled in the art is familiar with for the specific execution of inventive embodiments.Preferred reality of the invention
Apply example to be described in detail as follows, except these for describing in detail implement exception, there can also be other embodiment.
The present invention is described in further details with reference to the accompanying drawings and examples.
Reference picture 1, material employed in the present embodiment is soi wafer, the SOI include structure sheaf 1, substrate layer 3 with
And 80 μm of 2 structure sheaf of insulating barrier, 1 thickness between the structure sheaf 1 and the substrate layer 3, N-type silicon, resistivity 0.01 ~
0.1 Ω/cm,<110>Crystal orientation;5 μm of 2 thickness of insulating barrier;400 μm of 3 thickness of substrate layer, N-type silicon.
A kind of guard method of metal electrode when SOI MEMS sacrificial layers are corroded, its step includes:
S1, the preparation of metal electrode 4, as shown in Figure 2 a:
(a)Using soi wafer, the figure of metal electrode 4 is defined on the surface of structure sheaf 1 using lithographic equipment;
(b)Titanium tungsten is sputtered with magnetic control platform on silicon chip structure sheaf 1 successively(Tiw), gold(Au), thickness is respectively 300
Å、3000 Å;
(c)Acetone soak is finally used, and the photoresist on silicon chip structure sheaf 1 is removed with supersonic wave cleaning machine, obtain electrode
4。
S2, on the surface of silicon chip structure sheaf 1, sputtering thickness is 1 μm of aluminium 5, as shown in Figure 2 b:
S3, the corrosion of the surfaces of aluminum 5 of silicon chip structure sheaf 1, as shown in Figure 2 c:
(a)Photoetching is carried out on the surface of silicon chip structure sheaf 1, MEMS structure figure is defined;
(b)Using phosphoric acid, nitric acid, acetic acid and water(Phosphoric acid:Nitric acid:Acetic acid:Water=16:1:1:2)Mixing liquid corrosion it is sudden and violent
The aluminium 5 for exposing;
S4, line mask is entered using photoresist 6 and aluminium 5, using DRIE anisotropic etching silicon chips structure sheaf 1, etching depth
To insulating barrier 2, as shown in Figure 2 d;
S5, using the mixing liquid of glycerine, HF and NH4F(Glycerine:HF:NH4F(40%)=2:1:4)Corrosion silica is exhausted
Edge layer 2, discharges structure, as shown in Figure 2 e;
S6, is soaked with acetone soln, the photoresist on the surface of removal silicon chip structure sheaf 1, using phosphoric acid solution corrosion of silicon knot
Aluminium on 1 surface of structure layer, as shown in figure 2f;
S7, sliver, encapsulation, test
In above-described embodiment, the thickness of the thickness, the thickness of insulating barrier 2 and substrate layer 3 of the structure sheaf 1 of SOI silicon chips
Can change as needed, the resistivity of structure sheaf 1 can be adjusted as needed;The metal electrode thickness sputtered on structure sheaf 1
Can adjust as needed;The aluminium thickness sputtered on structure sheaf 1 can be adjusted as needed.
Finally it should be noted that:The above embodiments are merely illustrative of the technical solutions of the present invention rather than its limitations, to the greatest extent
Pipe has been described in detail with reference to above-described embodiment to the present invention, and those of ordinary skill in the art still can be to this hair
Bright specific embodiment is modified or equivalent, these without departing from spirit and scope of the invention any modification or
Equivalent, is applying within pending claims.
Claims (5)
1. a kind of guard method of metal electrode when SOI MEMS sacrificial layers are corroded, the SOI includes structure sheaf(1), substrate layer
(3)And positioned at the structure sheaf(1)With the substrate layer(3)Between insulating barrier(2), it is characterised in that the protection side
Method is comprised the following steps:
S1, in SOI silicon chip structure sheafs(1)Surface carries out photoetching, makes metal electrode using stripping technology(4);
S2, in the soi wafer structure sheaf(1)Surface splash-proofing sputtering metal aluminium(5);
S3, in the soi wafer structure sheaf(1)Photomask surface, defines MEMS structure figure;
S4, corrodes the soi wafer structure sheaf(1)The metallic aluminium exposed on surface(5);
S5, using the metallic aluminium(5)And photoresist(6)To the soi wafer structure sheaf(1)Mask, it is each to different using DRIE
Property etching, etching depth to insulating barrier(2);
S6, corrodes the insulating barrier(2), discharge structure;
S7, the soi wafer structure sheaf is removed with acetone soak(1)The photoresist above(6);
S8, corrodes soi wafer structure sheaf(1)The metallic aluminium on surface(5);
S9, sliver, encapsulation, test.
2. the guard method of metal electrode when SOI MEMS sacrificial layers according to claim 1 are corroded, it is characterised in that institute
The metal electrode (4) stated in step S1 is TiW/Au metal electrodes.
3. the guard method of metal electrode when SOI MEMS sacrificial layers according to claim 1 are corroded, it is characterised in that institute
State insulating barrier(2)Including silica.
4. the guard method of metal electrode when SOI MEMS sacrificial layers according to claim 1 are corroded, it is characterised in that
Corrode the insulating barrier in the step S6(2)When corrosive liquid be to silica and aluminium corrosion selection than corrosive liquid high
Body, the liquid is glycerine, HF and NH4The mixing liquid of F, its proportionate relationship is:Glycerine:HF: 40%NH4F=2:1:4。
5. the guard method of metal electrode when SOI MEMS sacrificial layers according to claim 1 are corroded, it is characterised in that institute
State corrosion soi wafer structure sheaf in step S8(1)The metallic aluminium on surface(5)When corrosive liquid is for phosphoric acid or other are right
The metal electrode(4)The small corrosive liquid of corrosivity.
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CN1949477A (en) * | 2006-11-10 | 2007-04-18 | 北京大学 | Body silicon MEMS and CMOS circuit integrating method capable of removing residual silicon |
CN102367165A (en) * | 2011-08-31 | 2012-03-07 | 华东光电集成器件研究所 | Method for interconnecting electrodes of MEMS (micro electro mechanical system) device based on SOI (silicon-on-insulator) |
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JP2001196381A (en) * | 2000-01-12 | 2001-07-19 | Toyo Kohan Co Ltd | Semiconductor device, metallic laminated board used for formation of circuit on semiconductor, and method for forming circuit |
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CN1949477A (en) * | 2006-11-10 | 2007-04-18 | 北京大学 | Body silicon MEMS and CMOS circuit integrating method capable of removing residual silicon |
CN102367165A (en) * | 2011-08-31 | 2012-03-07 | 华东光电集成器件研究所 | Method for interconnecting electrodes of MEMS (micro electro mechanical system) device based on SOI (silicon-on-insulator) |
Non-Patent Citations (1)
Title |
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The key technologies of SOI micro-accelerometer front release process;Zhang Zhaoyun, et al.;《Key Engineering Materials》;20130715;第562-565卷;第192-193页II. FABRICATION PROCESS-III. KEY TECHNOLOGIES * |
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