CN103513484B - 液晶阵列基板及液晶阵列基板测试方法 - Google Patents
液晶阵列基板及液晶阵列基板测试方法 Download PDFInfo
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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Abstract
一种液晶阵列基板的测试方法,包括步骤:通过扫描线输入关闭信号控制像素区域的第一TFT晶体管以及第二TFT晶体管处于关闭状态;对主区导电片施加第一电压以及对子区导电片施加第二电压;侦测像素区域的主区以及子区的电压是否相同;如果相同,则判定主区以及子区存在短路。本发明还提供一种方便检测像素区主区和子区是否短路的低色偏设计的液晶阵列基板。本发明的液晶阵列基板及液晶阵列基板测试方法,能够较易地检测出该液晶阵列基板是否合格。
Description
技术领域
本发明涉及一种基板,特别涉及一种液晶阵列基板及液晶阵列基板测试方法。
背景技术
目前,液晶电视、液晶显示器等液晶电子装置越来越普遍。一般的液晶电子装置均具有多角度的显示模式,在多角度的显示模式下,由于在不同视角西观察到的液晶分子的指向不同,会导致大视角下观察到的颜色失真。目前,为了改善大视角的颜色失身,在液晶分子像素设计时,会将一个像素分为两个部分,一部分为主(main)区,另一部分为子(sub)区。通过控制该两个区的电压来改善大视角失真。其中,该分为主区以及子区的设计一般称为LCS(Low Color Shift,低色彩偏移)设计。
相应地,为了保证液晶电子装置的质量,对其制造过程中的检测是必不可少的。为提高良率和降低成本,在液晶阵列基板制造完成后,会对其进行电性测试,而对于有LCS设计的像素,常规手法很难检测出主区以及子区的像素短路即不合格,而容易导致面板降等甚至报废。
发明内容
本发明提供一种液晶阵列基板及液晶阵列基板测试方法,能够较易地检测该液晶阵列基板是否合格。
一种液晶阵列基板,包括多个像素区域,该像素区域包括主区、子区以及一调控TFT晶体管,该调控TFT晶体管用于调控主区与子区的电压比而实现低色彩偏移,其中,主区包括第一TFT晶体管以及主区阵列电路公共电极走线,子区包括第二TFT晶体管以及子区阵列电路公共电极走线,其中,该主区阵列电路公共电极走线以及子区阵列电路公共电极走线相互电隔离;其中,第一TFT晶体管的栅极与第一扫描线连接,源极与数据线连接,漏极与像素电极连接且与主区阵列电路公共电极走线耦接,第二TFT晶体管的栅极与第一扫描线连接,源极与数据线连接,漏极与像素电极连接且与子区阵列电路公共电极走线耦接;该调控TFT晶体管的源极与该第二TFT晶体管的漏极电连接,漏极与第一TFT晶体管的漏极耦接,该调控TFT晶体管的栅极与第二扫描线连接。
其中,该液晶阵列基板的所有像素区域中的主区阵列电路公共电极走线均与一主区导电片连接,所有像素区域中的子区阵列电路公共电极走线均与一子区导电片连接。
其中,该第一扫描线用于产生开启或关闭信号控制该第一TFT晶体管导通或关闭,该数据线用于在第一TFT晶体管导通时输入数据驱动信号,而控制主区的显示。
其中,该第一扫描线用于产生开启或关闭信号控制该第二TFT晶体管导通或关闭,该数据线用于在第二TFT晶体管导通时输入数据驱动信号,而控制子区的显示。
一种液晶阵列基板的测试方法,包括步骤:通过扫描线输入关闭信号控制像素区域的第一TFT晶体管以及第二TFT晶体管处于关闭状态;对主区导电片施加第一电压以及对子区导电片施加第二电压;其中,该主区导电片与所有像素区域的主区阵列电路公共电极走线电连接,该子区导电片与所有像素区域的子区阵列电路公共电极走线电连接,其中该主区阵列电路公共电极走线与子区阵列电路公共电极走线相互电隔离;侦测像素区域的主区以及子区的电压是否相同;如果有,则判定主区以及子区存在短路。
其中,该方法还包括步骤:如果像素区域的主区以及子区的电压不相同,则判定主区以及子区不存在短路。
其中,该步骤“对主区导电片施加第一电压以及对子区导电片施加第二电压”包括:对主区导电片施加高电位以及对子区导电片施加零电位。
其中,该步骤“对主区导电片施加第一电压以及对子区导电片施加第二电压”包括:对主区导电片施加零电位以及对子区导电片施加高电位。
其中,该方法还包括:对液晶阵列基板存在短路的像素区域进行维修。
本发明的液晶阵列基板及液晶阵列基板测试方法,通过将主区阵列电路公共电极走线以及子区阵列电路公共电极走线相互电隔离,能够较易地检测出该液晶阵列基板是否合格。
附图说明
图1是本发明一实施方式中的液晶阵列基板的示意图。
图2是本发明一实施方式中的液晶阵列基板中的一个像素区域的具体示意图。
图3是本发明一实施方式中的液晶阵列基板的检测方法的流程图。
具体实施方式
请一并参阅图1及图2,图1为本发明一实施方式中液晶阵列基板100的示意图,图2为液晶阵列基板100包括的一像素区域1的具体示意图。在本发明中,该液晶阵列基板100为低色偏设计的液晶阵列基板。该液晶阵列基板100包括多个呈阵列分布的像素区域1,该像素区域1包括主区11、子区12以及调控TFT晶体管T。其中,主区11包括第一TFT(thin filmtransistor,薄膜晶体管)晶体管T1以及主区阵列电路公共电极走线Main-Acom。子区包括第二TFT晶体管T2以及子区阵列电路公共电极走线Sub-Acom。其中,该调控TFT晶体管T用于调控主区11与子区12的电压比,而实现液晶阵列基板100的低色彩偏移设计。
其中,每一像素区域1中的该第一TFT晶体管T1以及第二TFT晶体管T2的栅极均与第一扫描线111连接。该第一TFT晶体管T1以及第二TFT晶体管T2的源极均与数据线222连接。该第一TFT晶体管T1的漏极与主区阵列电路公共电极走线Main-Acom耦接,该第二TFT晶体管T2的漏极与子区阵列电路公共电极走线Sub-Acom耦接。其中,该第一TFT晶体管T1的漏极还与对应的像素电极P连接,该第二TFT晶体管T2的漏极同样还与对应的像素电极P电连接。
具体的,该调控TFT晶体管T的源极与第一TFT晶体管T1的漏极耦接,漏极与该第二TFT晶体管T2的漏极电连接,该调控TFT晶体管T的栅极与第二扫描线112连接。该调控TFT晶体管T用于调控主区11与子区12的电压比,即调节第一TFT晶体管T1连接的像素电极P以及该第二TFT晶体管T2连接的像素电极P之间的电压比,实现低色彩偏移。由于与本发明改进无关,故不再多加描述。
其中,该主区阵列电路公共电极走线Main-Acom以及子区阵列电路公共电极走线Sub-Acom相互电隔离。
其中,如图1所示,该液晶阵列基板100的所有像素区域1中的主区阵列电路公共电极走线Main-Acom均与一主区导电片MP1连接,所有像素区域1中的子区阵列电路公共电极走线Sub-Acom均与一子区导电片SP1连接。
其中,与该第一TFT晶体管T1以及第二TFT晶体管T2连接的该第一扫描线111用于产生开启或关闭信号控制该第一TFT晶体管T1以及第二TFT晶体管T2导通或关闭。该数据线222用于在第一TFT晶体管T1以及第二TFT晶体管T2导通时输入数据驱动信号,从而分别控制主区11以及子区12的显示。
其中,该液晶阵列基板100还包括其他元件,例如存储电容以及耦合电容等,由于与本发明的改进无关,故未在此赘述。
请一并参阅图3,为本发明的液晶阵列基板100的测试方法的流程图。首先,通过第一扫描线111输入关闭信号控制像素区域1的第一TFT晶体管T2以及第二TFT晶体管T2处于关闭/断开状态(S301)。
然后,对主区导电片MP1施加第一电压以及对子区导电片SP1施加第二电压(S303)。其中,该第一电压不同于该第二电压,在一实施方式中,该第一电压为高电位,第二电压为零电位,对主区导电片MP1施加第一电压以及对子区导电片SP1施加第二电压为:对主区导电片MP1施加高电位以及对子区导电片SP1施加零电位。在其他实施方式中,该第一电压为零电位,该第二电压为高电位,对主区导电片MP1施加第一电压以及对子区导电片SP1施加第二电压为:对主区导电片MP1施加零电位以及对子区导电片SP1施加高电位。
侦测像素区域1的主区11以及子区12的电压是否相同(S305)。
如果不相同,则判定主区11以及子区12不存在短路,即,该液晶阵列基板100合格(S307)。
如果相同,则判定主区11以及子区12存在短路,即该液晶阵列基板100不合格(S309)。
以及对液晶阵列基板100存在短路的像素区域1进行维修(S311)。
从而,本发明中,将该主区阵列电路公共电极走线Main-Acom以及子区阵列电路公共电极走线Sub-Acom相互电隔离,由于主区阵列电路公共电极走线Main-Acom与主区11电连接,而子区阵列电路公共电极走线Sub-Acom又与子区12电连接。从而,若主区11以及子区12不存在短路时,当对主区导电片MP1施加第一电压以及对子区导电片SP1施加第二电压,则该主区11以及子区12将分别具有该第一电压以及第二电压而电压不相同。如果主区11以及子区12存在短路,主区11以及子区12的电压将会相同。其中,该主区11以及子区12是否存在短路是指:主区11的第一TFT晶体管T1连接的像素电极P与子区12的第二TFT晶体管T2连接的像素电极P是否存在短路。
以上具体实施方式对本发明进行了详细的说明,但这些并非构成对本发明的限制。本发明的保护范围并不以上述实施方式为限,但凡本领域普通技术人员根据本发明所揭示内容所作的等效修饰或变化,皆应纳入权利要求书中记载的保护范围内。
Claims (5)
1.一种液晶阵列基板的测试方法,包括步骤:
通过扫描线输入关闭信号控制像素区域的第一TFT晶体管以及第二TFT晶体管处于关闭状态;
对主区导电片施加第一电压以及对子区导电片施加第二电压;其中,该主区导电片与所有像素区域的主区阵列电路公共电极走线电连接,该子区导电片与所有像素区域的子区阵列电路公共电极走线电连接,其中该主区阵列电路公共电极走线与子区阵列电路公共电极走线相互电隔离;
侦测像素区域的主区以及子区的电压是否相同;
如果相同,则判定主区以及子区存在短路。
2.如权利要求1所述的测试方法,其特征在于,还包括步骤:
如果像素区域的主区以及子区的电压不相同,则判定主区以及子区不存在短路。
3.如权利要求1所述的测试方法,其特征在于,该步骤“对主区导电片施加第一电压以及对子区导电片施加第二电压”包括:
对主区导电片施加高电位以及对子区导电片施加零电位。
4.如权利要求1所述的测试方法,其特征在于,该步骤“对主区导电片施加第一电压以及对子区导电片施加第二电压”包括:
对主区导电片施加零电位以及对子区导电片施加高电位。
5.如权利要求1所述的测试方法,其特征在于,该方法还包括:
对液晶阵列基板存在短路的像素区域进行维修。
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