CN103500728B - 一种铜阻挡层和铜晶籽层的形成方法 - Google Patents
一种铜阻挡层和铜晶籽层的形成方法 Download PDFInfo
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- 239000010949 copper Substances 0.000 title claims abstract description 89
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 88
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 88
- 230000004888 barrier function Effects 0.000 title claims abstract description 70
- 238000000034 method Methods 0.000 title claims abstract description 27
- 230000015572 biosynthetic process Effects 0.000 title claims abstract description 14
- 230000008021 deposition Effects 0.000 claims abstract description 19
- 230000008569 process Effects 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000004568 cement Substances 0.000 claims abstract description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 16
- 229910052786 argon Inorganic materials 0.000 claims description 8
- 239000007789 gas Substances 0.000 claims description 8
- 238000012797 qualification Methods 0.000 abstract description 2
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/1052—Formation of thin functional dielectric layers
- H01L2221/1057—Formation of thin functional dielectric layers in via holes or trenches
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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Abstract
本发明涉及一种铜阻挡层和铜晶籽层的形成方法,包括以下步骤,步骤一,去气,对基板上的通孔或沟槽进行去气处理;步骤二,淀积第一铜阻挡层,在基板上的通孔或沟槽中淀积一层铜阻挡层;步骤三,淀积第二铜阻挡层,在上述步骤二的基础上,在所述第一铜阻挡层的表面继续淀积第二铜阻挡层,所述第一铜阻挡层的淀积速率小于所述第二铜阻挡层的淀积速率;步骤四,淀积铜晶籽层,在上述步骤三中的第二阻挡层表面淀积一层铜晶籽层。本发明一种铜阻挡层和铜晶籽层的形成方法中,在淀积铜阻挡层的过程中分两步进行,第一铜阻挡层的淀积速率小于第二铜阻挡层的淀积速率,此种方法可以对薄膜进行有效的应力释放,避免薄膜开裂,从而提高了产品的合格率。
Description
技术领域
本发明涉及一种在半导体技术中铜的互连方法,具体的涉及一种铜阻挡层和铜晶籽层的形成方法。
背景技术
铜的互连采用双大马士革工艺,首先在基板上淀积一定厚度的低介电常数介质材料,并在此材料上刻出通孔和沟槽等,然后在通孔和沟槽中填充铜金属,从而形成金属互连线。铜的填充工艺是由阻挡层和晶籽层的制备与铜的电镀填充共同完成的,而阻挡层和晶籽层的形成是其重要环节,如果淀积不好,会因应力过大而导致薄膜开裂,使器件失效。现有工艺采用去气(degas),阻挡层淀积(TaN),晶籽层淀积(Cu),电镀铜等流程形成,但是其在沟槽底部拐角出常因应力大而导致薄膜开裂,迫切需要解决。
发明内容
本发明所要解决的技术问题是提供一种防止沟槽底部拐角薄膜开裂的铜阻挡层和铜晶籽层的形成方法。
本发明解决上述技术问题的技术方案如下:一种铜阻挡层和铜晶籽层的形成方法,包括以下步骤,
步骤一,去气,对基板上的通孔或沟槽进行去气处理;
步骤二,淀积第一铜阻挡层,在基板上的通孔或沟槽中淀积一层铜阻挡层;
步骤三,淀积第二铜阻挡层,在上述步骤二的基础上,在所述第一铜阻挡层的表面继续淀积第二铜阻挡层,所述第一铜阻挡层的淀积速率小于所述第二铜阻挡层的淀积速率;
步骤四,淀积铜晶籽层,在上述步骤三中的第二阻挡层表面淀积一层铜晶籽层。
本发明的有益效果是:在淀积铜阻挡层的过程中分两步进行,第一铜阻挡层的淀积速率小于第二铜阻挡层的淀积速率,此种方法可以对薄膜进行有效的应力释放,避免薄膜开裂,从而提高了产品的合格率。
在上述技术方案的基础上,本发明还可以做如下改进。
进一步,所述第一铜阻挡层的淀积厚度为50~100埃。
进一步,所述淀积第一铜阻挡层的条件为,上射频功率200~600W,下射频功率为100~400W,通入氩气的流量为30~100毫升每分。
采用上述进一步技术方案的有益效果为:采用上射频功率200~600W,下射频功率为100~400W,通入氩气的流量为30~100毫升每分,可以更好的控制沉积均匀性,使得淀积的效果更好。
进一步,所述第二同阻挡层的淀积厚度为100~200埃。
进一步,所述淀积第二铜阻挡层的条件为,上射频功率300~800W,下射频功率为200~600W,通入氩气的流量为30~100毫升每分。
采用上述进一步技术方案的有益效果为:采用上射频功率300~800W,下射频功率为200~600W,通入氩气的流量为30~100毫升每分,使得淀积第二铜阻挡层的速率大于淀积第一铜阻挡层的速率,可以对薄膜进行有效的应力释放,避免薄膜开裂,提高了铜阻挡层的性能。
附图说明
图1为本发明一种铜阻挡层和铜晶籽层的形成方法的流程图;
图2为本发明一种铜阻挡层和铜晶籽层的形成方法的状态图。
附图中,各标号所代表的部件列表如下:
1、去气,2、淀积第一铜阻挡层,3、淀积第二铜阻挡层,4、淀积铜晶籽层。
具体实施方式
以下结合附图对本发明的原理和特征进行描述,所举实例只用于解释本发明,并非用于限定本发明的范围。
如图1、图2所示,一种铜阻挡层和铜晶籽层的形成方法,首先,去气1,对基板上的通孔或沟槽进行去气处理;然后,淀积第一铜阻挡层2,在基板上的通孔或沟槽中淀积一层铜阻挡层,所述第一铜阻挡层的淀积厚度为50~100埃,所述淀积第一铜阻挡层的条件为,上射频功率200~600W,下射频功率为100~400W,通入氩气的流量为30~100毫升每分;接着,淀积第二铜阻挡层3,以大于淀积第一铜阻挡层的淀积速率在所述第一铜阻挡层的表面继续淀积第二铜阻挡层,所述第二同阻挡层的淀积厚度为100~200埃,所述淀积第二铜阻挡层的条件为,上射频功率300~800W,下射频功率为200~600W,通入氩气的流量为30~100毫升每分;最后,淀积铜晶籽层4,在第二阻挡层表面淀积一层铜晶籽层。
以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (3)
1.一种铜阻挡层和铜晶籽层的形成方法,其特征在于:包括以下步骤,
步骤一,去气,对基板上的通孔或沟槽进行去气处理;
步骤二,淀积第一铜阻挡层,在基板上的通孔或沟槽中淀积一层铜阻挡层;
步骤三,淀积第二铜阻挡层,在上述步骤二的基础上,在所述第一铜阻挡层的表面继续淀积第二铜阻挡层,所述第一铜阻挡层的淀积速率小于所述第二铜阻挡层的淀积速率;
步骤四,淀积铜晶籽层,在上述步骤三中的第二阻挡层表面淀积一层铜晶籽层;
所述淀积第一铜阻挡层的条件为,上射频功率200~600W,下射频功率为100~400W,通入氩气的流量为30~100毫升每分;
所述淀积第二铜阻挡层的条件为,上射频功率300~800W,下射频功率为200~600W,通入氩气的流量为30~100毫升每分。
2.根据权利要求1所述的一种铜阻挡层和铜晶籽层的形成方法,其特征在于:所述第一铜阻挡层的淀积厚度为50~100埃。
3.根据权利要求1所述的一种铜阻挡层和铜晶籽层的形成方法,其特征在于:所述第二铜阻挡层的淀积厚度为100~200埃。
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