CN103426780A - Solder ball array used as height cushion block and solder fixture - Google Patents
Solder ball array used as height cushion block and solder fixture Download PDFInfo
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- CN103426780A CN103426780A CN2012101486342A CN201210148634A CN103426780A CN 103426780 A CN103426780 A CN 103426780A CN 2012101486342 A CN2012101486342 A CN 2012101486342A CN 201210148634 A CN201210148634 A CN 201210148634A CN 103426780 A CN103426780 A CN 103426780A
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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Abstract
The invention relates to a chip bonding method of semiconductor power devices, and particularly provides a method using a solder ball array as a height cushion block and a solder fixture in a bonding procedure of chips. Firstly, an array formed by cushion blocks is arranged in a chip bonding area of the top face of a metal base, a conductive bonding material layer with the thickness not smaller than the height of the cushion blocks coats the chip bonding area, a chip is then bonded to the chip bonding area by using bonding materials, and the bonding materials and the array are located between a back portion metal layer and the top face of the metal base. The solder ball array is used for controlling the thickness of the bonding materials between the back portion metal layer and the top face of the metal base and used for fixing the chip to prevent the chip from rotating on the bonding materials.
Description
Technical field
The present invention relates generally to a kind of pasting method of semiconductor power device, more precisely, the present invention aims to provide in a kind of step of the stickup at chip the method for welded ball array as height cushion block and scolder fixture of utilizing.
Background technology
In the step that chip and lead frame are glued together, the THICKNESS CONTROL of scolder is extremely important to the power device of application slicken solder or solder(ing) paste or conductive silver paste, factors all can have influence on the thickness of scolder, for example the composition of chip back-metal, back-metal roughness, and the surface cleanliness of the quality of wetting, lead frame etc.The complexity just because of the THICKNESS CONTROL of scolder becomes, the various integrity problems that cause are also following.
In the sectional view at vertical direction shown in Figure 1A, chip 102 is secured on the metal base 100 with excellent conductive performance by scolder 101, is coated in the original depth D of scolder 101 of the tool conductivity of pedestal 100 end faces
1, be the desired final thickness of our scripts.But in actual production, through the scolder 101 of reflow process, in the time period in reflow ovens, can be rendered as molten condition, cause the scolder 101 in this time period can be counted as haply a dense liquid solder pond.Once chip 102, be pressed down to this solder pot, chip 102 segment distance that sinks that just may subside downwards in solder pot, as shown in Figure 1B, so that the bottom surface of chip 102 diminishes from the distance of the end face of metal base 100, the actual (real) thickness D of scolder 101
2Be less than the thickness D of expectation
1.One of adverse effect that this phenomenon is brought is exactly, the scolder 101 that is looped around chip 101 peripheries is very easily climbed to the front of chip 102 along its sidewall, further corrode the integrated circuit unit of a positive side or cause short circuit, although this process is relatively slow, the reliability of chip 102 reduces greatly.
In addition, the chip 102 be arranged on solder pot is equivalent to swim in solder pot, in the vertical view shown in Fig. 1 C, if definition is vertical direction perpendicular to the direction on the plane at pedestal 100 places, chip 102 in addition may be in the horizontal direction along angle of clockwise or counterclockwise direction rotation, this phenomenon is the surface tension of self and cause spontaneous, the random action of chip during solder fusing often, and when the size of chip, more hour this phenomenon is just more obviously.Usually, the front of chip 102 is provided with a plurality of metal pad 102a along its periphery, as the electrode of chip or the terminal that carries out the signal transmission with the external world, as fruit chip 102, with respect to the position of pedestal 100, rotation has occurred, the position of those metal pads 102a also just is offset naturally thereupon.In the Bonding processing procedure, often need to be on metal pad 102a some metal lead wires of bonding, if the position offset of metal pad 102a has exceeded the adjusting range of chopper/porcelain mouth (Bonding tool) self, lead-in wire can't be bonded on metal pad 102a normally, or even hit near the insulating passivation layer metal pad 102a end that will go between, this will destroy the circuit unit of passivation layer below, and this is that we are reluctant to see.
The means that current existing technical scheme provides some to address the above problem, for example develop the slicken solder that can improve solder thickness, and its composition and ratio are optimized, as Pb5Sn2.5Ag0.05Te.The chip that perhaps chip design is become to contain metal salient point is implemented face-down bonding again to assist the thickness of controlling scolder.Also have and reach the purpose that prevents the chip rotation etc. in the surface coverage coating of lead frame with the infiltration degree of restriction scolder.Just in view of the cost of these methods is high and effect is not good enough, so proposed summary of the invention hereinafter.
Summary of the invention
The invention provides a kind of pasting method that includes the chip of back-metal layer, this back-metal layer is arranged on the back side of described chip, comprises the following steps:
The consistent cushion block of a plurality of height is set to form an array in the Chip Area of a metal base end face;
Apply in array area the jointing material that a layer thickness value is not less than the conduction of cushion block height value;
Utilize described jointing material by described chip attach the Chip Area to the metal base end face, described jointing material and the described array that consists of cushion block are between the end face of described back-metal layer and metal base;
Wherein, described array is for controlling the thickness of the described jointing material between the end face of back-metal layer and metal base, and on described jointing material, rotates to prevent it for fixing described chip.
Above-mentioned method, described array is arranged to rectangle, triangle, quadrangle, circle, ellipse, fan-shaped or other arbitrary polygons.
Above-mentioned method, the shape of described array and size are all identical with shape and the size of back-metal layer.
Above-mentioned method, the fusing point of described cushion block is higher than the fusing point of jointing material.
Above-mentioned method, is characterized in that, described cushion block is conductor or insulator or semiconductor.
Above-mentioned method, is characterized in that, the material of described cushion block is copper, gold, silver, aluminium, or their alloy.
Above-mentioned method, being shaped as of described cushion block is spherical, elliposoidal, square, cuboid, cylindrical or wedge shape.
Above-mentioned method, described jointing material is conductive silver paste, slicken solder or solder(ing) paste.
Above-mentioned method, before forming described cushion block, also applied the metal coating of one deck gold, silver, nickel or NiPdAu in described Chip Area.
Above-mentioned method, it is characterized in that, the step that forms described array comprises: the mode by Bonding is bonded in described Chip Area to produce a spherical cushion block by the ball-shaped end of lead-in wire, and control lead-in wire and disconnect from cushion block, form described array thereby repeatedly circulate in described Chip Area, to produce a plurality of cushion blocks; And
The wire diameter gone between by change changes the sphere diameter of spherical cushion block, and then adjusts the thickness of the described jointing material between the end face of back-metal layer and metal base.
Above-mentioned method, the back side of described chip is covered by described back-metal layer fully.
Above-mentioned method, the area of described back-metal layer is less than the area of described chip back.
Above-mentioned method, any one cushion block in described array all is limited in being positioned at described back-metal layer upright projection within the view field of metal base end face.
In addition, the present invention also provides a kind of power semiconductor, comprising:
One metal base, wherein, be provided with the array that the cushion block consistent by a plurality of height forms in the Chip Area of this metal base end face;
A layer thickness value that is arranged on array area is not higher than the jointing material of the conduction of cushion block height value; And
Utilize described jointing material to affix to a chip of described Chip Area, the back side of described chip is provided with one deck back-metal layer, and described jointing material and described array are between the end face of described back-metal layer and metal base;
Wherein, the thickness of the described jointing material between the end face of described antenna array control back-metal layer and metal base, and support described chip and rotate on described jointing material to prevent it.
Above-mentioned power semiconductor, the back side of described chip is covered by described back-metal layer fully, and for example described chip is MOSFET.
Above-mentioned power semiconductor, the area of described back-metal layer is less than the area of described chip back, and for example described chip is the gallium arsenide semiconductor device, and for example chip is gallium arsenide diode.
Above-mentioned power semiconductor, any one cushion block in described array all is limited in being positioned at described back-metal layer upright projection within the view field of metal base end face.
Those skilled in the art reads the detailed description of following preferred embodiment, and, with reference to after accompanying drawing, the advantage of these and other aspects of the present invention undoubtedly will be apparent.
The accompanying drawing explanation
With reference to appended accompanying drawing, to describe more fully embodiments of the invention.Yet appended accompanying drawing only, for explanation and elaboration, does not form limitation of the scope of the invention.
Figure 1A-1C is the paster mode of the chip in background technology.
Fig. 2 A-2F is a kind of pasting method disclosed in this invention.
Fig. 3 A-3D is another all pasting method disclosed in this invention.
Fig. 4 A-4B is a kind of method schematic diagram for preparing welded ball array.
Embodiment
Referring to Fig. 2 A-2B, the lead frame do not illustrated includes a plurality of basic base units, any one basic base unit all at least includes a metal base 200, consider high power consumption and the high-cooling property of power device, generally there is good heat-conductivity conducting performance so be applied to the metal base 200 of power device, as usually prepared by the alloy of copper or copper but be not limited to this.Invention spirit based on the application, before carrying out the paster step, will be in advance a plurality of cushion blocks 204 be set being positioned at the Chip Area (mark) that metal base 200 end faces comprise, and the height of these cushion blocks 204 is basic identical, as shown in Fig. 2 B, so formed an array just all cushion blocks 204 are combined.Although illustrated this array roughly is rendered as rectangle, this array can also be arranged to different plane geometric shapes in fact, as triangle, quadrangle, circle (ellipse) shape, fan-shaped or other arbitrary polygons.Optionally, before forming cushion block 204, can apply the metal coating of layer in Chip Area, as the coating of gold, silver, nickel, NiPdAu etc., but be not limited to this, other anti-oxidation metal or alloy of not enumerating are also applicable as coating.
In the present invention, the material of cushion block 204 has multiple choices, various electric conducting materials for example, and first-selected copper, be secondly gold, silver, aluminium, or be other metals or their alloy.It is worth mentioning that, the material of cushion block 204 is selected, and depends primarily on the kind of the jointing material 201 be applied in mount technology.The fusing point of General Requirements cushion block 204 wants the fusing point of specific adhesion material 201 slightly high, even if jointing material 201 is when melted by heat like this, cushion block 204 also can bear certain high temperature and not be melted, and still has the physical support effect.In addition, because jointing material 201 has possessed conductive effect, so the material of cushion block 204 can also be semi-conducting material or insulating material, as long as its fusing point is higher than the fusing point of jointing material 201.
In the present invention, the shape of cushion block 204 also has multiple choices, typical as spherical, now array is a common alleged ball grid array (Ball Grid Array), but different is, ball grid array now is not for being welded on the metal pad (I/O pad) as chip port, but is arranged on the end face of metal base 200.And the pattern of cushion block 204 can also be for elliposoidal, just (length) square body, cylindrical, wedge shape etc.
Referring to Fig. 2 C, chip 202 is generally rectilinear power device, electric current flows to its back side or contrary by its front, so be provided with the back-metal layer 202c that forms bottom electrode at the back side of chip 202, and also be provided with the metal pad that some form its top electrodes at the back side with chip 202 on relative its front.One type of chip 202 shown in Fig. 2 D is exactly metal oxide semiconductor field effect tube, its front is provided with metal pad 202a, the 202b that forms its top electrodes, they are grid and the source electrode of corresponding formation chip respectively, and the back-metal layer 202c at its back side forms its drain electrode.In this execution mode, the back side of chip 202 is covered by back-metal layer 202c fully, and the area of back-metal layer 202c equals the area at chip 202 back sides.As shown in Figure 2 C, after obtaining aforesaid array, just on array area, apply the jointing material 201 of one deck conduction, this layer of jointing material 201 be coated on cushion block 204 around.As long as control shape and the size of array well, just also Hen is easily controlled for the shape of jointing material 201 and size thereupon.Consideration based on bonding firmness between chip and metal base, the thickness of this layer of jointing material of General Requirements 201 is at least the height that is not less than cushion block 204, in practice may be slightly larger than the height value of cushion block 204, this layer of jointing material 201 just can just cover cushion block 204 like this, and can be full of jointing material 201 fully between the end face of guarantee back-metal layer 202c and metal base 200.
Just can carry out the paster step afterwards, chip 202 is affixed to Chip Area, also utilize jointing material 201 that back-metal layer 202c is pasted on metal base 200, this array and jointing material 201 are just just between the end face of back-metal layer 202c and metal base 200.The kind of jointing material 201 has multiple choices, as conductive silver paste, slicken solder, leaded or unleaded solder(ing) paste etc., it should be noted that after completing the paster step, slicken solder, solder(ing) paste is follow-up also needs through reflow step, and conductive silver paste is follow-up also to be needed through baking procedure.Among this paster step, if the thickness of jointing material 201 is a bit larger tham the height of cushion block 204, chip 202 can slightly have sinking in the jointing material 201 of melting, until its back-metal layer 202c touches cushion block 204 and is supported by it.If the thickness of jointing material 201 almost is equal to the height of cushion block 204, back-metal layer 202c will directly touch cushion block 204.Therefore after reflow step, the thickness of jointing material 201 is higher than the height of cushion block 204, and the height of itself and cushion block 204 is roughly suitable.
In the embodiment of Fig. 2 C-2D, because the back side of chip 202 is not containing the electricity sensitizing range of exposing, so allow in theory a part of cushion block 204 in array to exceed to back-metal layer 202c upright projection outside the view field of metal base 200 end faces (plane at definition metal base 200 places is horizontal plane), allow in other words the part of jointing material 201 slightly to exceed to this view field, but at one preferably in execution mode, the shape of the array that setting cushion block 204 forms and size and back-metal layer 202c are in full accord, for example for both, be rectangle, the area of jointing material 201 equals the area 204a of array haply.The effect of this array, just be on the one hand to prevent chip 202 excessive convergence in initial paster step or follow-up reflow step, and effectively control the thickness D of the jointing material 201 between the end face of back-metal layer 202c and metal base 200
3, in fact, this one-tenth-value thickness 1/10 is also the distance between back-metal layer 202c and metal base 200 end faces, equals the height of cushion block 204.On the other hand, array is also for locking jointing material 201, and the tension force while weakening its fusing affects, and utilizes the suction-operated between back-metal layer 202c and jointing material 201 to fix chip 202, prevents that it from rotating on jointing material 201.
Structure shown in Fig. 2 D, it is a part that has intercepted a basic base unit of lead frame, this basic base unit comprises that is roughly long (just) square body metal base 200, and comprise by reclinate connecting elements 212a and be connected to a pin 212 on metal base 200, also comprise be arranged near metal base 200 but the pin 211,213 that disconnects with metal base 200.Be positioned at the same side that conplane pin 211,212,213 is arranged on metal base 200, be arranged in a row, and pin 211,213 is separately positioned on the both sides that pin 211 is relative and is parallel to pin 211.Pin 211,212,213 and metal base 200 lay respectively on upper and lower two planes of staggering.Pin 211,213 also includes respectively weld zone 211', the 213' near metal base 200, and weld zone 211' extends a segment distance on the direction of the fillet that is parallel to metal base 200 and connecting elements 212a, thereby perpendicular to pin 211.And weld zone 213' extends a segment distance on the direction that is parallel to metal base 200 and the fillet of connecting elements 212a, thus perpendicular to pin 213, with acquisition have area increased weld zone 211', 213' and for accepting the welding of lead-in wire.In addition, basic base unit also comprises the fin 218 directly be connected on metal base 200, and it is arranged on the opposite side of pin 211,212,213, for auxiliary heat dissipation with respect to metal base 200.This metal base 200, pin 211,212,213 usually directly are connected on lead frame or by company's muscle of anticipating out not shown in the figures and are connected on lead frame.Can metal pad 202a be electrically connected to weld zone 211' by bonding wire 220a upper, and utilize many bonding wire 220b that metal pad 202b is electrically connected on weld zone 213'.Just can carry out plastic package process known in the field after this, as shown in Fig. 2 E-2F, utilize the plastic packaging material of epoxy resin and so on, formation cover pedestal 200 end faces and by chip 202, weld zone 211', 213', bonding wire 220a, 220b the plastic-sealed body 230 in being coated on, the bottom surface relative with the end face of metal base 200 be outer being exposed at outside plastic-sealed body 230, as the heat radiation approach.Pin 211,212,213 all extends to outside plastic-sealed body, thereby forms a plug-type packaging 250.
Must note, be example although foregoing is the lead frame for preparing TO220 encapsulation, and the application is carried out to general explaination explanation, and this does not also mean that the present invention is only applicable to this packing forms.The position that is arranged near the pin number of metal base 200 and their layouts all can suitably be adjusted according to the kind of chip, and Fig. 2 D and follow-up Fig. 3 C just illustrate but are not construed as limiting the invention for the application is narrated merely.
Be in some special chip types, in gallium arsenide semiconductor device as special as some, the size of its back-metal layer often is less than the size of chip self, so that its back side includes the electricity sensitizing range of exposing sometimes.In the embodiment shown in Fig. 3 A-3B, be provided with the back-metal layer 302c that forms its bottom electrode at the back side of chip 302, be provided with the metal pad (not shown) that forms its top electrodes in the front of chip 302.Be different from chip 202, the back side of chip 302 is not covered by back-metal layer 302c fully, and now the area of plane of back-metal layer 302c is less than the backside area of chip 302.Back side vertical view from the chip 302 shown in Fig. 3 A, the zone line at chip 302 back sides is coated with back-metal layer 302c, the back side of chip 302 also comprises an annular region 302d who is not covered by back-metal layer 302c, and it is looped around the outside of back-metal layer 302d periphery.Based on this, require annular region 302d can not touch jointing material 301, to avoid it directly to be electrically connected to metal base 300, cause unnecessary short circuit, the prepared semiconductor device by the gallium arsenide semiconductor substrate, this demand is just arranged, typically as gallium arsenide diode etc.
In this execution mode, do not allow outside any one cushion block 304 in array exceeds to back-metal layer 302c upright projection to the view field of metal base 200 end faces, the shared area of plane of the array consisted of cushion block 304 must not surpass the area of back-metal layer 304c.Specifically, this array be limited in being positioned at back-metal layer 302c under, and can not extend to the below of the annular region 302d do not covered by back-metal layer 302c at chip 302 back sides, jointing material 301 is adsorbed onto to the position of contact annular region 302d to avoid some cushion block 304.As long as the dosage of jointing material 301 is suitable, the scope of its coating does not exceed to array area, for example just be covered with whole array area or only be coated in the part zone of array area, jointing material 201 is just gathered within the regional extent of array self by array absorption, be equivalent to define the scope of jointing material 201, this characteristic is even more important during in molten condition at it.According to above-mentioned restriction, can ensure that the array and the jointing material 301 that consist of cushion block 304 do not touch annular region 302d.Shown in Fig. 3 B-3C is another advantage place with cushion block 304, periphery place at this layer of jointing material 301, the tension force of its sidewall surfaces makes its surface be tending towards shrinking minimumly, so that its sidewall surfaces is inwardly recessed, form the sidewall 301a with arcwall face, this has further been avoided jointing material 301 to touch annular region 302d.At the later use plastic packaging material, form in the plastic packaging step of plastic-sealed body 330 as shown in Figure 3 D, plastic packaging material also is filled among the gap between the end face of annular region 302d and metal base 300, is equivalent to make annular region 302d to obtain and insulate.
Except the cushion block of various shapes being directly installed on Chip Area, Fig. 4 A-4B has also showed that another prepares the method for array.As shown in Figure 4 A, in Bonding (Wire bonding) equipment, widely used porcelain mouth (chopper) 310 inside are provided with the pipeline of hollow, are commonly called as capillary, with the bonding wire 3040 that holds metal material.The part that bonding wire 3040 stretches out from the pipeline of porcelain mouth 310, the oxyhydrogen flame that can have by bonding apparatus self or discharge system produce this part fusing that electric spark will stretch out, and be molten state, it is under surperficial tension force effect, just solidifiable becomes the spherical of a standard, produce a ball-shaped end 3040', the sphere diameter of this ball-shaped end 3040' is generally 2-3 times of lead-in wire 3040 wire diameters.In the step of Bonding, the ball-shaped end 3040' that bonding apparatus guiding porcelain mouth 310 will go between 3,040 one ends is bonded on the Chip Area of metal base 300, and utilize porcelain mouth 310 to apply certain pressure to ball-shaped end 3040', promote phase counterdiffusion (being the ball bonding) between generation plastic deformation and atom between ball-shaped end 3040' and metal base 300, thereby ball-shaped end 3040' is transformed into to one, be welded to cushion block 304(on metal base 300 as Fig. 4 A).Control rapidly more afterwards that porcelain mouth 310 lifts and, away from metal base 300, disconnect from cushion block 304 to pull bonding wire 3040.So circulation, just can obtain the array that comprises a plurality of cushion blocks 304 shown in Fig. 4 B, can think that cushion block 304 is still spherical (although its shape is not too regular) haply.Prepare by this way array, can further change by the wire diameter that changes bonding wire 3040 sphere diameter of cushion block 304, to reach the purpose of controlling jointing material 301 thickness.Certainly, spherical end 3040' is a typical example, and if needed, ball-shaped end 3040' can also be substituted by the end construction of other arbitrary shapes.
Above, by explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, foregoing invention has proposed existing preferred embodiment, but these contents are not as limitation.For a person skilled in the art, after reading above-mentioned explanation, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.In claims scope, scope and the content of any and all equivalences, all should think and still belong to the intent and scope of the invention.
Claims (20)
1. a pasting method that includes the chip of back-metal layer, this back-metal layer is arranged on the back side of described chip, it is characterized in that, comprises the following steps:
The consistent cushion block of a plurality of height is set to form an array in the Chip Area of a metal base end face;
Apply in array area the jointing material that a layer thickness value is not less than the conduction of cushion block height value;
Utilize described jointing material by described chip attach the Chip Area to the metal base end face, described jointing material and the described array that consists of cushion block are between the end face of described back-metal layer and metal base;
Wherein, described array is for controlling the thickness of the described jointing material between the end face of back-metal layer and metal base, and on described jointing material, rotates to prevent it for fixing described chip.
2. the method for claim 1, is characterized in that, described array is arranged to rectangle, triangle, quadrangle, circle, ellipse, fan-shaped or arbitrary polygon.
3. the method for claim 1, is characterized in that, the shape of described array and size are all identical with shape and the size of back-metal layer.
4. the method for claim 1, is characterized in that, the fusing point of described cushion block is higher than the fusing point of jointing material.
5. the method for claim 1, is characterized in that, described cushion block is conductor or insulator or semiconductor.
6. the method for claim 1, is characterized in that, the material of described cushion block is copper, gold, silver, aluminium, or their alloy.
7. the method for claim 1, is characterized in that, being shaped as of described cushion block is spherical, elliposoidal, square, cuboid, cylindrical or wedge shape.
8. the method for claim 1, is characterized in that, described jointing material is conductive silver paste, slicken solder or solder(ing) paste.
9. the method for claim 1, is characterized in that, before forming described cushion block, also in described Chip Area, applied the metal coating of one deck gold, silver, nickel or NiPdAu.
10. the method for claim 1, it is characterized in that, the step that forms described array comprises: the mode by Bonding is bonded in described Chip Area to produce a spherical cushion block by the ball-shaped end of lead-in wire, and control lead-in wire and disconnect from cushion block, form described array thereby repeatedly circulate in described Chip Area, to produce a plurality of cushion blocks; And
The wire diameter gone between by change changes the sphere diameter of spherical cushion block, and then adjusts the thickness of the described jointing material between the end face of back-metal layer and metal base.
11. the method for claim 1, is characterized in that, the back side of described chip is covered by described back-metal layer fully.
12. the method for claim 1, is characterized in that, the area of described back-metal layer is less than the area of described chip back.
13. method as claimed in claim 12, is characterized in that, any one cushion block in described array all is limited in being positioned at described back-metal layer upright projection within the view field of metal base end face.
14. a power semiconductor, is characterized in that, comprising:
One metal base, wherein, be provided with the array that the cushion block consistent by a plurality of height forms in the Chip Area of this metal base end face;
A layer thickness value that is arranged on array area is not higher than the jointing material of the conduction of cushion block height value; And utilize described jointing material to affix to a chip of described Chip Area, and the back side of described chip is provided with one deck back-metal layer, and described jointing material and described array are between the end face of described back-metal layer and metal base;
Wherein, the thickness of the described jointing material between the end face of described antenna array control back-metal layer and metal base, and support described chip and rotate on described jointing material to prevent it.
15. a kind of power semiconductor as claimed in claim 14 is characterized in that the back side of described chip is covered by described back-metal layer fully.
16. a kind of power semiconductor as claimed in claim 14, the area of described back-metal layer is less than the area of described chip back.
17. a kind of power semiconductor as claimed in claim 16, is characterized in that, any one cushion block in described array all is limited in being positioned at described back-metal layer upright projection within the view field of metal base end face.
18. a kind of power semiconductor as claimed in claim 15, is characterized in that, described chip is MOSFET.
19. a kind of power semiconductor as claimed in claim 16, is characterized in that, described chip is the gallium arsenide semiconductor device.
20. a kind of power semiconductor as claimed in claim 19, is characterized in that, described chip is gallium arsenide diode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012101486342A CN103426780A (en) | 2012-05-14 | 2012-05-14 | Solder ball array used as height cushion block and solder fixture |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012101486342A CN103426780A (en) | 2012-05-14 | 2012-05-14 | Solder ball array used as height cushion block and solder fixture |
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| CN103426780A true CN103426780A (en) | 2013-12-04 |
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| CN2012101486342A Pending CN103426780A (en) | 2012-05-14 | 2012-05-14 | Solder ball array used as height cushion block and solder fixture |
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| CN103874342A (en) * | 2014-03-26 | 2014-06-18 | 杭州华三通信技术有限公司 | Circuit board assembling method and circuit board |
| CN105304575A (en) * | 2015-10-23 | 2016-02-03 | 华天科技（西安）有限公司 | Packaging structure adopting cushion block to prevent inclination of fingerprint sensing chip and manufacturing method |
| CN105529308A (en) * | 2015-11-09 | 2016-04-27 | 华天科技（西安）有限公司 | Fingerprint chip package structure with cushion block employing underfill technology and manufacturing method |
| CN106134018A (en) * | 2014-03-31 | 2016-11-16 | Ipg光子公司 | High-power laser diode method for packing and laser diode module |
| IT202000008119A1 (en) * | 2020-04-16 | 2021-10-16 | St Microelectronics Srl | Production of integrated devices from lead-frames with spacers |
| CN113782454A (en) * | 2021-09-07 | 2021-12-10 | 西安微电子技术研究所 | Method for realizing lead bonding on surface of lead frame without pre-plating layer |
| CN113793809B (en) * | 2021-09-07 | 2023-05-30 | 西安微电子技术研究所 | Method for improving bonding force between lead frame and plastic package material |
| US11916353B2 (en) | 2020-04-16 | 2024-02-27 | Stmicroelectronics (Grenoble 2) Sas | Electronic chip support device and corresponding manufacturing method |
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Application publication date: 20131204 |