CN103389438B - A kind of for the welding detection system with cpu pcb and method - Google Patents
A kind of for the welding detection system with cpu pcb and method Download PDFInfo
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Abstract
The present invention relates to a kind of for the welding detection system with cpu pcb and method, native system comprises PC, test circuit board and power supply that debugging software is housed, and test circuit board is connected with PC and circuit-under-test plate respectively by RS232 with JTAG.When test starts, debugged program is downloaded in RAM or ROM of CPU by JTAG, the order detected according to address wire detection, data line detection, address date line is run, the data detected are judged, take different data processing methods, draw circuit-under-test plate rosin joint respectively or chip internal is unsettled and the address wire of short circuit and data line, whether there is the situation of address wire or data line short circuit or rosin joint at serial port terminal display circuit-under-test plate simultaneously, and provide specifically which root and go wrong.Native system contributes to detecting fast and positioning circuit plate problem, improves production efficiency, reduces operation easier, applied widely, has promotional value.
Description
Technical field
The present invention relates to circuit board detecting technology, particularly relate to a kind of for the welding detection system with cpu pcb and method, specifically a kind of testing circuit plate that is used for has the system and method for no problem with or without solder failure and chip.
Background technology
Along with the progress of technology, electronic equipment is now to volume miniaturization and the development of function diversification target, and volume miniaturization is that pin-pitch is more and more less because BGA package technology is increasingly mature.Function diversification refers to, and circuit board has one or more processor, has one or more data storage device (such as NANDFLASH, SDRAM, DDRRAM) and some peripherals (such as network interface card, XR16L788 etc.), as shown in Figure 2.Be core with CPU between the said equipment, carry out data interaction by data/address line.Because this kind of chip has more address wire and data line, circuit board has some pads, in welding process, if have one or multidigit generation rosin joint or short circuit, monoblock circuit board will be caused to use, and because number of pins is many, and the encapsulation of chip mostly is BGA package, pin is invisible, adds the difficulty of investigation fault.Therefore, for the circuit board of this band CPU, how quick position is realized to its Welding Problems and detects, just become the problem that scientific and technical personnel are badly in need of researching and developing.
Summary of the invention
The object of the invention is quick position welding circuit board and chip problem, reduce operation easier in process of production, enhance productivity, and research and develop a kind of for the welding detection system with cpu pcb and method.
The technical scheme that the present invention takes is: a kind of for the welding detection system with cpu pcb, it is characterized in that, comprise PC, test circuit board and power supply that debugging software is housed, test circuit board comprises TTL-RS232 change-over circuit, reset circuit, jtag interface circuit and power-switching circuit, wherein, reset circuit is connected with jtag interface circuit, test circuit board is connected with PC and circuit-under-test plate with jtag interface circuit respectively by TTL-RS232 change-over circuit, and power supply is connected with circuit-under-test plate by power-switching circuit.
Of the present invention a kind of for the welding detection method with cpu pcb, it is characterized in that, first cpu clock, debug serial port initialization, then according to the order of address wire detection-phase, data line detection-phase, address date line detection-phase, the data detected are judged, take different data processing methods, draw circuit-under-test plate rosin joint respectively or chip internal is unsettled and the address wire of short circuit and data line.
The detecting step of address wire detection-phase of the present invention is:
Step one. first detect circuit-under-test plate rosin joint or the unsettled address wire of chip internal, in address zero write non-zero;
Step 2. read address 1 place data;
Step 3. whether equally with the non-zero of writing address zero judge to read address 1 place data, if equal, then illustrate have rosin joint or the unsettled address wire of chip internal, then carry out data processing and record result, data processing method is: in all addresses be 1 position be defined as rosin joint or the unsettled address wire of chip internal, and send PC to show data processed result, get rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled address wire of chip internal;
If step 4. judge that the non-zero reading address 1 place's data and writing address zero is unequal, then this address is moved to left one, then judge whether address overflows;
Step 5. if address is not overflowed, then read this place's data, and judges that whether these place's data read are equal with the non-zero of writing address zero; If equal, continue to perform step 3, if unequal, continue to perform step 4, so circulate, until address is overflowed;
If step 6. judge that address is overflowed, continue the address wire detecting circuit-under-test plate short circuit, write non-zero in address 1;
Step 7. writing address is moved to left, moves to left one at every turn, read this address date, and judge that whether the address date read is equal with the non-zero of writing address 1;
Step 8. if the non-zero of the address date and the writing address 1 that read is unequal, then judges whether address overflows, if address spilling, then returns step 7 and carries out next round cycle detection;
Step 9. if address is not overflowed, and address continues to move to left one, then judges whether address overflows, if also do not overflow, then in this address write non-zero, then returns step 7, until initial epicycle address is overflowed;
If step 10. judge that the address date read is equal with the non-zero of writing address 1, the address wire having short circuit is then described, then data processing is carried out, data processing method is: by start address with read the address wire that the position being respectively 1 in the address of data is defined as short circuit, and send PC to show data processed result, return step 8 simultaneously, continue to judge whether address overflows;
Step 11. if initial epicycle address is overflowed, and the cycle detection completed in the address detected stage is described, and send PC to show by completing Detection Information.
The detecting step of data line detection-phase of the present invention is:
Step one. in address zero write data 0;
Step 2. read address zero place data, and judge whether the data read are not equal to 0, if be not equal to 0, then illustrate have rosin joint or the unsettled data line of chip internal, then carry out data processing and record result, data processing method is: be the position of 1 in the data of all readings, is defined as rosin joint or the unsettled data line of chip internal, and send PC to show data processed result, get rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled data line of chip internal;
If step 3. judge that the data read equal 0, then in nonzero address write data 1;
Step 4. read nonzero address data, and judge whether equal with the data write at nonzero address, if equal, the data line having short circuit is then described, then carry out data processing, data processing method is: the position in the data of write being 1 is become 0, the position for 0 is become 1, again the position being respectively 1 in the data of the new data obtained and reading is defined as the data line of short circuit, and send PC to show data processed result;
If step 5. judge that the nonzero address data read are unequal with the data write at nonzero address, the nonzero address data then read move to left one, then judge whether the data after being shifted overflow, if the data from overflow after displacement, the cycle detection completed in the Data Detection stage are described, and send PC to show by completing Detection Information, otherwise, continue these data of write at nonzero address, then return step 4, with this cycle detection, until data from overflow.
The detecting step of address date line detection-phase of the present invention is:
Step one. write data 0 in address 1;
Step 2. read address 1 data, judge whether these data are not equal to 0, if be not equal to 0, the address date line of short circuit is described, then data processing is carried out, data processing method is: the position being respectively 1 in the address date of the data read and write is defined as the address date line of short circuit, and send PC to show data processed result;
If step 3. judge that reading address 1 data equals 0, then writing address moves to left one, and judge whether writing address overflows, if overflow, the cycle detection completed in address date line detection-phase is described, and send PC to show by completing Detection Information, if do not have address to overflow, then in this address write data 0, then return step 2, with this cycle detection, until data from overflow.
The beneficial effect that the present invention produces is: adopt native system and method, testing circuit plate Welding Problems and chip whether can have problem simply and effectively, accurately navigate to which root pin and go wrong, facilitate the reparation of problem.After welding circuit board completes, only need check that whether input cpu clock is normal, then use JTAG download program entered CPU inside and run, detect and determine that circuit board produces address wire and the data line of fault, serial port terminal shows failure cause.The present invention contributes to detecting fast and positioning circuit plate problem, improves production efficiency, reduces detection operation easier, applied widely, has promotional value.
Accompanying drawing explanation
Fig. 1 is detection system catenation principle block diagram of the present invention;
Fig. 2 is that in Fig. 1, circuit-under-test plate typically forms schematic diagram;
Fig. 3 is test circuit board TTL-RS232 change-over circuit and power-switching circuit schematic diagram;
Fig. 4 is test circuit sheet reset circuit and jtag interface circuit theory diagrams;
Fig. 5 detects overall flow block diagram;
Fig. 6 is address wire overhaul flow chart in Fig. 5;
Fig. 7 is data line overhaul flow chart in Fig. 5;
Fig. 8 is address wire and data line overhaul flow chart in Fig. 5.
Embodiment
For a more clear understanding of the present invention, describe in detail below in conjunction with drawings and Examples: as shown in Figure 1, a kind ofly comprise for the welding detection system with cpu pcb the PC that debugging software is housed, test circuit board and power supply, test circuit board comprises TTL-RS232 change-over circuit, reset circuit, jtag interface circuit and power-switching circuit, wherein, reset circuit is connected with jtag interface circuit, test circuit board is connected with PC and circuit-under-test plate with jtag interface circuit respectively by TTL-RS232 change-over circuit, power supply is connected with circuit-under-test plate by power-switching circuit.
Test circuit board is the intermediate hub of native system test data line and address wire short circuit or rosin joint.The function of the conversion of interface, the conversion of level and reset circuit-under-test plate is realized by test circuit board.It forms primarily of jtag interface circuit, TTL-RS232 change-over circuit, reset circuit and power circuit.Jtag interface completes the connection of PC end and tested circuit board, and data-signal is pulled upward to high level, ensure the communication reliability under longer distance, TTL-RS232 change-over circuit realizes the conversion of logic level to standard 232 level, and reset circuit realizes restarting function to the reset of tested circuit board CPU.
As shown in Figure 2, Fig. 2 is the circuit diagram of a kind of common band CPU.This circuit is master control with CPU, and periphery comprises random access memory ram, readablely writes FLASH, the peripherals of other band data/address line, such as Ethernet etc.Ensureing that memory device (RAM, FLASH) is working properly, is the prerequisite that whole circuit board can work.
CPU generally carries the RAM of certain capacity or erasable ROM, this detection method operates on CPU, RS232 signal is converted to by such as SP3232 chip, content can show on PC, making in this way can simple and effective positioning welding problem, whether also can identify chip used complete handy, here complete, and readablely write if referring to chip internal pin without short circuit without open circuit.
Be connected to by tested circuit board on test circuit board, test circuit board is connected with PC by RS232.When test starts, run PC and hold debugging software, the debugged program of this method is downloaded into by JTAG in RAM or ROM of CPU processor, then run, after detection terminates, whether can there is the situation of address wire or data line short circuit or rosin joint at serial port terminal display circuit-under-test board chip, and provide specifically which root and go wrong.
As shown in Figure 3, the TTL-RS232 change-over circuit of native system test circuit board adopts SP3238EE chip N1, connector P1 and connector XP1, 2 pin of SP3238EE chip N1 and 4 pin, 5 pin and 6 pin are connected electric capacity C2 and electric capacity C5 respectively, 19 pin of SP3238EE chip N1 are connected with 20 pin and are connected with one end of electric capacity C1 afterwards, power supply vdd terminal is connect after connection, 3 pin of SP3238EE chip N1 are connected rear ground connection with electric capacity C4 with the other end of electric capacity C1 respectively by electric capacity C3 with 7 pin, 16 pin of SP3238EE chip N1 connect 2 pin of connector XP1, 17 pin of SP3238EE chip N1 connect 3 pin of connector XP1 by resistance R1, 1 pin of SP3238EE chip N1 is connected rear ground connection with 18 pin, the 5 pin ground connection of XP1, 13 pin of SP3238EE chip N1 and 15 pin connect 1 pin and 3 pin of connector XP1 respectively, the 2 pin ground connection of connector XP1, 14 pin of SP3238EE chip N1 connect power supply vdd terminal.
The power-switching circuit of native system test circuit board adopts MIC39100 chip N3, + 6v power supply is connect after the positive pole of 1 pin of MIC39100 chip N3 and one end of electric capacity C9 and electrochemical capacitor C8 is connected, 3 pin of MIC39100 chip N3 and the positive pole of electrochemical capacitor C10, power supply vdd terminal is connect after one end of electric capacity C11 and one end of resistance R6 connect, the other end of resistance R6 is connected with the negative pole of light emitting diode, the positive pole of light emitting diode, the other end of electric capacity C11, the negative pole of electrochemical capacitor C10, 4 pin of MIC39100 chip N3 and 2 pin, ground connection after the other end of electric capacity C9 and the negative pole of electrochemical capacitor C8 connect.
As shown in Figure 4, the reset circuit of native system test circuit board adopts MAX706ASESA chip N2,1 pin of MAX706ASESA chip N2 connects one end of keyswitch S1 and one end of electric capacity C7 respectively, 2 pin of MAX706ASESA chip N2 are connected with one end of electric capacity C6, difference ground connection after the other end of the other end of keyswitch S1, the other end of electric capacity C6, electric capacity C7 and 3 pin of MAX706ASESA chip N2 are connected with 4 pin.
The jtag interface circuit of native system test circuit board adopts two connectors, be respectively connector XP2 and connector XP3, 15 pin of connector XP2 connect 7 pin of MAX706ASESA chip N2 after being connected with 15 pin of connector XP3, 13 pin of connector XP2 are connected with 13 pin of connector XP3, 11 pin of connector XP2 are connected with 11 pin of connector XP3, 9 pin of connector XP2 are connected with 9 pin of connector XP3, 1 pin of connector XP2 and 1 pin of connector XP3 connect power supply vdd terminal respectively, 4 pin of connector XP2 and connector XP3, 6 pin, 8 pin, 10 pin, 12 pin, 14 pin, 16 pin, 18 pin, 20 pin connect respectively, difference ground connection after connecting.
PC is connected by RS232 and USB-JTAG with test circuit board, and RS232 receives testing result and sends order.Use the hyper terminal that windows carries, the pattern of setting is baud rate 115200bps, eight bit data position, position of rest, no parity and a Flow Control.Testing software is downloaded into the CPU of circuit-under-test plate by USB-JTAG and runs, and after having detected, result can show in hyper terminal.
As shown in Figure 5, continuous print testing process is divided into three phases by the present invention in welding detection method: address wire detection-phase, data line detection-phase and address date line detection-phase.First cpu clock, debug serial port initialization.I.e. initialization cpu clock, the enable and serial ports attribute of external unit read-write.Then according to the order of address wire detection-phase, data line detection-phase, address date line detection-phase, the data detected are judged, take different data processing methods, draw circuit-under-test plate rosin joint respectively or chip internal is unsettled and the address wire of short circuit and data line.After address wire detection-phase detects, the address wire of record rosin joint, then data line detection-phase is entered, this stage does not use and has detected that the address wire of rosin joint or short circuit is as the foundation detected, after data line detection-phase detects, the data line of record rosin joint, then carry out the detection in address date line stage, this stage does not use the address wire and data line that have detected rosin joint or short circuit as the foundation detected.
As shown in Figure 6, the detecting step of address wire detection-phase of the present invention is:
Step one: first detect circuit-under-test plate rosin joint or the unsettled address wire of chip internal, write any non-zero at address zero place.
Step 2: read address 1 place data; Address, by 1, moves to left one at every turn, after latch address, then reads the data of this address.
Step 3: whether equally with the non-zero of writing address zero judge to read address 1 place data, if equal, then illustrate have rosin joint or the unsettled address wire of chip internal, then carry out data processing and record result, data processing method is: in all addresses be 1 position be defined as rosin joint or the unsettled address wire of chip internal, and send PC to show data processed result, getting rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled address wire of chip internal, preparing for detecting address wire short circuit.
Step 4: the non-zero reading address 1 place's data and writing address zero if judge is unequal, then this address is moved to left one, then judge whether address overflows.
Step 5: if address is not overflowed, then read this place's data, and judge that whether these place's data read are equal with the non-zero of writing address zero; If equal, continue to perform step 3, if unequal, continue to perform step 4, so circulate, until address is overflowed.
Step 6: if judge that address is overflowed, continues the address wire detecting circuit-under-test plate short circuit, writes non-zero in address 1.
Step 7: writing address is moved to left, moves to left one at every turn, reads this address date, and judges that whether the address date read is equal with the non-zero of writing address 1;
Step 8: if the non-zero of the address date read and writing address 1 is unequal, then judge whether address overflows, if address is overflowed, then returns step 7 and carries out next round cycle detection.
Step 9: if address is not overflowed, address continues to move to left one, then judges whether address overflows, if also do not overflow, then in this address write non-zero, then returns step 7, until initial epicycle address is overflowed.
Step 10: if judge that the address date read is equal with the non-zero of writing address 1, the address wire having short circuit is then described, then data processing is carried out, data processing method is: by start address with read the address wire that the position being respectively 1 in the address of data is defined as short circuit, and send PC to show data processed result, return step 8 simultaneously, continue to judge whether address overflows; Above start address refers to that the non-zero address of writing address 1 and address move to left after one, in the address of this address write non-zero.
Step 11: if initial epicycle address is overflowed, the cycle detection completed in the address detected stage is described, and send PC to show by completing Detection Information.
As shown in Figure 7, the detecting step of data line detection-phase of the present invention is:
Step one: in address zero write data 0.
Step 2: read address zero place data, and judge whether the data read are not equal to 0, if be not equal to 0, then illustrate have rosin joint or the unsettled data line of chip internal, then carry out data processing and record result, data processing method is: be the position of 1 in the data of all readings, is defined as rosin joint or the unsettled data line of chip internal, and send PC to show data processed result, get rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled data line of chip internal.
Step 3: the data read equal 0 if judge, then in nonzero address write data 1; To nonzero address write data 1, then data move to left one, write this nonzero address, until stop write after data from overflow.After each write, then sense data.
Step 4: read nonzero address data, and judge whether equal with the data write at nonzero address, if equal, the data line having short circuit is then described, then carry out data processing, data processing method is: the position in the data of write being 1 is become 0, the position for 0 is become 1, again the position being respectively 1 in the data of the new data obtained and reading is defined as the data line of short circuit, and send PC to show data processed result.
Step 5: if judge that the nonzero address data read are unequal with the data write at nonzero address, then the nonzero address data of reading are moved to left one, then judge whether the data after being shifted overflow, if the data from overflow after displacement, the cycle detection completed in the Data Detection stage are described, and send PC to show by completing Detection Information, otherwise, continue these data of write at nonzero address, then return step 4, with this cycle detection, until data from overflow.
As shown in Figure 8, the detecting step of address date line detection-phase of the present invention is:
Step one: write data 0 in address 1.Address 1 place write data 0, each circulation address moves to left one, then writes data 0, until address is overflowed.
Step 2: read address 1 data, judge whether these data are not equal to 0, if be not equal to 0, the address date line of short circuit is described, then data processing is carried out, data processing method is: the position being respectively 1 in the address date of the data read and write is defined as the address date line of short circuit, and send PC to show data processed result.
Step 3: read address 1 data if judge and equal 0, then writing address moves to left one, and judge whether writing address overflows, if overflow, the cycle detection completed in address date line detection-phase is described, and send PC to show by completing Detection Information, if do not have address to overflow, then in this address write data 0, then return step 2, with this cycle detection, until data from overflow.
In order to keep simplifying of code, can put in internal memory limited in CPU, this trace routine does not use built-in function.
According to the above description, the solution of the present invention can be realized in conjunction with art technology.
Claims (1)
1. one kind for the welding detection method with cpu pcb, it is characterized in that, first cpu clock, debug serial port initialization, then according to the order of address wire detection-phase, data line detection-phase, address date line detection-phase, the data detected are judged, take different data processing methods, draw circuit-under-test plate rosin joint respectively or chip internal is unsettled and the address wire of short circuit and data line;
The detecting step of described address wire detection-phase is:
Step one. first detect circuit-under-test plate rosin joint or the unsettled address wire of chip internal, in address zero write non-zero;
Step 2. read address 1 place data;
Step 3. whether equally with the non-zero of writing address zero judge to read data, if equal, then illustrate have rosin joint or the unsettled address wire of chip internal, then carry out data processing and record result, data processing method is: in all addresses be 1 position be defined as rosin joint or the unsettled address wire of chip internal, and send PC to show data processed result, get rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled address wire of chip internal;
If step 4. judge that the non-zero reading data and writing address zero is unequal, then this address is moved to left one, then judge whether address overflows;
Step 5. if address is not overflowed, then read this place's data, and judges that whether these place's data read are equal with the non-zero of writing address zero; If equal, continue to perform step 3, if unequal, continue to perform step 4, so circulate, until address is overflowed;
If step 6. judge that address is overflowed, continue the address wire detecting circuit-under-test plate short circuit, write non-zero in address 1;
Step 7. writing address is moved to left, moves to left one at every turn, read this address date, and judge that whether the address date read is equal with the non-zero of writing address 1;
Step 8. if the non-zero of the address date and the writing address that read is unequal, then judges whether address overflows, if address spilling, then returns step 7 and carries out next round cycle detection;
Step 9. if address is not overflowed, and address continues to move to left one, then judges whether address overflows, if also do not overflow, then in this address write non-zero, then returns step 7, until initial epicycle address is overflowed;
If step 10. judge that the address date read is equal with the non-zero of writing address 1, the address wire having short circuit is then described, then data processing is carried out, data processing method is: by start address with read the address wire that the position being respectively 1 in the address of data is defined as short circuit, and send PC to show data processed result, return step 8 simultaneously, continue to judge whether address overflows;
Step 11. if initial epicycle address is overflowed, and the cycle detection completed in the address detected stage is described, and send PC to show by completing Detection Information;
The detecting step of described data line detection-phase is:
Step one. in address zero write data 0;
Step 2. read address zero place data, and judge whether the data read are not equal to 0, if be not equal to 0, then illustrate have rosin joint or the unsettled data line of chip internal, then carry out data processing and record result, data processing method is: be the position of 1 in the data of all readings, is defined as rosin joint or the unsettled data line of chip internal, and send PC to show data processed result, get rid of in follow-up detecting step simultaneously and detect rosin joint or the unsettled data line of chip internal;
If step 3. judge that the data read equal 0, then in nonzero address write data 1;
Step 4. read nonzero address data, and judge whether equal with the data write at nonzero address, if equal, the data line having short circuit is then described, then carry out data processing, data processing method is: the position in the data of write being 1 is become 0, the position for 0 is become 1, again the position being respectively 1 in the data of the new data obtained and reading is defined as the data line of short circuit, and send PC to show data processed result;
If step 5. judge that the nonzero address data read are unequal with the data write at nonzero address, then the nonzero address data of reading are moved to left one, then judge whether the data after being shifted overflow, if the data from overflow after displacement, the cycle detection completed in the Data Detection stage are described, and send PC to show by completing Detection Information, otherwise, continue these data of write at nonzero address, then return step 4, with this cycle detection, until data from overflow;
The detecting step of described address date line detection-phase is:
Step one. write data 0 in address 1;
Step 2. read address 1 data, judge whether these data are not equal to 0, if be not equal to 0, the address date line of short circuit is described, then data processing is carried out, data processing method is: the position being respectively 1 in the address date of the data read and write is defined as the address date line of short circuit, and send PC to show data processed result;
If step 3. judge that reading address 1 data equals 0, then writing address moves to left one, and judge whether writing address overflows, if overflow, the cycle detection completed in address date line detection-phase is described, and send PC to show by completing Detection Information, if do not have address to overflow, then in this address write data 0, then return step 2, with this cycle detection, until data from overflow.
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| CN104698366A (en) * | 2015-03-26 | 2015-06-10 | 中国人民解放军空军工程大学 | Method for monitoring connection failure fault of BGA (Ball Grid Array) packaging solder joint |
| CN108490334A (en) * | 2018-03-09 | 2018-09-04 | 北京凌宇智控科技有限公司 | Chip pin welds detection method and detection device |
| CN108983077B (en) * | 2018-05-30 | 2021-03-19 | 中国铁道科学研究院集团有限公司 | Circuit board test system and test method based on JTAG link |
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| CN101853051A (en) * | 2010-04-30 | 2010-10-06 | 株洲南车时代电气股份有限公司 | Man-machine interaction unit device |
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