CN103311224B - 接触测试结构和方法 - Google Patents
接触测试结构和方法 Download PDFInfo
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- CN103311224B CN103311224B CN201310014921.9A CN201310014921A CN103311224B CN 103311224 B CN103311224 B CN 103311224B CN 201310014921 A CN201310014921 A CN 201310014921A CN 103311224 B CN103311224 B CN 103311224B
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- conductive contacts
- weld pad
- testing weld
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- pad
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- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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Abstract
提供一种用于测试电连接的系统和方法。在一个实施例中,可以制造一个或者多个浮置焊盘与凸块下金属化结构电连接。然后可以执行测试以经过浮置焊盘测量凸块下金属化结构的电特性以便测试缺陷。取而代之,传导连接可以形成于凸块下金属化上,并且可以对传导连接和凸块下金属化一起执行测试。
Description
技术领域
本发明涉及半导体领域,更具体地,涉及接触测试结构和方法。
背景技术
一般而言,半导体管芯可以使用在半导体管芯与衬底之间的电连接件来附接到诸如印刷电路板的衬底(或者甚至附接到另一半导体管芯或者半导体晶片)。电连接件可以例如使用凸块下金属化来物理和电连接到半导体管芯。这种凸块下金属化可以提供电接触点,从而向在半导体管芯与衬底之间的电连接件施加的电信号具有通向位于半导体管芯内部的半导体结构的电路径。
然而,电连接件的放置及其与凸块下金属化的电连接很可能并不完美。可能由于电连接件与凸块下金属化的未对准、可能在电连接件或者凸块下金属化内出现的裂缝、凸块下金属化的分层以及诸多其它问题而出现与放置有关的问题。如果出现这些问题,则可能出现电连接件与凸块下金属化之间的电接触件的完全或者部分损失。这样的损失可能造成电连接件完全或者部分无法向半导体管芯传送信号、电源或者接地连接并且可能造成半导体管芯的效用完全或者部分损失,因为它可能不能如我们所期望地解决可能发生的问题。同样地,电连接件与凸块下金属化之间的问题可能会导致丢弃半导体芯片并且需要完全重新制造半导体管芯,以便获得执行所需功能的可用半导体器件。
发明内容
为解决上述问题,本发明提供了一种半导体器件,包括:传导接触,位于衬底上,传导接触具有第一宽度;以及第一浮置测试焊盘,与衬底上的传导接触相邻,其中,第一浮置测试焊盘通过衬底电连接到传导接触,第一浮置测试焊盘具有与第一宽度不同的第二宽度。
该半导体器件还包括第二浮置测试焊盘,位于衬底上,其中,第二浮置测试焊盘通过衬底电连接到传导接触和第一浮置测试焊盘,第二浮置测试焊盘具有与第一宽度不同的第三宽度。
其中,第一浮置测试焊盘、第二浮置测试焊盘和传导接触在第一方向上对准。
其中,第一浮置测试焊盘和传导接触沿着第一方向对准,而第二浮置测试焊盘和传导接触沿着与第一方向不同的第二方向对准。
其中,传导接触位于衬底的边角处。
其中,传导接触包括第一材料,第一浮置测试焊盘包括第一材料。
该半导体器件还包括传导凸块,位于传导接触上。
该半导体器件还包括后钝化互连件,后钝化互连件通过衬底将第一浮置焊盘电连接到传导接触。
此外,还提供了一种半导体器件,包括:第一传导接触,位于衬底上;第二传导接触,位于衬底上,第二传导接触与第一传导接触相距第一距离;以及第一测试焊盘,与第一传导接触相距第二距离,第一距离小于第二距离,第一测试焊盘小于第一传导接触;以及互连件,位于衬底内,互连件将第一测试焊盘电连接到第一传导接触。
该半导体器件还包括第二测试焊盘,位于衬底上,与第一传导接触相距第三距离,第三距离小于第一距离,其中,互连件将第二测试焊盘电连接到第一传导接触。
其中,第一测试焊盘、第二测试焊盘和第一传导接触在第一方向上对准。
其中,第一测试焊盘和第一传导接触在第一方向上对准,而第二测试焊盘和第一传导接触在与第一方向垂直的第二方向上对准。
其中,第一测试焊盘相对于第一传导接触与第二传导接触之间的线发生偏移。
该半导体器件还包括传导凸块,位于第一传导接触件上。
此外,还提供了一种制造半导体器件的方法,方法包括:在衬底上形成互连件;在互连件上形成钝化层;穿过钝化层形成第一开口和第二开口,以露出互连件的第一部分和互连件的第二部分;在第一开口中形成与互连件接触的传导接触;以及在第二开口中形成与互连件接触的第一测试焊盘,第一测试焊盘具有比传导接触更小的横向尺寸。
其中,同时执行形成传导接触的步骤和形成第一测试焊盘的步骤。
该方法还包括在传导接触上形成传导凸块。
还包括使用第一测试焊盘来测试传导接触。
该方法还包括:穿过钝化层形成第三开口,以露出互连件的第三部分;以及在第三开口中形成与互连件接触的第二测试焊盘。
其中,第一测试焊盘和传导接触在第一方向上对准,而第二测试焊盘和传导接触在与第一方向垂直的第二方向上对准。
附图说明
为了更完整理解本发明及其优点,现在参照与以下附图结合的下文描述,其中:
图1示出了根据一个实施例的具有凸块下金属化、第一浮置焊盘和第二浮置焊盘的半导体管芯;
图2示出了根据一个实施例的可以用于通过第一浮置焊盘和第二浮置焊盘测试凸块下金属化的测试装置;
图3示出了根据一个实施例的第一接触连接的形成;
图4A-图4B示出了根据一个实施例的可以用于通过第一浮置焊盘和第二浮置焊盘测试第一接触连接的测试装置;
图5示出了根据一个实施例的半导体管芯上的非线性布置中的第一接触连接、第一浮置焊盘和第二浮置焊盘的布局;以及
图6示出了根据一个实施例的半导体管芯上的非线性偏移(offset)布置中的第一接触连接、第一浮置焊盘和第二浮置焊盘的布局。
在不同图中的对应编号和符号除非另有说明,则一般均是指对应部分。附图被绘制成清晰示出实施例的相关方面而未必按比例绘制。
具体实施方式
下文具体讨论实施例的实现和运用。然而应当理解,实施例提供可以在广泛多种具体背景中体现的诸多适用概念。讨论的具体实施例仅举例说明用于实现和运用实施例的具体方式而未限制实施例的范围。
将在具体上下文中(即用于半导体管芯的焊球连接)关于实施例描述实施例。然而实施例也可以应用于其它类型的电连接。
现在参照图1,示出了半导体管芯100的部分,包括半导体衬底101、金属化层103、接触焊盘105、第一钝化层107、后钝化互连件(PPI)111、第二钝化层113、凸块下金属化层(UBM)115、第一浮置焊盘117和第二浮置焊盘119。半导体衬底101可以包括绝缘体上硅(SOI)衬底的有源层或者掺杂或未掺杂层、体硅。一般而言,SOI衬底包括半导体材料(比如硅、锗、硅锗、SOI、绝缘体上硅锗(SGOI)或者它们的组合)层。可以使用的其它衬底包括多层衬底、梯度衬底或者混合取向衬底。
有源器件(未示出)可以形成于半导体衬底101上。如本领域普通技术人员将认识到的那样,诸如电容器、电阻器、电感器等的多种有源器件可以用来生成用于半导体管芯100的设计的所需结构和功能要求。可以在半导体衬底的表面内或者在半导体衬底的表面上使用任何适当方法来形成有源器件。
金属化层103形成于半导体衬底101和有源器件上并且设计成连接各种有源器件以形成功能电路。尽管在图1中示出为单层,金属化层103还可以由电介质(例如,低k电介质材料)和传导材料(例如,铜)的交替层形成,并且可以通过任何适当工艺(比如沉积、波形花纹、双波形花纹等)来形成。在一个实施例中,可以有通过至少一个层间电介质层(ILD)从半导体衬底101分离的四个金属化层,但是金属化层103的精确数目取决于半导体器件100的设计。
接触焊盘105可以形成于金属化层103上并且与金属化层103电接触。接触焊盘105可以包括铝,但是备选地可以使用其它材料(比如铜)。可以使用沉积工艺(比如溅射)来形成接触焊盘105,以形成材料层(未示出),然后可以通过适当工艺(比如光刻掩模和蚀刻)去除材料层的部分,以形成接触焊盘105。然而,任何其它适当工艺可以用来形成接触焊盘105。接触焊盘105可以被形成为具有在约0.5μm与约4μm之间(比如约1.45μm)的厚度。
第一钝化层107可以在金属化层103和接触焊盘105上方形成于半导体衬底101上。第一钝化层107可以由一种或者多种适当电介质材料(比如氧化硅、氮化硅、低k电介质(比如碳掺杂氧化物)、极低k电介质(比如有孔碳掺杂二氧化硅)、这些材料的组合等)制成。第一钝化层107可以通过比如化学气相沉积(CVD)这样的工艺(但是可以利用任何适当工艺)来形成并且可以具有在约0.5μm与约5μm之间(比如约9.25)的厚度。
在已经形成第一钝化层107之后,可以去除第一钝化层107的部分以露出下层接触焊盘105的至少一部分。露出接触焊盘105允许在接触焊盘105与PPI 111之间的接触(下文进一步讨论)。可以使用适当去除工艺(比如化学机械平坦化(CMP)工艺或者光刻掩模和蚀刻工艺)来露出接触焊盘105。然而,备选地,可以使用用于露出接触焊盘105的部分的任何适当工艺。
在已经露出接触焊盘105之后,PPI 111可以被形成为与接触焊盘105电接触并且可以被形成为沿着第一钝化层107延伸。可以利用PPI 111作为重新分布层以允许电连接到接触焊盘105的UBM 115放置于半导体管芯100上的任何所需位置而不是使UBM 115的位置限于直接在接触焊盘105上方的区域。备选地,PPI 111可以被形成为在UBM 115、第一浮置焊盘117和第二浮置焊盘119之间的电路路径(下文进一步讨论)。
在一个实施例中,可以通过起初由适当形成工艺(比如CVD或者溅射)形成钛铜合金的种子层(在图1中未单独示出)来形成PPI 111。然后,可以形成光刻胶(未示出)以覆盖种子层,并且可以图案化光刻胶以露出种子层的位于希望PPI 111所在之处的那些部分。
一旦已经形成和图案化光刻胶,可以通过沉积工艺(比如镀制)在种子层上形成传导材料(比如铜)。传导材料可以被形成为具有在约1μm与约10μm之间(比如约5μm)的厚度和沿着第一钝化层107的在约5μm与约300μm之间(比如约15μm)的宽度。然而,尽管讨论的材料和方法适合形成传导材料,但是这些材料仅为示例。任何其它适当材料(比如A1Cu或者Au)或者任何其它适当形成工艺(比如CVD或者PVD)可以备选地用来形成PPI 111。
一旦已经形成传导材料,可以通过适当去除工艺(比如灰化)去除光刻胶,其中,增加光刻胶的温度直至光刻胶分解并且可以被去除。此外,在去除光刻胶之后,可以通过例如使用传导材料作为掩模的适当蚀刻工艺去除种子层的未被光刻胶覆盖的那些部分。
一旦已经形成PPI 111,可以形成第二钝化层113以保护PPI 111和其它下层结构。第二钝化层113可以由聚合物(比如聚酰亚胺)形成或者备选地可以由与第一钝化层107相似的材料(例如氧化硅、氮化硅、低k电介质、极低k电介质、这些材料的组合等)形成。第二钝化层113可以被形成为具有在约2μm与约15μm之间(比如约5μm)的厚度。
在已经形成第二钝化层113之后,可以通过去除第二钝化层113的部分以露出下层PPI 111的部分而穿过第二钝化层113产生接触开口108、第一浮置焊盘开口121和第二浮置焊盘开口123。接触开口108允许在UBM115与PPI 111之间的接触,第一浮置焊盘开口121允许在第一浮置焊盘117与PPI 111之间的接触,并且第二浮置焊盘开口123允许在第二浮置焊盘119与PPI 111之间的接触(下文参照图3进一步讨论)。可以使用适当光刻掩模和蚀刻工艺来形成接触开口108、第一浮置焊盘开口121和第二浮置焊盘开口123,但是可以备选地使用任何适当工艺用于形成接触开口108、第一浮置焊盘开口121和第二浮置焊盘开口123。
一旦已经通过第二钝化层113露出PPI 111,UBM 115、第一浮置焊盘117和第二浮置焊盘119可以被形成为与PPI 111电接触。UBM 115、第一浮置焊盘117和第二浮置焊盘119可以包括三个传导材料层(比如钛层、铜层和镍层)。然而,本领域普通技术人员应理解,有适于形成UBM 115、第一浮置焊盘117和第二浮置焊盘119的诸多适当材料和层布置(比如铬/铬-铜合金/铜/金布置、钛/钛钨/铜布置或者铜/镍/金布置)。可以用于UBM115、第一浮置焊盘117和第二浮置焊盘119的任何适当材料或者材料层完全包含于实施例的范围内。
通过在第二钝化层113之上并且分别沿着接触开口108、第一浮置焊盘开口121和第二浮置焊盘开口123的内部形成每个层来创建UBM 115、第一浮置焊盘117和第二浮置焊盘119。可以使用镀制工艺(比如电镀)来执行每层的形成,但是可以根据所需材料备选地使用其它形成工艺(比如溅射、蒸发或者PECVD工艺)。UBM 115、第一浮置焊盘117和第二浮置焊盘119可以被形成为具有在约0.7μm与约10μm之间(比如约5μm)的厚度。一旦已经形成所需层,然后可以通过适当光刻掩模和蚀刻工艺去除层的部分以去除不需要的材料并且留下所需形状(比如圆形、八边形、方形或者矩形形状(但是可以备选地形成任何所需形状))的UBM 115、第一浮置焊盘117和第二浮置焊盘119。
在一个实施例中,UBM 115可以形成为圆形并且可以具有在约150μm与约300μm之间(比如约240μm)的第一直径d1。第一浮置焊盘117和第二浮置焊盘119也可以形成为圆形并且可以具有大于约15μm而又也少于或者等于第一直径d1的第二直径d2。通过形成第一浮置焊盘117和第二浮置焊盘119具有与UBM 115相同或者更小的尺寸,可以节省半导体管芯100上的实际占用区,从而允许制造更小和更高效的半导体管芯。
例如,对于倒装芯片或者WLCSP产品,限制芯片区域大小的同时期望凸块及其相应UBM的数目大到足以实现所有I/O功能。如果第一浮置焊盘117和第二浮置焊盘119较大,则设计者可以牺牲用于凸块的空间。然而,通过保持第一浮置焊盘117和第二浮置焊盘119具有与UBM 115相似或者更小的尺寸,设计者可以在放置UBM 115及其相应凸块时具有更多空间和更多灵活性。
例如,在UBM 115具有第一直径d1为240μm的圆形的一个实施例中,第一浮置焊盘117和第二浮置焊盘119可以形成为第二直径d2在约15μm与约240μm之间的圆形。在一个备选实施例中,第一浮置焊盘117和第二浮置焊盘119可以成形为方形,而每个方形具有在约10μm与约200μm之间(比如约50μm)相等的长度和宽度。
第一浮置焊盘117(和位于UBM 115的相对侧上的第二浮置焊盘119)可以从UBM 115分离以便在测试期间让电流穿过PPI 111。在一个实施例中,第一浮置焊盘117和在UBM 115的相对侧上的第二浮置焊盘119可以从UBM 115分离大于约10μm(比如在约10μm与约100μm之间)的第一距离d3。然而,这些尺寸旨在举例说明而非限制,因为可以备选地使用任何适当性质和大小。
然而,如本领域普通技术人员将认识到的那样,尽管上文描述对其中使用相同工艺和相同材料来同时形成UBM 115、第一浮置焊盘117和第二浮置焊盘119的工艺进行描述,但是这旨在仅为一个示例实施例而并非旨在限制实施例。可以备选地利用任何适当工艺和材料的组合(比如在与第一浮置焊盘117和第二浮置焊盘119分开的工艺中并且由与第一浮置焊盘117和第二浮置焊盘119不同的材料形成UBM 115)。这些和所有其它组合完全旨在包含在实施例的范围内。
图2示出了利用第一浮置焊盘117和第二浮置焊盘119对UBM 115和PPI 111的电性质的测试。在一个实施例中,可以使用包括第一端子203、第二端子205、第三端子207和第四端子209的测试装置201来执行测试。在一个实施例中,第一端子203可以被放置成与第一浮置焊盘117接触,第二端子205可以被放置成与UBM 115接触,由此完成从第二端子205经过UBM 115、PPI 111、第一浮置焊盘117并且回到第一端子203的电路。此外,第三端子207可以被放置成与UBM 115接触而第四端子209可以被放置成与第二浮置端子119接触,由此完成从第三端子207经过UBM 115、PPI 111、第二浮置焊盘119并且回到第四端子209的电路。
利用这些连接,可以向第二端子205(连接到UBM 115)施加电流,并且经过UBM 115、PPI 111和第一浮置焊盘117的电流改变可以由第一端子203接收并且由测试装置201测量。类似地,可以向第三端子207(连接到UBM 115)施加电压,并且经过UBM 115、PPI 111和第二浮置焊盘119的电压改变可以由第四端子209接收并且由测试装置201测量。然后可以分析分别在UBM 115与第一浮置焊盘117和第二浮置焊盘119之间的电流和电压的改变,以确定在UBM 115或者PPI 111内是否有可能对UBM115和PPI 111的总体电性能有影响的缺陷。如果缺陷已经出现,则可以停止加工以便避免附加成本。
然而,如本领域普通技术人员将认识到的那样,利用两个浮置焊盘(第一浮置焊盘117和第二浮置焊盘119)来测量电流和电压二者的四端子测试仅为一个实施例而并非旨在限制实施例。可以备选地利用任何使用任意数目的浮置焊盘(比如仅使用第一浮置焊盘117而未制造第二浮置焊盘119或者备选地除了第一浮置焊盘117和第二浮置焊盘119之外还制造和使用附加浮置焊盘)的适当测试。浮置焊盘数目、端子数目和将对UBM 115和PPI 111运行的所需测试的任何组合完全旨在包含在实施例的范围内。
图3示出了将第一接触连接件301放置到UBM 115上。第一接触连接件301可以例如是接触凸块,并且可以包括比如锡这样的材料或者其它适当材料(比如银、无铅的锡或者铜)。在第一接触连接件301为锡焊凸块的一个实施例中,可以通过最初由这样的常用方法(比如蒸发、电镀、印刷、焊料传送、球放置等)将锡层形成至例如约100μm的厚度来形成第一接触连接件301。一旦锡层已经形成于结构上,可以执行回流以便将材料成形为所需凸块形状。
然而,描述的实施例并非旨在限于如上文描述的接触凸块。可以备选地利用任何其它适当接触连接(比如铜连接、传导柱(比如铜柱)或者任何其它类型的连接)。所有适当连接完全旨在包含在实施例的范围内。
图4A示出了利用上文参照图2描述的测试装置201的第一端子203、第二端子205、第三端子207和第四端子209对第一接触连接件301、UBM115和PPI 111的测试。在一个实施例中,可以通过将第二端子205和第三端子207放置成与第一接触连接件301电接触、将第一端子203放置成与第一浮置焊盘117电接触并且通过将第四端子209放置成与第二浮置焊盘119电接触来测试第一接触连接件301、UBM 115和PPI 111。通过构成这些连接,电路可以由从第二端子205、第一接触连接件301、UBM 115、PPI111、第一浮置焊盘117到第一端子203形成。类似地,另一电路可以由从第三端子207、第一接触连接件301、UBM 115、PPI 111、第二浮置焊盘119到第四端子209形成。
利用这些连接,可以向第二端子205施加电流,并且它经过第一接触连接件301、UBM 115、PPI 111和第一浮置焊盘117到第一端子203的改变可以由测试装置201测得。类似地,可以向第三端子207施加电压,并且它经过第一接触连接件301、UBM 115、PPI 111和第二浮置焊盘119到第四端子209的改变可以由测试装置201测得。然后,可以分析分别在第一接触连接件301与第一浮置焊盘117和第二浮置焊盘119之间的电流和改变改变以确定在第一接触连接件301、UBM 115或者PPI 111内是否有可能对第一接触连接件301、UBM 115和PPI 111的总体电性能有影响的缺陷。如果缺陷已经出现,则可以停止加工以便避免附加成本。
然而,如本领域普通技术人员将认识到的那样,并且与上文参照图2讨论的实施例相似,利用两个浮置焊盘(第一浮置焊盘117和第二浮置焊盘119)来测量电流和电压二者的四端子测试仅为一个实施例,而并非旨在于限制实施例。可以备选地利用任何使用任意数目的浮置焊盘(比如仅使用第一浮置焊盘117而未制造第二浮置焊盘119或者备选地除了第一浮置焊盘117和第二浮置焊盘119之外还制造和使用附加浮置焊盘)的适当测试。浮置焊盘数目和将对第一接触连接件301和UBM 115运行的所需测试的任何组合完全旨在包含在实施例的范围内。
图4B示出了可以用来将第一接触连接件301、第一浮置焊盘117和第二浮置焊盘119放置到半导体管芯100的中心区域上的布局的俯视图,并且沿着线A-A’指示图4A中所示的横截面图。阵列可以用来在例如晶片级芯片规格封装架构中将半导体管芯100连接到外部设备(比如晶片)。然而,可以备选地使用任何用于与外部设备的任何适当连接类型的适当布置(比如倒装芯片架构或者其它架构)。
在图4B所示的实施例(第一接触连接件301为接触凸块)中,第一接触连接件301可以放入球栅阵列中并且可以与第二接触连接件401和第三接触连接件403线性布置。第二接触连接件401和第三接触连接件403可以与第一接触连接件301相似并且可以例如是接触凸块。
在这一实施例中,第一浮置焊盘117可以放置于第一接触连接件301与第二接触连接件401之间并且可以沿着与对准第一接触连接件301、第二接触连接件401和第三接触连接件403的相同线性方向对准。类似地,第二浮置焊盘119可以放置于第一接触连接件301与第三接触连接件403之间并且可以与对准第一接触连接件301、第二接触连接件401、第三接触连接件403和第一浮置焊盘117相同的线性方向进行对准。
通过将第一浮置焊盘117放置于第一接触连接件301与第二接触连接件401之间并且通过将第二浮置焊盘119放置于第一接触连接件301与第三接触连接件403之间,无需附加空间。同样地,第一浮置焊盘117和第二浮置焊盘119可以集成到整个阵列中而无需进一步设计,以便发现附加空间。同样地,无需阵列的广泛重新设计以集成第一浮置焊盘117和第二浮置焊盘119。
图5示出了另一布局,在该布局中第一接触连接件301、第二接触连接件401和第三接触连接件403沿着半导体管芯100的边角定位,这样未沿着相同方向对准。在这一实施例中,第一接触连接件301可以沿着与半导体管芯100的第一侧平行的第一方向与第二接触连接件401对准,并且第一接触连接件301可以沿着与半导体管芯100的第二侧平行的第二方向与第三接触连接件403对准。
在这一实施例中,第一浮置焊盘117可以位于第一接触连接件301与第二接触连接件401之间,而第二浮置焊盘119可以放置于第一接触连接件301与第三接触连接件403之间。同样地,尽管第一接触连接件301、第一浮置焊盘117和第二接触连接件401可以沿着第一方向一起对准,并且尽管第一接触连接件301、第二浮置焊盘119和第三接触连接件403可以沿着第二方向对准,但是第一浮置焊盘117和第二浮置焊盘119未以线性方式与第一接触连接件301对准,而实际上相互垂直地与第一接触连接件301对准。
通过沿着垂直方向放置第一浮置焊盘117和第二浮置焊盘119,第一浮置焊盘117和第二浮置焊盘119可以在沿着半导体管芯100的边角放置第一接触连接件301时形成于第一接触连接件301旁边。因为半导体管芯100的边角具有半导体管芯100在热加工期间的热膨胀所引起的更大应力。第一浮置焊盘117和第二浮置焊盘119的这样的布置允许在第一接触连接件301位于半导体管芯100的边角中时并且在缺陷具有更高出现可能性时测试第一接触连接件301。
图6示出了又一实施例,在该实施例中第一浮置焊盘117和第二浮置焊盘119未放置于第一接触连接件301、第二接触连接件401和第三接触连接件403之间。通过放置第一浮置焊盘117和第二浮置焊盘119相对第二接触连接件401和第三连接接触件403偏移,可以利用更多开放空间。
根据一个实施例,通过一种半导体器件,该半导体器件包括衬底上的传导接触,传导接触具有第一宽度。第一浮置测试焊盘与衬底上的传导接触相邻,其中第一浮置测试焊盘经过衬底电连接到传导接触,第一浮置测试焊盘具有与第一宽度不同的第二宽度。
根据另一实施例,提供一种半导体器件,该半导体器件包括衬底上的第一传导接触和衬底上的第二传导接触,第二传导接触位于与第一传导接触相距第一距离处。第一测试焊盘位于与第一传导接触相距第二距离处,第一距离少于第二距离,第一测试焊盘小于第一传导接触。互连件在衬底内,该互连件将第一测试焊盘电连接到第一传导接触。
根据又一实施例,提供一种制造半导体器件的方法,该方法包括在衬底上形成互连件并且在互连件上形成钝化层。经过钝化层形成第一开口和第二开口以露出互连件的第一部分和互连件的第二部分,并且在第一开口中形成传导接触与互连件接触。在第二开口中形成第一测试焊盘与互连件接触,第一测试焊盘具有比传导接触更小的横向尺寸。
虽然已经具体描述实施例及其优点,但是应当理解这里可以做出各种改变、替换和变更而未脱离如所附权利要求限定的实施例的精神实质和范围。例如可以随需变更各种加工方法。此外可以调节浮置焊盘的精确放置以提供用于特定设计的任何所需放置。
另外,本申请的范围并非旨在于限于在说明书中描述的过程、机器、制造品、物质组成、装置、方法和步骤的具体实施例。如本领域普通技术人员将根据实施例的公开内容容易理解的那样,可以根据实施例利用执行与这里描述的对应实施例基本上相同功能或者实现基本上相同结果的、目前存在或者以后待开发的过程、机器、制造品、物质组成、装置、方法或者步骤。因而所附权利要求旨在于在它们的范围内包括这样的过程、机器、制造品、物质组成、装置、方法或者步骤。
Claims (10)
1.一种半导体器件,包括:
传导接触,位于衬底上,所述传导接触具有第一宽度;以及
第一浮置测试焊盘,与所述衬底上的所述传导接触相邻,其中,所述第一浮置测试焊盘通过所述衬底电连接到所述传导接触,所述第一浮置测试焊盘具有与所述第一宽度不同的第二宽度;
第二浮置测试焊盘,位于所述衬底上,其中,所述第二浮置测试焊盘通过所述衬底电连接到所述传导接触和所述第一浮置测试焊盘,所述第二浮置测试焊盘具有与所述第一宽度不同的第三宽度;
其中,所述第一浮置测试焊盘、所述第二浮置测试焊盘和所述传导接触位于所述衬底的边角处,并且所述第一浮置测试焊盘、所述第二浮置测试焊盘和所述传导接触在所述衬底的平面上形成一个直角三角形,所述传导接触位于所述直角三角形的直角顶点。
2.根据权利要求1所述的半导体器件,其中,所述传导接触包括第一材料,所述第一浮置测试焊盘包括所述第一材料。
3.根据权利要求1所述的半导体器件,还包括传导凸块,位于所述传导接触上。
4.根据权利要求1所述的半导体器件,还包括后钝化互连件,所述后钝化互连件通过所述衬底将所述第一浮置测试焊盘电连接到所述传导接触。
5.一种半导体器件,包括:
第一传导接触,位于衬底上;
第二传导接触,位于所述衬底上,所述第二传导接触与所述第一传导接触相距第一距离;以及
第一测试焊盘,与所述第一传导接触相距第二距离,所述第一距离大于所述第二距离,所述第一测试焊盘小于所述第一传导接触;以及
互连件,位于所述衬底内,所述互连件将所述第一测试焊盘电连接到所述第一传导接触;
第二测试焊盘,位于所述衬底上,与所述第一传导接触相距第三距离,所述第三距离小于所述第一距离,其中,所述互连件将所述第二测试焊盘电连接到所述第一传导接触;
其中,所述第一测试焊盘、所述第二测试焊盘、所述第一传导接触和所述第二传导接触位于所述衬底的边角处,并且所述第一测试焊盘、所述第二测试焊盘和所述第一传导接触在所述衬底的平面上形成一个直角三角形,所述第一传导接触位于所述直角三角形的直角顶点。
6.根据权利要求5所述的半导体器件,还包括传导凸块,位于所述第一传导接触件上。
7.一种制造半导体器件的方法,所述方法包括:
在衬底上形成互连件;
在所述互连件上形成钝化层;
穿过所述钝化层形成第一开口和第二开口,以露出所述互连件的第一部分和所述互连件的第二部分;
在所述第一开口中形成与所述互连件接触的传导接触;以及
在所述第二开口中形成与所述互连件接触的第一测试焊盘,所述第一测试焊盘具有比所述传导接触更小的横向尺寸;
穿过所述钝化层形成第三开口,以露出所述互连件的第三部分;以及
在所述第三开口中形成与所述互连件接触的第二测试焊盘;
其中,所述第一测试焊盘、所述第二测试焊盘和所述传导接触位于所述衬底的边角处,并且所述第一测试焊盘、所述第二测试焊盘和所述传导接触在所述衬底的平面上形成一个直角三角形,所述传导接触位于所述直角三角形的直角顶点。
8.根据权利要求7所述的方法,其中,同时执行形成所述传导接触的步骤和形成所述第一测试焊盘的步骤。
9.根据权利要求7所述的方法,还包括在所述传导接触上形成传导凸块。
10.根据权利要求7所述的方法,还包括使用所述第一测试焊盘来测试所述传导接触。
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