CN103178014B - 一种u型沟槽的制造方法 - Google Patents

一种u型沟槽的制造方法 Download PDF

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CN103178014B
CN103178014B CN201310081961.5A CN201310081961A CN103178014B CN 103178014 B CN103178014 B CN 103178014B CN 201310081961 A CN201310081961 A CN 201310081961A CN 103178014 B CN103178014 B CN 103178014B
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silicon
silicon substrate
polysilicon gate
manufacture method
barrier layer
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景旭斌
李芳�
刘文燕
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Shanghai Huali Microelectronics Corp
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Abstract

本发明一般涉及CMOS半导体器件制造工艺，更确切的说，涉及一种U型沟槽的制造方法，包括以下步骤：沉积一氧化硅层覆盖所述多晶硅栅极的表面及所述硅基板暴露的上表面，去除位于所述硅基板暴露上表面的氧化硅层并于多晶硅栅极表面形成一阻挡层；步骤S2、进行图形化离子注入工艺，于所述硅基板中形成多个掺杂硅区；步骤S3、刻蚀所述掺杂硅区，形成U型硅沟槽后，去除所述阻挡层。本发明在U型槽形成过程中很好的保护硅基板和多晶硅栅极，在所需刻蚀的U型槽掺杂了高剂量离子，然后用热磷酸进行湿法刻蚀极大加快了刻蚀速率，提升了生产效率，同时还可通过控制注入离子量来控制沟槽的深度。

Description

一种U型沟槽的制造方法
技术领域
本发明一般涉及CMOS半导体器件制造工艺，更确切的说，涉及一种U型沟槽的制造方法。
背景技术
随着半导体制作工艺的日益提升以及CMOS半导体器件工艺的发展，半导体器件的比例尺寸不断缩小，为满足器件性能提高需要引入应力硅工程。目前在PMOS上比较通用应力硅工程是SiGe工艺，SiGe工艺具有优异的射频性能，更由于其较高的性价比，被广泛应用于移动通信、卫星定位和RFID(RadioFrequencyIDentification，无线射频识别)等市场；SiGe工艺还可以与常规的数字模拟电路相集成，制造出功能完整的SoC(系统级芯片)芯片。目前采用SiGe材料制作射频集成电路已成为国际上的研究热点。随着无线电应用越来越广泛，使用的带宽和频率也越来越高，因此宽带、超宽带的无线电应用研究具有重要意义。该工艺需要先在硅片上挖取硅沟槽，现有的沟槽一般包括有U型和Σ型。在现有技术中挖取U型沟槽一般使用干法等离子刻蚀实现，但该方法需要预先做硬阻挡层，沟槽制作完成后还要剥离此硬阻挡层，成本相对较高，同时干法刻蚀在刻蚀过程中容易对单晶硅造成损伤，影响后续SiGe的成核，对生产工艺及产品造成了一些不利的影响。
中国专利(公开号：102683180A)公开了一种沟槽刻蚀方法以及半导体器件制造方法，其中包括：在硅片上涂覆具有具体厚度的光刻胶；形成所述光刻胶的用于刻蚀出沟槽的图案；以及利用形成有图案的光刻胶，执行等离子刻蚀；其中，对光刻胶的所述具体厚度以及等离子刻蚀过程中的刻蚀能量进行控制，以使等离子体消耗完所述光刻胶而刻蚀到所述光刻胶的下面的硅片。
该发明的目的是为了提供一种可能够以简化的方法来形成上部的角轮廓形成为圆弧形状的沟槽，在实际刻蚀过程中刻蚀速度比较缓慢，同时在刻蚀过程中也没有相应的保护措施容易对其他不需要刻蚀的部位造成损伤，在实际制作过程中有一定的局限性。
中国专利(公开号：102254817A)公开了一种沟槽制造方法，其中包括：提供硅衬底；在硅衬底上生长氧化物或氮化物；涂覆光致抗蚀剂；使得光致抗蚀剂形成图案；利用形成图案的光致抗蚀剂执行沟槽刻蚀；去除光致抗蚀剂；清洗；以及执行氢退火。
该发明在实际刻蚀速率较慢，形成沟槽时间较长，同样不利于半导体沟槽制造工艺的发展。
发明内容
本发明根据现有技术的不足提供了一种U型沟槽的制造方法，通过在多晶硅栅极表面形成一阻挡层，然后进行图案化离子注入工艺，于硅基板内形成多个掺杂硅区，然后使用热磷酸湿法刻蚀去除该掺杂硅区形成所需U型沟槽，很好的保护了硅基板，同时刻蚀效率也更快。
本发明采用的技术方案为：
一种U型硅沟槽的制造方法，应用于具有多晶硅栅极的半导体结构上，所述半导体结构包括硅基板和多个多晶硅栅极，所述多晶硅栅极位于所述硅基板的上表面，其中，包括以下步骤：
步骤S1、沉积一层氧化硅层覆盖所述多晶硅栅极表面及所述硅基板暴露的上表面，去除位于所述硅基板暴露上表面的氧化硅层，于所述多晶硅栅极的表面形成阻挡层；
步骤S2、进行图形化离子注入工艺，于所述硅基板中形成多个掺杂硅区；
步骤S3、刻蚀所述掺杂硅区，形成U型硅沟槽后，去除所述阻挡层。
上述的一种U型硅沟槽的制造方法，其中，所述步骤S1中氧化硅层为二氧化硅层。
上述的一种U型硅沟槽的制造方法，其中，所述步骤S1中氧化硅层沉积厚度为
上述的一种U型硅沟槽的制造方法，其中，所述步骤S2中的图形化离子注入工艺包括以下步骤：
1)涂覆一层光刻胶覆盖所述硅基板暴露的上表面及所述阻挡层的表面；
2)曝光、显影后，去除多余的所述光刻胶，形成光阻，所述光阻覆盖部分多晶硅栅极表面的阻挡层及部分硅基板的上表面；
3)以所述光阻为掩膜，对所述硅基板暴露的部分进行离子注入工艺，于所述硅基板内形成多个掺杂硅区后，去除所述掩膜。
上述的一种U型硅沟槽的制造方法，其中，所述离子的注入量大于1E15atom/cm2。
上述的一种U型硅沟槽的制造方法，其中，注入的所述离子为Ge，As，P或B。
上述的一种U型硅沟槽的制造方法，其中，采用干法刻蚀去除所述掩膜。
上述的一种U型硅沟槽的制造方法，其中，所述步骤S3中采用热磷酸进行湿法刻蚀去除所述掺杂硅区。
上述的一种U型硅沟槽的制造方法，其中，所述步骤S3中采用氢氟酸进行湿法刻蚀去除所述阻挡层。
综上所述，由于本发明采用了以上技术方案，在U型槽形成过程中很好的保护硅基板和多晶硅栅极，在所需刻蚀的U型槽掺杂了高剂量离子，然后用热磷酸进行湿法刻蚀加快了刻蚀速率，提升了生产效率，同时还可通过控制注入离子量来控制沟槽的深度。
附图说明
图1-6为本发明一种U型沟槽的制造方法的流程示意图。
具体实施方式
下面结合附图和具体实施例对本发明作进一步说明，但不作为本发明的限定。
图1-6为本发明一种U型沟槽的制造方法的流程示意图，包括以下步骤：
步骤S1、于硅基板101上表面沉积一层二氧化硅层，在本发明的实施例中，二氧化硅层的沉积厚度为如：该二氧化硅层同时覆盖住多晶硅栅极102的表面，刻蚀去除二氧化硅层并于多晶硅栅极表面形成一氧化硅阻挡层103，该步骤完成后形成图1所示的结构。
步骤S2、于硅基板101暴露的上表面涂覆一层光刻胶104，并覆盖住多晶硅栅极102表面的阻挡层103，形成图2所示结构；继续曝光、显影工艺后，去除多余的光刻胶，形成光阻104′，以打开所需刻蚀沟槽区域窗口，且该光阻104′覆盖住部分多晶硅栅极表面的阻挡层103及部分硅基板101的上表面，并于硅基板101的部分上表面和多晶硅栅极表面形成光阻104′，该步骤完成后形成图3所示的结构。
步骤S3、以光阻104′为掩膜进行高剂量离子注入，该离子可为Ge，As，P或B中的任意一种离子，同时将注入离子量控制在1E15atom(原子)/cm2以上，在暴露出硅基板101′上表面的下方位置处形成掺杂硅区105，该掺杂硅区位于多晶硅栅极102下表面的两侧，该步骤完成后形成图4所示的结构。
步骤S4、采用干法刻蚀工艺去除硅基板101′上表面及多部分氧化阻挡层103表面的光阻104′，然后使用热磷酸进行湿法刻蚀去除掺杂硅区105，由于热磷酸对经过离子注入掺杂过的硅有很快的刻蚀速率，可快速刻蚀去除掺杂硅区105并在硅基板内形成所需U型沟槽，同时对掺杂离子硅的高选择比性，很好的保护了硅基板未掺杂区，该步骤完成后形成图5所示结构。
步骤S5、使用湿法刻蚀剥离多晶硅栅极表面的氧化硅阻挡层103，在本发明的实施例中，使用氢氟酸进行湿法刻蚀工艺去除多晶硅栅极表面的氧化硅阻挡层103，该步骤完成后形成如图6所示结构。
由于在采用Ge，As，P或B任意一种离子剂量超过1E15atom(原子)/cm2进行离子注入工艺后，继续采用热磷酸进行湿法刻蚀而形成沟槽时，其对离子注入区域的刻蚀速率会高于而对未掺杂离子的硅基板的其他区域的刻蚀速率却低于即采用热磷酸对离子注入工艺后的硅基板进行刻蚀时，该硅基板不同的区域(离子注入区域和非离子注入区域)其刻蚀速率的差别在10倍以上；所以，当在所需制造沟槽的硅基板位置处进行注入离子后可极大提升该区域的刻蚀速率，进而于硅基板内快速形成所需U型沟槽区域，同时由于热磷酸对单晶硅的硅基板及二氧化硅的阻挡层刻蚀速率较慢，在刻蚀过程中减少了热磷酸对硅基板及多晶硅栅极造成的损伤，保护了硅基板和多晶硅栅极。
下面就本发明提供一个具体实施例来对本发明进行进一步阐述：
步骤S3完成后，进行As离子注入工艺，其中注入As离子的能量为15KeV，注入离子量为2E15，在硅基板内形成厚度为的离子掺杂硅区，然后使用热磷酸进行湿法刻蚀工艺去除离子掺杂硅区，在硅基板内形成厚度为的U型沟槽，U型沟槽深度与注入形成的离子掺杂硅区厚度基本一致，达到了本发明制造U型沟槽的目的，满足了工艺要求。同时在本发明中，还可通过控制离子的注入量在硅基板中挖取不同深度的U型沟槽，增大离子量可在硅基板内挖取较深的U型沟槽，减少离子量可在硅基板内挖取较浅的U型沟槽。
综上所述，由于本发明采用了以上技术方案，在U型槽制作过程中很好的保护了多晶硅栅极，还可控制离子的注入量来控制U型槽的深度，同时提高了刻蚀速度，成本也较低，设备通用，提升了生产效率。
以上所述仅为本发明较佳的实施例，并非因此限制本发明的实施方式及保护范围，对于本领域技术人员而言，应当能够意识到凡运用本发明说明书及图示内容所作出的等同替换和显而易见的变化所得到的方案，均应当包含在本发明的保护范围内。

Claims (7)

1.一种U型硅沟槽的制造方法，应用于具有多晶硅栅极的半导体结构上，所述半导体结构包括硅基板和多个多晶硅栅极，所述多晶硅栅极位于所述硅基板的上表面，其特征在于，包括以下步骤：
步骤S1、沉积一层氧化硅层覆盖所述多晶硅栅极表面及所述硅基板暴露的上表面，去除位于所述硅基板暴露上表面的氧化硅层，于所述多晶硅栅极的表面形成阻挡层；
步骤S2、进行图形化离子注入工艺，于所述硅基板中形成多个掺杂硅区；
步骤S3、刻蚀所述掺杂硅区，形成U型硅沟槽后，去除所述阻挡层；
其中，所述步骤S2中的图形化离子注入工艺包括以下步骤：
1)涂覆一层光刻胶覆盖所述硅基板暴露的上表面及所述阻挡层的表面；
2)曝光、显影后，去除多余的所述光刻胶，形成光阻，所述光阻覆盖部分多晶硅栅极表面的阻挡层及部分硅基板的上表面；
3)以所述光阻为掩膜，对所述硅基板暴露的部分进行离子注入工艺，于所述硅基板内形成多个掺杂硅区后，去除所述掩膜；
其中，采用热磷酸进行湿法刻蚀去除所述掺杂硅区。
2.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，所述步骤S1中氧化硅层为二氧化硅层。
3.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，所述步骤S1中氧化硅层沉积厚度为
4.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，所述离子的注入量大于1E15atom/cm2。
5.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，注入的所述离子为Ge，As，P或B。
6.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，采用干法刻蚀去除所述掩膜。
7.根据权利要求1所述的一种U型硅沟槽的制造方法，其特征在于，所述步骤S3中采用氢氟酸进行湿法刻蚀去除所述阻挡层。
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