CN103177945B - High-dielectric constant metal grid pole manufacture method - Google Patents
High-dielectric constant metal grid pole manufacture method Download PDFInfo
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- CN103177945B CN103177945B CN201110430924.1A CN201110430924A CN103177945B CN 103177945 B CN103177945 B CN 103177945B CN 201110430924 A CN201110430924 A CN 201110430924A CN 103177945 B CN103177945 B CN 103177945B
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Abstract
The invention discloses a kind of high-dielectric constant metal grid pole manufacture method, comprising: substrate is provided, over the substrate deposited interfacial layer, high-dielectric-coefficient grid medium layer, metal work function layer successively; Layer deposited isolating on described metal work function layer; Described separator is prepared the TiN of over-stoichiometric
1+xlayer; Carry out quick thermal annealing process; At TiN
1+xdepositing Al electrode on layer.The method, after layer deposited isolating, separator is prepared the TiN of over-stoichiometric
1+xlayer, the solid state N of its middle and high concentration spreads in the process of rapid thermal annealing, thus change separator crystal crystal boundary, and then destroy metal A l in the Al electrode the evolving path to metal work function layer and high-dielectric-coefficient grid medium layer, prevent the diffusion of Al electrode, improve the performance of semiconductor device.
Description
Technical field
The present invention relates to semiconductor fabrication, particularly a kind of manufacture method of high-dielectric constant metal grid pole.
Background technology
At present, on 28nm process node, HKMG (high-dielectric constant metal grid pole) structure replacement conventional polysilicon gate structure is utilized to be recognized as mainly and uniquely to have solved the means of grid leakage current, polysilicon depletion and boron infiltration problem.But in HKMG technique, be faced with many new problems equally, such as Al diffuses to metal work function layer problem, and this problem will have influence on the work function of semiconductor device.
A kind of existing method manufacturing metal gates sees figures.1.and.2.
As shown in Figure 1, provide a substrate 1, as N-type or P type substrate, this substrate 1 deposits the dummy poly grid 2 formed by polysilicon, and is provided with side wall 3, the substrate 1 of side wall 3 both sides is formed with dielectric layer 4.
As shown in Figure 2, remove dummy poly grid 2, and deposited interfacial layer 5 and high-dielectric-coefficient grid medium layer 6 successively on the substrate 1 exposed between side wall 3, plated metal work-function layer 7 in the groove that high-dielectric-coefficient grid medium layer 6 and side wall 3 surround, and on metal work function layer 7 layer deposited isolating 8, depositing Al electrode 9 on separator 8, thus form metal gates.
In above-mentioned existing method, the Al electrode 9 deposited facilitates penetration of separator 8 and diffuses to metal work function layer 7 even in high-dielectric-coefficient grid medium layer 6, and change work function and change high-dielectric-coefficient grid medium layer 6 character, and then affect the performance of semiconductor device.
Summary of the invention
In view of this, the invention provides a kind of high-dielectric constant metal grid pole manufacture method, to prevent the diffusion of Al electrode, improve the performance of semiconductor device.
Technical scheme of the present invention is achieved in that
There is provided substrate, over the substrate deposited interfacial layer, high-dielectric-coefficient grid medium layer, metal work function layer successively;
Layer deposited isolating on described metal work function layer;
Described separator is prepared the TiN of over-stoichiometric
1+xlayer;
Carry out quick thermal annealing process;
At TiN
1+xdepositing Al electrode on layer.
Further, described insolated layer materials is TiN or TaN.
Further, described TiN
1+xlayer thickness is 10 ~ 50 dusts.
Further, described TiN
1+xlayer adopts RF sputtering method to be prepared, and preparation parameter is: radio-frequency power is 2000 ~ 5000W, N
2flow is 30 ~ 300sccm, Ar flow is 30 ~ 100sccm.
Further, described rapid thermal annealing temperature is 300 ~ 450 DEG C.
As can be seen from such scheme, high-dielectric constant metal grid pole of the present invention manufacture method, after layer deposited isolating, separator is prepared the TiN of over-stoichiometric
1+xlayer, the solid state N of its middle and high concentration spreads in the process of rapid thermal annealing, thus change separator crystal crystal boundary, and then destroy metal A l in the Al electrode the evolving path to metal work function layer and high-dielectric-coefficient grid medium layer, prevent the diffusion of Al electrode, improve the performance of semiconductor device.
Accompanying drawing explanation
Fig. 1 and Fig. 2 is semiconductor device structure evolution schematic diagram in the metal gates manufacture process of prior art;
Fig. 3 is the FB(flow block) of high-dielectric constant metal grid pole of the present invention manufacture method;
Fig. 4 to Fig. 8 manufactures semiconductor device structure evolution schematic diagram in metal gates process for adopting method of the present invention.
In accompanying drawing, the title representated by each label is as follows:
1, substrate, 2, dummy poly grid, 3, side wall, 4, dielectric layer, 5, boundary layer, 6, high-dielectric-coefficient grid medium layer, 7, metal work function layer, 8, separator, 9, Al electrode, 10, TiN
1+xlayer
Embodiment
For making object of the present invention, technical scheme and advantage clearly understand, to develop simultaneously embodiment referring to accompanying drawing, the present invention is described in further detail.
As shown in Figure 3, and reference Fig. 4 to Fig. 8, high-dielectric constant metal grid pole of the present invention manufacture method, comprising:
Step 1: as shown in Figure 4, provides substrate 1, over the substrate deposited interfacial layer 5, high-dielectric-coefficient grid medium layer 6 and metal work function layer 7 successively.
Wherein substrate 1 can comprise any can as the basic material building semiconductor device thereon, such as silicon substrate, or made the silicon substrate on the silicon substrate of field isolated area or insulating material.
In prior art, before this step 1, also comprise other steps necessary.Can refer to Fig. 1 and Fig. 2, substrate 1 is provided, as N-type or P type substrate, this substrate 1 deposits the dummy poly grid 2 formed by polysilicon, and is provided with side wall 3, the substrate 1 of side wall 3 both sides is formed with dielectric layer 4; Remove dummy poly grid 2, and deposited interfacial layer 5 and high-dielectric-coefficient grid medium layer 6 successively on the substrate 1 exposed between side wall 3, plated metal work-function layer 7 in the groove that high-dielectric-coefficient grid medium layer 6 and side wall 3 surround.Above steps all can adopt existing techniques in realizing, repeats no more.
Step 2: as shown in Figure 5, layer deposited isolating 8 on described metal work function layer 7.
Wherein, the material of separator 8 is TiN or TaN, prior art can be adopted to deposit, repeat no more.
Step 3: as shown in Figure 6, described separator is prepared the TiN of over-stoichiometric (over-stoichiometric)
1+xlayer 10.
This TiN
1+xthe thickness of layer 10 is 10 ~ 50 dusts, and adopt radio frequency sputtering (RFSputtering) method to be prepared, preparation parameter is: radio-frequency power is 2000 ~ 5000W, N
2flow is 30 ~ 300sccm, Ar flow is 30 ~ 100sccm.
Step 4: as shown in Figure 7, carries out rapid thermal annealing (RTA, RapidThermalAnneal) process.This quick thermal annealing process temperature is 300 ~ 450 DEG C.
Through this quick thermal annealing process, the TiN of prepared over-stoichiometric on separator 8
1+xthe solid state N (nitrogen) of layer 10 middle and high concentration spreads in the process of rapid thermal annealing, thus changes the crystal crystal boundary of the separator 8 of lower floor.
Step 5: as shown in Figure 8, at TiN
1+xdepositing Al electrode 9 on layer 10, forms high-dielectric constant metal grid pole.The deposition of Al electrode 9 can adopt existing techniques in realizing, repeats no more.
Owing to have passed through the TiN of the over-stoichiometric of above-mentioned steps 3
1+xlayer 10 preparation and step 4 thermal anneal process after, change the crystal crystal boundary of the separator 8 of lower floor, in the Al electrode 9 deposited in steps of 5, metal A l is destroyed to the evolving path of metal work function layer 7 and high-dielectric-coefficient grid medium layer 6, thus prevent the diffusion of metal A l, avoid the impact on metal work function layer 7 and high-dielectric-coefficient grid medium layer 6, improve the performance of semiconductor device.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within the scope of protection of the invention.
Claims (5)
1. a high-dielectric constant metal grid pole manufacture method, comprising:
There is provided substrate, over the substrate deposited interfacial layer, high-dielectric-coefficient grid medium layer, metal work function layer successively;
Layer deposited isolating on described metal work function layer;
Described separator is prepared the TiN of over-stoichiometric
1+xlayer;
Carry out quick thermal annealing process;
At TiN
1+xdepositing Al electrode on layer.
2. high-dielectric constant metal grid pole according to claim 1 manufacture method, is characterized in that: described insolated layer materials is TiN or TaN.
3. high-dielectric constant metal grid pole according to claim 1 manufacture method, is characterized in that: described TiN
1+xlayer thickness is 10 ~ 50 dusts.
4. the high-dielectric constant metal grid pole manufacture method according to claim 1 or 3, is characterized in that: described TiN
1+xlayer adopts RF sputtering method to be prepared, and preparation parameter is: radio-frequency power is 2000 ~ 5000W, N
2flow is 30 ~ 300sccm, Ar flow is 30 ~ 100sccm.
5. high-dielectric constant metal grid pole according to claim 1 manufacture method, is characterized in that: described rapid thermal annealing temperature is 300 ~ 450 DEG C.
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| CN201110430924.1A CN103177945B (en) | 2011-12-20 | 2011-12-20 | High-dielectric constant metal grid pole manufacture method |
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| CN103177945B true CN103177945B (en) | 2016-03-30 |
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| CN104347418B (en) * | 2013-08-05 | 2019-11-01 | 中芯国际集成电路制造(上海)有限公司 | The forming method of MOS transistor |
| CN107437562B (en) * | 2016-05-27 | 2020-11-27 | 中芯国际集成电路制造(上海)有限公司 | Method for forming semiconductor device |
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| CN1846313A (en) * | 2003-09-09 | 2006-10-11 | 国际商业机器公司 | Structure and method for metal replacement gate of high performance device |
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| CN101431049A (en) * | 2007-05-03 | 2009-05-13 | 三星电子株式会社 | Methods of forming a semiconductor device including a diffusion barrier film |
| CN101452878A (en) * | 2007-12-04 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Method for forming blocking layer of semiconductor device |
| CN101673705A (en) * | 2009-09-29 | 2010-03-17 | 哈尔滨工业大学 | Preparation method of thin film of diffusion impervious layer |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7381608B2 (en) * | 2004-12-07 | 2008-06-03 | Intel Corporation | Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1510726A (en) * | 2002-10-17 | 2004-07-07 | 三星电子株式会社 | Formation of cobalt silicide film and manufacture of semiconductor device therewith |
| CN1846313A (en) * | 2003-09-09 | 2006-10-11 | 国际商业机器公司 | Structure and method for metal replacement gate of high performance device |
| CN101431049A (en) * | 2007-05-03 | 2009-05-13 | 三星电子株式会社 | Methods of forming a semiconductor device including a diffusion barrier film |
| CN101335260A (en) * | 2007-06-29 | 2008-12-31 | 上海宏力半导体制造有限公司 | Aluminum interconnecting construction and making method thereof |
| CN101452878A (en) * | 2007-12-04 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Method for forming blocking layer of semiconductor device |
| CN101673705A (en) * | 2009-09-29 | 2010-03-17 | 哈尔滨工业大学 | Preparation method of thin film of diffusion impervious layer |
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