200947726 六、發明說明： 【發明所屬之技術領域】 本發明係關於在一半導體元件中形成接點，且更特定 而言係關於用於針對多晶石夕射極（emitter)太陽能電池 接點提供一埋設絕緣體隔離之方法及設備。 【先前技術】 〇 為了在矽太陽能電池中獲得高效率，消除表面再結合 (surface recombinati〇n)係被認為是有助益的。此種再 結合來自於非鈍化表面及自金屬接點。再結合之一量測 係表面再結合速度（SRV)，而SRV即為在表面處少數載 子再結合之速率。對於一參考值，<1〇〇公分/秒（cm/sec) 可提供高效電池所需之良好鈍化表面。作為對比，金屬 接點將具有107公分/秒之SRV，大小係高了五個數量 _ 級。如果金屬覆蓋表面之3°/。，則有效表面再結合速度為 3xl05公分/秒，則大小較所需大3個數量級。因此，接 點鈍化為必要的。 使該等接點與該主體（bulk )隔離之一習知方法係使 用第1圖中所示之一選擇性射極。如第j圖中所示，在 遠離該等接點1 02之區域具有一淺射極擴散丨〇6 (舉例 而言，η型，通常帶有磷摻雜，且在一卩型基板上）。該 淺射極106提供良好之藍光回應（blueresp〇nse)，因為 在表面附近藍光光子被吸收《此射極的厚度可為0.3至 200947726 0.5微米。另一方面，深擴散1〇8 (厚度為2-3微米）放 置在接點之下。此等可提供隔離，藉此’高再結合接點 表面不會影響電池效能。然而，此等結構很難形成，因 為其要求接點孔與金屬線的對齊圖案化，以及數小時之 擴散以獲得此種深接合面。因此，選擇性射極極少用於 商用的太陽能電他。 鈍化接點之另一方法係在該等金屬接點之下放置一薄 層的穿隧氧化物（tunnel oxide )(通常厚度為15A)。此 等類型之接點亦為習知的’且已經由宵特太陽能公司 (Schott solar )在商業上用於製造MIS太陽能電池。然 而’此等太陽能電池並未在商業上引入，可能是因為可 靠地形成一薄層之穿隨氧化物所存在的難度。 因此，在本項技術中仍然需要一商業上可行之方法及 設備’以在太陽能電池中提供接點鈍化。 【發明内容】 本發明係關於用於針對太陽能電池接點提供埋設絕緣 體隔離之方法及設備。根據部分實施態樣，本發明將一 埋設氧化物放置在一多晶矽射極太陽能電池之射極下 方。該氧化物在大部分表面上提供一優良鈍化層。該氧 化物中之孔可提供接點區域’其會增加電流密度以提高 效率。該氧化物隔離接點與基板，以實現一選擇性射極 結構之優勢，而無需深擴散。該氧化物進一步允許在進 5 200947726 階（advanced )淺射極電池上使用網版印刷。將柵線定 位於接近開口亦允許使用非常薄之射極以最大化藍光回 應。 再者’在此等及其他實施態樣中，一根據本發明具體 實施例之太陽能電池包含：一射極層，其形成於一半導 體基板上；以及位於該射極層與該基板之一表面間之一 絕緣層，該絕緣層係經圖案化以包含接點孔，且該些接 點孔係允許電流流經其中。 又，在此等及其他實施態樣中，根據本發明之具體實 施例的一種製作一太陽能電池之方法包含：在一半導體 基板之一表面上形成一絕緣層；在該絕緣層中圖案化多 個接點孔，且該些接點孔係允許電流流經其中；以及在 該絕緣層上形成一射極層。 【實施方式】 ❿ 現將參考圖式詳細說明本發明，提供該等圖式以作為 本發明之示意性實例，以便使熟f此項技術者能夠具體 實施本發明。值得注意地，以下該等圖式及實例並非意 欲限制本發明之料於單—具體實施例，而是藉由交換 某些或所有所說明或圖解說明元件之方式可有其他且體 實施例。此外’其中本發明之某些元件可部分地或二全 地使用習知、組件來實施，以下僅將說明此等習知組件中 為瞭解本發明所必需之部分，且將省略此等習知組件其 6 200947726 他部分之詳細說明，以不會對本發明造成混淆。在本說 明書中，一顯示一單數組件之具體實施例不應被視為限 制性的；相反，除非本文明白地表述，則本發明意欲涵 蓋包含複數個相同組件之其他具體實施例，且反之亦 然。此外，對於本說明或申請專利範圍中之任何術語， 本申呀人並非意欲將之歸屬於一罕見或特殊的定義，除 非文中有明確地指出。此外，本發明包含本文藉由圖解200947726 VI. INSTRUCTIONS OF THE INVENTION: FIELD OF THE INVENTION The present invention relates to forming contacts in a semiconductor component, and more particularly to providing for a polycrystalline solar cell junction. A method and apparatus for burying insulator isolation. [Prior Art] 〇 In order to achieve high efficiency in tantalum solar cells, it is considered to be helpful to eliminate surface recombination. This recombination comes from non-passivated surfaces and from metal contacts. Recombination is measured by the surface recombination velocity (SRV), which is the rate at which a few carriers recombine at the surface. For a reference value, <1 centimeters per second (cm/sec) provides a good passivated surface for high efficiency batteries. In contrast, the metal joint will have an SRV of 107 cm/sec and the size is five orders of magnitude higher. If the metal covers the surface at 3°/. , the effective surface recombination speed is 3xl05 cm/sec, and the size is 3 orders of magnitude larger than necessary. Therefore, contact passivation is necessary. One conventional method of isolating the contacts from the bulk is to use a selective emitter as shown in Figure 1. As shown in FIG. j, there is a shallow emitter diffusion 丨〇6 in the region away from the contacts 102 (for example, n-type, usually with phosphorus doping, and on a germanium substrate) . The shallow emitter 106 provides a good blue response (blueresp〇nse) because the blue photons are absorbed near the surface. "The thickness of this emitter can range from 0.3 to 200947726 0.5 microns. On the other hand, a deep diffusion of 1 〇 8 (thickness of 2-3 μm) is placed under the joint. This provides isolation, whereby the 'high recombination contact surface does not affect battery performance. However, such structures are difficult to form because they require alignment patterning of the contact holes and the metal lines, and diffusion for several hours to obtain such deep joints. Therefore, the selective emitter is rarely used for commercial solar power. Another method of passivating the contacts is to place a thin layer of tunnel oxide (typically 15 A thick) under the metal contacts. These types of contacts are also known and have been used commercially by Schott solar for the manufacture of MIS solar cells. However, such solar cells have not been introduced commercially, probably because of the difficulty of reliably forming a thin layer of oxides. Accordingly, there remains a need in the art for a commercially viable method and apparatus to provide contact passivation in solar cells. SUMMARY OF THE INVENTION The present invention is directed to a method and apparatus for providing buried insulator isolation for solar cell contacts. According to some embodiments, the present invention places a buried oxide under the emitter of a polycrystalline emitter solar cell. The oxide provides an excellent passivation layer on most of the surface. The pores in the oxide provide a contact area which increases the current density to increase efficiency. The oxide isolates the contacts from the substrate to achieve the advantages of a selective emitter structure without the need for deep diffusion. The oxide further allows for the use of screen printing on advanced 5 200947726 advanced shallow emitter cells. Positioning the grid lines close to the opening also allows the use of very thin emitters to maximize blue light response. In this and other embodiments, a solar cell according to an embodiment of the present invention includes: an emitter layer formed on a semiconductor substrate; and a surface of the emitter layer and the substrate An insulating layer is patterned to include contact holes, and the contact holes allow current to flow therethrough. Moreover, in this and other embodiments, a method of fabricating a solar cell according to a specific embodiment of the present invention includes: forming an insulating layer on a surface of a semiconductor substrate; patterning in the insulating layer Contact holes, and the contact holes allow current to flow therethrough; and an emitter layer is formed on the insulating layer. The present invention will be described in detail with reference to the drawings, which are to be regarded as illustrative examples of the invention. It is to be noted that the following drawings and examples are not intended to limit the invention to the specific embodiments, but may be in the form of some or all of the illustrated or illustrated elements. In addition, some of the elements of the present invention may be implemented in part or in whole using conventional components and components. Only those parts of these conventional components that are necessary for understanding the present invention will be described below, and such conventional knowledge will be omitted. The components thereof are described in detail in section 200947726, so as not to confuse the invention. In the present specification, a specific embodiment of a singular component is not to be construed as limiting; rather, the invention is intended to cover other specific embodiments including a plurality of identical components, and vice versa Of course. In addition, for any term in this description or the scope of the patent application, the applicant is not intended to attribute it to a rare or specific definition unless explicitly stated otherwise. Moreover, the invention encompasses the text by way of illustration
說明方式所引用之習知組件的目前及未來熟知的等效 物。 大體而t，本發明|一多晶矽射極太陽能電池之射極 下方提供-埋設氧化物。該氧化物在大多數表面上提供 -優良鈍化層。該氧化物中之孔可提供接點區域，增加 電流密度以提高效率。該氧化物係隔離接點與基板，因 而實現-選擇性射極結構之優勢，而無需深擴散。 本發明人確認了點接觸太陽能電池可提供改良之效 率。這是因為電流集中於一小區域，可提供一較高之電 流密度。該開路電壓v〇c由以下公式表示： V〇c = kT/q In (JL/J0 + ]j 其中k係波兹曼常數，丁為溫度，q為電荷，Jl為短路 電流密度，及J〇為二極體飽和電流 " 电视因此，短路電流密 度增大將導致電壓增加，從而使效率提高。 第2圖顯示根據本發明之且體眘尬a丨 搂例之-實例電池結 構。如第2圖中所示，該電池 該摻雜區域210及 該接點202下方包含一絕緣（ 乳化物）層214。此 7 200947726 絕緣層214隔離該接點202與該基板2〇〇。根據本發明 之部分實施態樣，如果該絕緣層214使用—會使矽鈍化 的材料（諸如熱Si〇2 )製成，則該太陽能電池表面具有 非常良好之鈍化及一低表面再結合速度，且在該場區域 210中及在該等接點2〇2之下均為如此。在該絕緣層a" 中提供接點孔212以允許光電流的流動。在以下更詳盡 描述之具體實施例中’接點孔212包含一穿隧氧化物。 φ 然而，這並非在所有具體實施例中均為必需的。 在具體實施例十，基板200由矽構成，且使用p型或 η型雜質進行低摻雜》如熟習此項技術者所應瞭解，可 使用許多其他基板材料，且此種及許多其他用於獲得一 所需極性（polarity)濃度及類型之方法亦為可能的。應 注意，術語「接點孔」應被廣泛地解釋，而使其關於穿 過絕緣層214及許多類型太陽能電池接點的多種開口。 舉例而言’料孔可針對點接觸而提供，或其可針對橋 〇 線（gndline)接點而提供。熟習太陽能電池接點技術者 將瞭解本發明之教示如何可應用於此等及其他各種類型 的接點及開口。 在諸如第2圖所示之具體實施例中，該等接點2〇2大 致定位於兩個孔212之間的中間處。光電流係流經接點 孔212，且該等接點孔212係圖案化於該氧化物層214 中。此會使該電流集中（concentrate )，因而增加該接合 面處之電《度。然後聚集之電、流會橫肖、流冑至該等接 點202。該等開口 212之典型尺寸可為2〇至2〇〇微米， 8 200947726 且開口 212間之間距可為〗_5毫米。該間距與開口寬度 之比率提供上述之集中作用，而此集中作用係受到由於 聚集於該等接點孔處之電流所導致之串聯電阻的限制。5 至20量級之集中比率為典型比率。該等開口可為平行於 該等接點柵線之線條，或為諸如矩形或圆形之孔。較大 之開口可使用網版印刷（screen printing )而圖案化而 不使用微影技術。亦可使用雷射剝姓。 在具體實施例中，該摻雜區域21〇係使用多晶矽而形 成，多晶矽可在63〇t量級之溫度沉積且在原位摻雜。 在沉積之後，於1050。(：進行30秒的短暫退火以活化該 等摻質（dopant)。如上所述，在某些具體實施例中，可 在該基板200與該多晶矽210之間的接點孔212中包含 一薄層穿隧氧化物。此氧化物（通常8至15人厚）在該 基板與該多晶矽之間提供鈍化，同時允許穿隧電流流動。 在另一具體實施例中’該等接點線2〇2並未相對於該 ❺ 等孔而置中設置，而是偏置以更接近各個孔212,如第3 圖中所示。現在，自該等接點孔212至該等接點柵線2〇2 之電流路徑被縮短。此路徑通常可為5〇至2〇〇微米，以 使該等金屬栅線202與該等接點孔212呈現良好隔離， 但因為該短路徑長度，則在該接點與該孔之間的串聯電The present and future well-known equivalents of the conventional components cited are described. In general, the present invention provides a buried oxide under the emitter of a polycrystalline germanium emitter solar cell. This oxide provides an excellent passivation layer on most surfaces. The pores in the oxide provide contact areas and increase current density to increase efficiency. This oxide isolates the contacts from the substrate, thereby achieving the advantages of a selective emitter structure without the need for deep diffusion. The inventors have confirmed that point contact solar cells can provide improved efficiency. This is because the current is concentrated in a small area to provide a higher current density. The open circuit voltage v〇c is expressed by the following formula: V〇c = kT/q In (JL/J0 + ]j where k is the Boltzmann constant, D is the temperature, q is the charge, Jl is the short-circuit current density, and J 〇 is a diode saturation current " TV Therefore, an increase in the short-circuit current density will result in an increase in voltage, thereby increasing efficiency. Figure 2 shows an example battery structure according to the present invention. As shown in FIG. 2, the doped region 210 and the underside of the contact 202 comprise an insulating (emulsion) layer 214. The insulating layer 214 isolates the contact 202 from the substrate 2〇〇. In some embodiments of the invention, if the insulating layer 214 is formed using a material that is passivated, such as thermal Si〇2, the solar cell surface has very good passivation and a low surface recombination speed, and This is the case in the field region 210 and below the contacts 2〇2. Contact holes 212 are provided in the insulating layer a" to allow the flow of photocurrent. In the specific embodiment described in more detail below' The contact hole 212 includes a tunneling oxide. φ However, This is not required in all of the specific embodiments. In the specific embodiment 10, the substrate 200 is composed of tantalum and is doped with p-type or n-type impurities, as will be understood by those skilled in the art, and can be used. Many other substrate materials, and many other methods for obtaining a desired polarity concentration and type are also possible. It should be noted that the term "contact hole" should be interpreted broadly to make it relevant A variety of openings through the insulating layer 214 and many types of solar cell contacts. For example, the 'holes may be provided for point contact, or they may be provided for gndline contacts. Familiar with solar cell contact technology It will be appreciated how the teachings of the present invention can be applied to these and other various types of contacts and openings. In a particular embodiment, such as shown in FIG. 2, the contacts 2〇2 are generally positioned in two apertures 212. In the middle between the photocurrents, the photocurrent flows through the contact holes 212, and the contact holes 212 are patterned in the oxide layer 214. This concentrates the current, thereby increasing the junction surface. Electricity "degrees. Then gather the electricity, the flow will traverse, flow to the joints 202. The typical size of the openings 212 can be 2 〇 to 2 〇〇 micron, 8 200947726 and the distance between the openings 212 can be 〗 _5 mm. The ratio of the pitch to the width of the opening provides the above-mentioned concentration, and the concentration is limited by the series resistance caused by the current concentrated at the contact holes. The concentration ratio of the order of 5 to 20 is Typical ratios. The openings may be lines parallel to the grid lines of the contacts, or holes such as rectangles or circles. Larger openings may be patterned using screen printing without using lithography. technology. You can also use the laser to strip the surname. In a particular embodiment, the doped region 21 is formed using polysilicon, which can be deposited at a temperature on the order of 63 〇t and doped in situ. After deposition, at 1050. (: a short annealing of 30 seconds is performed to activate the dopants. As described above, in some embodiments, a thin hole may be included in the contact hole 212 between the substrate 200 and the polysilicon 210 The layer tunnels oxide. This oxide (typically 8 to 15 people thick) provides passivation between the substrate and the polysilicon while allowing tunneling current to flow. In another embodiment, the contact lines are 2 is not set centrally with respect to the holes, but is biased to be closer to each of the holes 212, as shown in Fig. 3. Now, from the contact holes 212 to the contact lines 2 The current path of 〇2 is shortened. This path can be generally 5 〇 to 2 〇〇 microns so that the metal gate lines 202 are well isolated from the contact holes 212, but because of the short path length, Series connection between the contact and the hole
阻較低。此允許使用一較薄的射極層21 〇(在5 〇〇至1〇〇〇 A 厚之量級）’降低在該射極中藍光之吸收，且改善藍光回 應。 應注意的是，根據本發明之實施態樣，藉由該埋設的 9 200947726 氧化物214可阻擋該接點金屬202達到該基板200。此 允許接觸該薄射極，而無需使用一複雜接點製程。 該埋設氧化物較佳地相對較薄，藉此，該氧化物不會 提供一降低進入該電池之光傳輸的光學元件。1〇〇至 150A之厚度已經足夠，儘管可使用更薄之層。厚度係期 望為>2〇A，因為較薄之層可支援透過穿隧電流的线漏。 此厚度提供某些對比度’藉此可辨識該接點孔位置以對 準該等栅線，但對進入該電池之光的傳輸幾乎沒有影響。The resistance is lower. This allows the use of a thinner emitter layer 21 〇 (on the order of 5 〇〇 to 1 〇〇〇 A thick) to reduce the absorption of blue light in the emitter and improve the blue light response. It should be noted that, according to an embodiment of the present invention, the buried metal 202 reaches the substrate 200 by the buried 9 200947726 oxide 214. This allows access to the thin emitter without the need for a complex contact process. The buried oxide is preferably relatively thin, whereby the oxide does not provide an optical component that reduces light transmission into the cell. A thickness of 1 〇〇 to 150 A is sufficient, although a thinner layer can be used. The thickness system is expected to be >2〇A because the thinner layer can support line leakage through the tunneling current. This thickness provides some contrast' whereby the position of the contact holes can be identified to align the grid lines, but has little effect on the transmission of light into the cell.
❹ 第4圖顯示根據本發明之實施態樣的用於製作一太陽 能電池結構之製作流程的一實例具體實施例。首先，在 步驟S402中，使用諸如熱氧化或來自應用材料公司 (Applied Materials )之Rad0x⑧之一製程，清潔該晶圓 及形成該埋設氧化物❶其次，在步驟S4〇4中，形成該等 接點孔。舉例而言，在該電池上網版印刷一蝕刻遮罩層， 且在HF中蝕刻該埋設氧化物。然後，移除光阻。接著 清潔該晶圓，且在第4圖中所示之一具體實施例中，在 步驟s4〇6中使用諸如188(}或Rad〇x之一製程而在接 點孔中生長-穿隨氧化物。另—具體實施例不使用穿隨 氧化物，且處理過程直接自步驟S4〇4前進至步驟s4〇8。 在步驟S408中’接著沉積摻雜的多晶^在p型基板 上，此為500至1_人之n型多晶石夕並例如推雜有 或P。在η型基板上，該層係例如摻雜有B。在步驟 中，亦沉積抗反射塗層， 層。在該較佳具體實施例 且其可以為一 750A之氮化矽 中’於步驟S412中’該晶圓接 10 200947726 著在氮氫混合氣體（forming gas)中於450°C退火30 分鐘以提供氫鈍化。然而，這並非在所有具體實施例中 均為必需的，且處理過程可自步驟S410直接前進至 S414。 在步驟S414中，接著例如使用網版印刷及蝕刻而在抗 反射（AR)塗層中圖案化該些孔。可使用鍍覆技術 (plating)以形成Ni/Ag接點，且接著將其進行退火處 理。在另一具體實施例中，將銀膠（silver paste )網版 ® 印刷在該AR塗層上並燒結（Hre )至其中，使該埋設的 氧化物阻止該燒結之膠劑達到該基板。 所說明之結構可形成於該電池之前面上。在一替代具 體實施例中，其形成於該電池之背面上。如果該電池之 前面具有一紋理（texture )，這係有利的，原因在於該結 構可在一平面表面上製成。該具紋理之表面係暴露<lu> 平面’而<111>平面的原子密度高於<100>平面，且亦具 ❹ 有I7倍之平面表面面積。具紋理之表面的SRV高於平 面表面的SRV ’且更難以鈍化。係期望在該電池背面上 之平面表面上形成此等結構。 該電池之相對側亦需要一接點結構。在一具體實施例 中，使用一雷射在背面上沉積及燒結鋁，以形成雷射燒 結之接點’此在先前技術中為習知的。在另一具體實施 例中’在該背面上重複該前面結構，使用具有與基板相 同摻雜類型之多晶矽β 應注意’該電池操作於順向偏壓（forward bias)中。 200947726 舉例而言，如果該多晶珍層係p型且該基板係、以，則 該多晶矽層相對於該基板為正。因此，該表面將累積（高 電子濃度）。此提供一種鈍化該表面之方法，原因在於電 洞將不存在’而在介面陷辨（interfacetrap)處的再結合 需要同時具備電洞及電子。 要反向操作，必須形成具有固定電荷的介電質，而此 固定電荷會提供一大於該電池操#電壓之臨限電壓偏 移。 同時亦注意，該埋設層可由一種以上材料製成。舉例 而言，可形成一薄層氧化物以鈍化該表面，接著是一較 厚的氮化矽《該氮化物可提供電荷及氫，且可以為一改 良屏障以阻止當接點退火時金屬原子自接點擴散至基板 中。 儘管本發明已具體參照該等較佳具體實施例進行說 明，但此項技術中具有通常知識者易於明瞭在不背離本 ❹ 發明精神及範圍之情況下，可以在形式及細節方面進行 變更及修改。該等所附申請專利範圍旨在涵蓋此等變更 及修改。 【圖式簡單說明】 在結合所附圖式檢視本發明特定具體實施例之上方說 月後’本發明之此等及其他實施態樣及特徵對於此項技 術中具有通常知識者為顯而易見的，其中： 12 200947726 第1圖，顯示一先前技術之選擇性射極電池。 第2圖，顯示根據本發明具體實施例之一埋設氧化物 電池結構。 第3圖’顯示根據本發明之具體實施例的一具有一偏 置接點結構之埋設氧化物電池之操作態樣。 第4圖’係顯示根據本發明之具體實施例的一實例埋 設氧化物電池製程過程之流程圖。 ❹ 【主要元件符號說明】 102 接點 104 抗反射塗層 106 淺射極（擴散） 108 深擴散 200 基板 202 接點/柵線/金屬 204 抗反射塗層 210 區域/多晶矽/層 212 接點孔/孔/開口 214 氧化物（層）/絕緣層 S402，S404，S406，S408，S410，S412，S414，S416，S418 步驟 13❹ Figure 4 shows an exemplary embodiment of a fabrication process for fabricating a solar cell structure in accordance with an embodiment of the present invention. First, in step S402, the wafer is cleaned and the buried oxide is formed using a process such as thermal oxidation or Rad0x8 from Applied Materials, and in step S4, 4, the connection is formed. Point the hole. For example, an etch mask layer is printed on the battery screen and the buried oxide is etched in HF. Then, remove the photoresist. The wafer is then cleaned, and in one embodiment shown in FIG. 4, a process such as 188(} or Rad〇x is used in step s4〇6 to grow in the contact holes Another embodiment does not use a pass-through oxide, and the process proceeds directly from step S4〇4 to step s4〇8. In step S408, 'the doped polysilicon is subsequently deposited on the p-type substrate, this It is a 500-to-1 human n-type polycrystalline stone and is, for example, fused with or P. On an n-type substrate, the layer is, for example, doped with B. In the step, an anti-reflective coating layer is also deposited. The preferred embodiment and which may be a 750A tantalum nitride 'in step S412', the wafer is connected to 10 200947726 and annealed at 450 ° C for 30 minutes in a forming gas to provide hydrogen. Passivation. However, this is not required in all embodiments, and the process may proceed directly from step S410 to S414. In step S414, the anti-reflective (AR) coating is then applied, for example, using screen printing and etching. The holes are patterned in the layer. Plating can be used to form Ni/Ag contacts. It is then annealed. In another embodiment, a silver paste screen is printed on the AR coating and sintered (Hre) thereto to prevent the embedded oxide from inhibiting the sintering. The glue reaches the substrate. The structure described can be formed on the front side of the battery. In an alternative embodiment, it is formed on the back side of the battery. If the front mask of the battery has a texture, this is Advantageously, the reason is that the structure can be made on a planar surface. The textured surface exposes a <lu>plane' and the <111> plane has an atomic density higher than the <100> plane, and It has an I7 times planar surface area. The SRV of the textured surface is higher than the SRV' of the planar surface and is more difficult to passivate. It is desirable to form such a structure on the planar surface on the back side of the cell. The opposite side of the cell also requires a Contact structure. In one embodiment, a laser is used to deposit and sinter aluminum on the back side to form a laser sintered joint 'this is well known in the prior art. In another embodiment' Repeating the front structure on the back side, using polysilicon having the same doping type as the substrate, should note that the cell is operating in a forward bias. 200947726 For example, if the polycrystalline layer p And the substrate is such that the polysilicon layer is positive with respect to the substrate. Therefore, the surface will accumulate (high electron concentration). This provides a way to passivate the surface because the hole will not exist 'in the The recombination at the interface trap requires both holes and electrons. To operate in reverse, a dielectric with a fixed charge must be formed, and this fixed charge provides a threshold voltage shift greater than the voltage of the battery. It is also noted that the buried layer can be made of more than one material. For example, a thin layer of oxide can be formed to passivate the surface, followed by a thicker tantalum nitride. "The nitride can provide charge and hydrogen, and can be an improved barrier to prevent metal atoms when the junction is annealed. The self-contact spreads into the substrate. Although the present invention has been described with reference to the preferred embodiments thereof, it is obvious to those skilled in the art that the present invention may be modified and modified in form and detail without departing from the spirit and scope of the invention. . The scope of such appended patents is intended to cover such changes and modifications. BRIEF DESCRIPTION OF THE DRAWINGS [0009] These and other embodiments and features of the present invention will become apparent to those of ordinary skill in the art in the light of the <RTIgt; Where: 12 200947726 Figure 1 shows a prior art selective emitter cell. Fig. 2 is a view showing the structure of an oxide cell buried in accordance with one embodiment of the present invention. Fig. 3' shows an operational aspect of a buried oxide cell having a biased contact structure in accordance with an embodiment of the present invention. Figure 4 is a flow chart showing an exemplary buried oxide cell process in accordance with an embodiment of the present invention. ❹ [Main component symbol description] 102 Contact 104 Anti-reflective coating 106 Shallow emitter (diffusion) 108 Deep diffusion 200 Substrate 202 Contact/gate line/metal 204 Anti-reflective coating 210 Area/polysilicon/layer 212 Contact hole / hole / opening 214 oxide (layer) / insulating layer S402, S404, S406, S408, S410, S412, S414, S416, S418 Step 13