CN102982647B - A kind of wiring method of control chip design of smoke-sensitive alarm device - Google Patents
A kind of wiring method of control chip design of smoke-sensitive alarm device Download PDFInfo
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- CN102982647B CN102982647B CN201210518113.1A CN201210518113A CN102982647B CN 102982647 B CN102982647 B CN 102982647B CN 201210518113 A CN201210518113 A CN 201210518113A CN 102982647 B CN102982647 B CN 102982647B
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- smoke
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- Fire-Detection Mechanisms (AREA)
- Fire Alarms (AREA)
Abstract
The present invention is a kind of wiring method of control chip design of smoke-sensitive alarm device, the control chip of described smoke-sensitive alarm device mainly comprises digital core (CORE), storer (EPROM), simulation low-pressure section and simulated high-pressure part, and method is integrated on the larger chip of low pressure process plate-making flow by digital core (CORE), storer (EPROM) and simulation low-pressure section; Simulated high-pressure is partially integrated on the less chip of high-pressure process plate-making flow; Less chip laminate encapsulates on larger chip, possesses individual substrate separately, and both directly arrange insulating gel.Cost of the present invention is low, efficiency is high, not interference.Under the prerequisite not increasing lower floor's low-voltage chip size, provide larger area to the high-voltage chip on upper strata as much as possible, improve the reliability of high-voltage chip, make SOP16 be encapsulated into possibility, and stability is higher.
Description
Technical field
The present invention relates to a kind of method for designing of SIC (semiconductor integrated circuit), particularly relate to a kind of method for designing of control chip of smoke-sensitive alarm device.
Background technology
Smoke-sensitive alarm device is a kind of electronic equipment with sensor and audible alarm.Sensor is the parts carrying IO interface, so the major control chip of smoke-sensitive alarm device is used to carry out data processing and reports to the police drive, main module comprises processor, storer, amplifier, comparer, various driving circuit, control circuit etc.
Above circuit is generally all designed to the form of integrated circuit, in prior art, there are two large classes, one is the form of multi-chip, general formation is as Fig. 1, comprise amplifier chip, A/D chip, digital control chip and high pressure loudspeaker driving chip, the smoke detection signal that this processing of circuit smoke detector transmits.Final according to setting, drive loudspeaker to report to the police.Obviously, under the form of this multi-chip, structure is relatively complicated, needs comparatively complicated peripheral circuit to coordinate, realize cost higher, so do not meet the circuit design requirements of current high integration in practical application.
The form of the second commonly one chip, its structure as shown in Figure 2, comprises digital core CORE, storer EPROM, simulation low-pressure section and simulated high-pressure part.All module integrated in chip piece.The design cost of this form compared with high, wiring difficulty is large, and high-low pressure shares a substrate, and during work, high-pressure section easily produces interference to memory stores data, affects the reliability of whole circuit.
Summary of the invention
Object of the present invention is for the weak point of the multi-chip described in background technology and single-chip circuit, and inventing a kind of circuit arrangement adopting the induction alarm system of dual chip, is a kind of wiring method.
Smoke-sensitive alarm device of the present invention is the electronic equipment including audible alarm and LED display, report to the police for smoke sensing, so need to possess corresponding data-handling capacity and corresponding driving circuit.Driving circuit mainly comprises digital core (CORE), storer (EPROM), simulation low-pressure section and simulated high-pressure part, wherein, simulate low-pressure section and comprise integrating amplifier, smog comparer, low pressure detection comparator, reference circuit, oscillator, photoelectricity storehouse driving circuit; Simulated high-pressure part comprises: boosting protecting control module, drive circuit of loudspeaker, LED control module, IO driving circuit, IRCAP circuit.
Circuit arrangement method of the present invention is: be integrated on the larger chip of low pressure process plate-making flow by digital core (CORE), storer (EPROM) and simulation low-pressure section; Simulated high-pressure is partially integrated on the less chip of high-pressure process plate-making flow; Less chip laminate encapsulates on larger chip, possesses individual substrate separately, and arranges insulating gel between the two.
Preferred: the packing forms of employing is SOP16 packaging body, larger chip on lower floor's slide glass island and and between slide glass island, conducting resinl is set; Less chip laminate is on larger chip.
Further preferably: in four limits of larger chip, arrange wherein two adjacent limits not to arrange Pin pin, being arranged near the above-mentioned side without Pin pin by less chip, is the safe distance of 5mil with the distance on the described limit without Pin pin.
Method of the present invention, first overcomes the defect of multi-chip scheme and single chip solution, is that a kind of cost is low, efficiency is high and does not have noisy scheme.Because high and low pressure separately and individual substrate and insulating gel significantly can reduce interference; Dual chip is this to be felt in this circuit of cigarette device between multi-chip and the direct compromise selection of single-chip, and the simplification aspect of cost and peripheral circuit is optimal selection.
Secondly, by removing the Pin pin on low-voltage chip two limits, the less high-voltage chip on upper strata is offset to one jiao, the restriction of chip secure distance to overall dimensions can be reduced, under the prerequisite not increasing lower floor's low-voltage chip size, provide larger area to the high-voltage chip on upper strata as much as possible, improve the reliability of high-voltage chip, make SOP16 be encapsulated into possibility, and stability is higher.Owing to being laminate packaging, so the low-voltage chip size of lower floor determines package dimension, less size can reduce the cost of whole product naturally further.
Accompanying drawing explanation
Fig. 1, existing multi-chip structural map.
Fig. 2, existing single chip architecture schematic diagram.
Fig. 3, the function structure chart of dual chip of the present invention.
Fig. 4, SOP16 packaging and routing figure of the present invention.
Fig. 5, the dual chip laminate packaging routing figure of prior art.
Embodiment
As Fig. 3; smoke-sensitive alarm device of the present invention, comprises digital core (CORE) 1, storer (EPROM) 2, integrating amplifier 3, smog comparer 4, low pressure detection comparator 5, reference circuit 6, oscillator 7, photoelectricity storehouse driving circuit 8, boosting protecting control module 9, drive circuit of loudspeaker 10, LED control module 11, IO driving circuit 12, IRCAP circuit 13(refers to that outside photoelectricity storehouse provides the circuit module of electric current).
Concrete manufacture method is:
1. using integrating amplifier 3, smog comparer 4, low pressure detection comparator 5, reference circuit 6, oscillator 7, photoelectricity storehouse driving circuit 8 as simulation low-pressure section, (for illustrating and understanding conveniently, below referred to as low-voltage chip 20) on the larger chip 20 of low pressure process plate-making flow is integrated in digital core (CORE) 1, storer (EPROM) 2; Protecting control module 9, drive circuit of loudspeaker 10, LED control module 11, IO driving circuit 12, IRCAP circuit 13 will be boosted as simulated high-pressure part, be integrated in high-pressure process plate-making flow less chip on 30(hereinafter referred to as high-voltage chip 30).
2. decide the internal mutual line between high and low pressure chip by the function of simulated high-pressure module, two chips are connected by described internal interconnect, its principle adopts minimum internal interconnect to carry out the module of control simulation high-pressure section, simultaneously assurance function and performance constant: the many interconnection line KA that boosting protecting control module 9 is come by low-pressure section control; Drive circuit of loudspeaker 10 is controlled by KB; LED control module 11 is controlled by KC; IO driving circuit 12 is controlled by KD; IRCAP circuit 13 is controlled by KE.
3. low-voltage chip 20 under, high-voltage chip 30 in upper stack package, inner routing connects Pin pin.Two chips arrange independently substrate separately, and with insulating gel insulation, arrange conducting resinl between the low-voltage chip of lower floor and slide glass island, low-voltage chip edge is the safe distance of 10mil to slide glass island Edge Distance.
SOP16 encapsulation (a kind of have the bilateral pin flat package of drawing Pin outside 16 encapsulation) that the present embodiment adopts, size is about 10.30 × 7.50mm, with low cost, stable performance.
The downside of low-voltage chip 20 and left side do not arrange Pin pin, and high-voltage chip 30 is arranged near the lower left corner, and the downside of high-voltage chip 30, the distance of the corresponding lateral edges of left side distance low-voltage chip 20 are 5mil, are the safe distances of chip design; On the upside of high-voltage chip 30, right side distance low-voltage chip 20, corresponding edge distance is more than 15mil, because this is the both sides having Pin pin, so safe distance requires higher.
16 routings drawing Pin pin outward that concrete high and low pressure chip internal Pin pin and SOP16 encapsulate are connected as shown in Figure 4:
Low-voltage chip 20 is provided with 7 outside Pin pin, high-voltage chip has 11 outside Pin pin.
The routing of low-voltage chip 20:
L1 pin plays 1 line to encapsulation the 1st pin (being labeled as p1 in figure, lower same);
L2 pin plays 1 line to encapsulation the 2nd pin;
L3 pin plays 1 line to encapsulation the 3rd pin;
L4 pin plays 1 line to encapsulation the 4th pin;
L5 pin plays 1 line to encapsulation the 5th pin;
L6 pin plays 1 line to encapsulation the 6th pin;
L7 pin plays 1 line to encapsulation the 7th pin;
The outside Pin pin routing of high-voltage chip 30 illustrates:
S1 pin plays 1 line to encapsulation the 1st pin;
S3 pin plays 1 line to encapsulation the 3rd pin;
S8 pin plays 1 line to encapsulation the 8th pin;
S9 pin plays 1 line to encapsulation the 9th pin;
S10 pin plays 1 line to encapsulation the 10th pin;
S11 pin plays 1 line to encapsulation the 11st pin;
S12 pin plays 1 line to encapsulation the 12nd pin;
S14 pin plays 1 line to encapsulation the 14th pin;
S13 pin plays 1 line to encapsulation the 13rd pin;
S15 pin plays 1 line to encapsulation the 15th pin;
S16 pin plays 1 line to encapsulation the 16th pin;
Two chip internal Pin pin are interconnected:
The SA pin routing KA of high-voltage chip is to the LA pin of low-voltage chip;
The SB pin routing KB of high compressing tablet is to the LB pin of low-voltage chip;
The SC pin routing KC of high compressing tablet is to the LC pin of low-voltage chip;
The SD pin routing KD of high compressing tablet is to the LD pin of low-voltage chip;
The SE pin routing KE of high compressing tablet is to the LE pin of low-voltage chip.
As a comparison, hypothesis adopts prior art to realize smoke-sensitive alarm system of the present invention, levels chip internal composition module is constant, interconnector is constant.Prior art routing figure as Fig. 5: in the SOP16 encapsulation of dual chip, upper strata chip is arranged on centre position instead of as deflection of the present invention a jiao.There is Pin pin on four limits of lower layer chip.
Concrete, the outside Pin pin routing of lower layer chip:
L1 pin plays 1 line to encapsulation the 1st pin (being labeled as p1 in figure, lower same);
L2 pin plays 1 line to encapsulation the 2nd pin;
L3 pin plays 1 line to encapsulation the 3rd pin;
L4 pin plays 1 line to encapsulation the 4th pin;
L6 pin plays 1 line to encapsulation the 6th pin;
L7 pin plays 1 line to encapsulation the 7th pin;
L5 pin plays 1 line to encapsulation the 13rd pin;
The outside Pin pin routing of upper strata chip illustrates:
S1 pin plays 1 line to encapsulation the 1st pin;
S3 pin plays 1 line to encapsulation the 3rd pin;
S13 pin plays 1 line to encapsulation the 5th pin;
S8 pin plays 1 line to encapsulation the 8th pin;
S9 pin plays 1 line to encapsulation the 9th pin;
S10 pin plays 1 line to encapsulation the 10th pin;
S11 pin plays 1 line to encapsulation the 11st pin;
S12 pin plays 1 line to encapsulation the 12nd pin;
S14 pin plays 1 line to encapsulation the 14th pin;
S15 pin plays 1 line to encapsulation the 15th pin;
S16 pin plays 1 line to encapsulation the 16th pin.
Visible, because there is Pin pin on four limits of lower layer chip, so four limits of upper strata chip distance lower layer chip all need identical 15mil safe distance, when lower layer chip and slide glass island size constancy, the area of upper strata chip is obviously less than area of the present invention, owing to being high-pressure modular in the chip of upper strata of the present invention, so larger area can provide more reliable and more stable serviceability.
To sum up, the present invention exceeds prior art one compared to prior art and raises in cost, design difficulty, reliable and stable performance, possess significant progressive and outstanding substantive distinguishing features, be the control chip of this product of smoke-sensitive alarm device manufacture and design the higher design proposal of middle balance.
Claims (3)
1. the wiring method of the control chip design of a smoke-sensitive alarm device, the control chip of described smoke-sensitive alarm device mainly comprises digital core, storer, simulation low-pressure section and simulated high-pressure part, wherein, simulate low-pressure section and comprise integrating amplifier, smog comparer, low pressure detection comparator, reference circuit, oscillator, photoelectricity storehouse driving circuit; Simulated high-pressure part comprises: boosting protecting control module, drive circuit of loudspeaker, LED control module, IO driving circuit, IRCAP circuit;
It is characterized in that: the wiring method realizing the control chip design of above-mentioned smoke-sensitive alarm device is, digital core, storer and simulation low-pressure section is integrated in the larger low-voltage chip of low pressure process plate-making flow; Simulated high-pressure is partially integrated in the less high-voltage chip of high-pressure process plate-making flow; Connect two chips by the internal interconnect between high and low pressure chip, the many interconnection line KA that boosting protecting control module (9) is come by low-pressure section control; Drive circuit of loudspeaker (10) is controlled by KB; LED control module (11) is controlled by KC; IO driving circuit (12) is controlled by KD; IRCAP circuit (13) is controlled by KE;
Less chip laminate encapsulates on larger chip, possesses individual substrate separately, and arranges insulating gel between the two.
2. the wiring method of the control chip design of smoke-sensitive alarm device according to claim 1, is characterized in that: the packing forms of employing is SOP16 packaging body, and larger chip is positioned on lower floor's slide glass island, and arranges conducting resinl between slide glass island; Less chip laminate is on larger chip.
3. the wiring method of the control chip design of smoke-sensitive alarm device according to claim 1 and 2, it is characterized in that: in four limits of larger chip, arrange wherein two adjacent limits not to arrange Pin pin, form two without pin pin limit, being arranged near these two sides without Pin pin limit by less chip, is all safe distances of 5mil with two distances without Pin pin limit.
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| CN201210518113.1A CN102982647B (en) | 2012-12-06 | 2012-12-06 | A kind of wiring method of control chip design of smoke-sensitive alarm device |
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| CN201210518113.1A CN102982647B (en) | 2012-12-06 | 2012-12-06 | A kind of wiring method of control chip design of smoke-sensitive alarm device |
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| CN102982647A CN102982647A (en) | 2013-03-20 |
| CN102982647B true CN102982647B (en) | 2016-03-30 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101504923A (en) * | 2007-06-06 | 2009-08-12 | 株式会社瑞萨科技 | Semiconductor device, its manufacturing method and its testing method |
| CN101740413A (en) * | 2009-12-15 | 2010-06-16 | 天水七四九电子有限公司 | Ceramic small outline package (CSOP) method |
| CN101763707A (en) * | 2009-11-17 | 2010-06-30 | 无锡华润矽科微电子有限公司 | Digital smoke-sensing alarm and alarm method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7317249B2 (en) * | 2004-12-23 | 2008-01-08 | Tessera, Inc. | Microelectronic package having stacked semiconductor devices and a process for its fabrication |
| JP4309368B2 (en) * | 2005-03-30 | 2009-08-05 | エルピーダメモリ株式会社 | Semiconductor memory device |
| US7638868B2 (en) * | 2006-08-16 | 2009-12-29 | Tessera, Inc. | Microelectronic package |
| JP5378707B2 (en) * | 2008-05-29 | 2013-12-25 | ルネサスエレクトロニクス株式会社 | Semiconductor device and manufacturing method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101504923A (en) * | 2007-06-06 | 2009-08-12 | 株式会社瑞萨科技 | Semiconductor device, its manufacturing method and its testing method |
| CN101763707A (en) * | 2009-11-17 | 2010-06-30 | 无锡华润矽科微电子有限公司 | Digital smoke-sensing alarm and alarm method thereof |
| CN101740413A (en) * | 2009-12-15 | 2010-06-16 | 天水七四九电子有限公司 | Ceramic small outline package (CSOP) method |
Non-Patent Citations (1)
| Title |
|---|
| 双层芯片叠层封装的EDA仿真设计;王艳等;《电子与封装》;20071130;第7卷(第11期);第5-17页 * |
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Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180 Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd Address before: No.180-22, Linghu Avenue, Taihu International Science and Technology Park, Wuxi, Jiangsu 214135 Patentee before: WUXI CHINA RESOURCES SEMICO Co.,Ltd. |
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