CN102970128A - Method for achieving automatic switching of seven Chen type chaotic systems and analog circuit - Google Patents

Abstract

The invention provides a method for achieving automatic switching of seven Chen type chaotic systems and an analog circuit. The analog circuit for achieving automatic switching of the seven Chen type chaotic systems is composed of an operational amplifier U1, an operational amplifier U2, an operational amplifier U3, an operational amplifier U5, an operational amplifier U8, a multiplier U4, a multiplier U9, a multiplier U10, a multiplier U11, a multiplier U12, a multiplier U13, a voltage comparator U7 and an analogue switch U6. By means of the analog circuit, automatic switching of the seven Chen type chaotic systems is achieved, the seven sub-systems have different balance points so that the automatic switching of the seven sub-systems with the different balance points is more random than that of sub-systems with same balance points, and generated digital sequences are more applicable to chaos based secret communication and have better application prospects in the chaos based secret communication.

Description

A kind of method and analog circuit of realizing seven system's automatically switched chaotic systems of Chen type

Technical field

The present invention relates to realize seven system's automatic switchover analog circuits, specifically, relate to method and the analog circuit of seven system's automatically switched chaotic systems of a kind of Chen of realization type.

Background technology

At present, oneself has several different methods to realize integer rank and chaotic systems with fractional order and circuit with analog circuit, but the subsystem number that realizes automatically switched chaotic system with analog circuit is fewer, generally be no more than four, and the subsystem of the automatically switched chaotic system that oneself has has identical balance point, the method of a plurality of sub-chaos system automatic switchover and the disclosing of analog circuit that also do not have different balance points, has different balance points in seven sub-systems among the present invention, has larger randomness than the subsystem automatic switchover with identical balance point, the Serial No. that produces is more suitable for for the secure communication based on chaos, has better application prospect in the secure communication based on chaos.

Summary of the invention

For the deficiencies in the prior art, the invention provides method and the analog circuit of seven system's automatically switched chaotic systems of a kind of Chen of realization type, the present invention adopts following technological means to realize goal of the invention:

1, a kind of method that realizes seven system's automatically switched chaotic systems of Chen type is characterized in that being, may further comprise the steps:

(1) according to Chen type chaos system i be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=x^2-\mathrm{bz}\end{array}\right.---\mathrm{ia}=35,b=3,c=28$

(2) according to Chen type chaos system ii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xy}-\mathrm{bz}\end{array}\right.---\mathrm{iia}=35,b=3,c=28$

(3) according to Chen type chaos system iii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=y^2-\mathrm{bz}\end{array}\right.---\mathrm{iiia}=35,b=3,c=28$

(4) according to Chen type chaos system iv be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---\mathrm{iva}=35,b=3,c=28$

(5) according to Chen type chaos system v be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{va}=35,b=3,c=28$

(6) according to sign function vi and vii be:

$\mathrm{sign}\left(x\right)\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{vi}$

$\mathrm{sign}\left(y\right)\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{vii}$

(7) according to Chen type chaos system viii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xign}\left(y\right)-\mathrm{bz}\end{array}\right.---\mathrm{viia}=35,b=3,c=28$

(8) according to Chen type chaos system ix be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{ixa}=35,b=3,c=28$

(9) according to choice function be:

$f\left(\mathrm{xyz}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0,z>0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0,z>0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0,z>0\\ \left|y\right|& x<0,y<0,z>0\\ x^2& x\&GreaterEqual;0,y\&GreaterEqual;0,z\&le;0\\ \mathrm{xy}& x\&GreaterEqual;0,y<0,z\&le;0\\ y^2& x<0,y\&GreaterEqual;0,z\&le;0\\ 0& x<0,y<0,z\&le;0\end{array}\right.---x$

(10) according to Chen type chaos system i-v and viii-ix and a Chen type of the choice function x structure automatically switched chaotic system xi of seven systems:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xyz}\right)-\mathrm{bz}\end{array}\right.---\mathrm{xia}=35,b=3,c=28$

(11) according to chaos system xi constructing analog Circuits System, utilize voltage comparator U7 to obtain the high-low level of three simulations, x 〉=0, x＜0, y 〉=0, y＜0 and z 〉=0, z＜0 is as the control inputs of analog switch U6, according to the various combination situation of three analog levels, realize seven kinds of different outputs of choice function f (xyz), the output concatenation operation amplifier U3 of analog switch U6, thus realize the automatic switchover of seven different chaos systems, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 adopts AD633, and analog switch U6 adopts ADG409, and voltage comparator U7 adopts LM139;

The 1st pin of described operational amplifier U1 joins by resistance R x and the 2nd pin, join by resistance R 1 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 1, the 7th pin connects the 13rd pin by resistance R 13, connect the 2nd pin of U2 by potentiometer R22, connect the 1st pin of U4, connect the 2nd pin of U5 by resistance R a1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, the 1st pin and the 3rd that meets U11 draws and connects, connect the 3rd pin of U12, the 8th pin connects the 9th pin by resistance R 25, and the 13rd pin connects the 14th pin by resistance R 14, and the 14th pin connects the 2nd pin by potentiometer R11;

The 1st pin of described operational amplifier U2 joins by resistance R y and the 2nd pin, join by resistance R 2 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 2, the 7th pin links to each other with the 2nd pin by potentiometer R23, connects the 9th pin of U1 by the R24 of resistance, connects the 2nd pin of U1 by potentiometer R12, connect the 11st pin of U5 by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, connect the 1st pin of U12, connect the 1st pin and the 3rd pin of U13, the 8th pin connects the 9th pin by capacitor C 3, and the 13rd pin connects the 14th pin by resistance R 34, the 14th pin connects the 2nd pin of U3 by potentiometer R32, connects the 3rd pin of U4;

Described operational amplifier U3 the 1st pin joins by resistance R z and the 2nd pin, join by the 9th pin of resistance R 3 with U2, U3 the 2nd pin connects 14 pins of U2 by R32, the 3rd pin ground connection, the 4th pin meets VCC, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

The 1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pins, and the 5th pin meets VEE, and the 7th pin was connected the 2nd pin that resistance R 21 meets U2, and the 8th pin meets VCC;

The 1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, the 2nd pin connects the 7th pin of U1 by resistance R a1, series connection the 1st pin by resistance R a2 and diode D4, series connection the 6th pin by resistance R a1 and resistance R a5, connect the 6th pin by resistance R a3, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by resistance R a4, the 7th pin connects the 6th pin of U6, the 8th pin connects the 4th pin of U6, connects the 9th pin by resistance R a9, and the 9th pin is by series connection the 14th pin of resistance R a8 and diode D6, the 13rd pin is by series connection the 14th pin of resistance R a7 and diode D6, and the 14th pin connects the 13rd pin by diode D5;

The 2nd pin of the 1st pin U7 of described analog switch U6, the 2nd pin, the 13rd pin connects positive 14V power supply, the 3rd pin connects negative 14V power supply, the 4th pin connects the 7th pin of U10, the 5th pin connects the 8th pin of U5, the 6th pin connects the 7th pin of U9, the 7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, and the 9th pin is unsettled, the 10th pin connects the 7th pin of U13, the 11st pin connects the 7th pin of U12, and the 12nd pin connects the 7th pin of U11, the 14th pin ground connection, the 15th pin connects the 1st pin of U7, and the 16th pin connects the 13rd pin of U7;

The 1st pin of described voltage comparator U7 connects positive 14V power supply by resistance R 05, series connection ground connection by diode D7 and resistance R 06, the 2nd pin connects positive 14V power supply by resistance R 01, series connection ground connection by diode D1 and resistance R 02, the 3rd pin connects positive 14V power supply, the 4th pin, the 6th pin, the 10th pin, the 12nd pin ground connection, the 5th pin connects the 7th pin of U1, the 7th pin connects the 8th pin of U2, the 8th pin, the 9th pin, the 14th pin is unsettled, the 11st pin connects the 7th pin of U2, and the 13rd pin connects positive 14V power supply by resistance R 03, by the series connection ground connection of diode D2 and resistance R 03;

The 1st pin of described operational amplifier U8 connects the 6th pin by resistance R s1, the 2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin by resistance R s2, the 7th pin connects the 3rd pin of U10, the 8th pin connects the 3rd pin of U9, and the 9th pin connects the 14th pin by resistance R s3, and the 13rd pin connects the 7th pin of U2;

The 1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 4th pin the 8th pin that the 7th pin meets U6 meets VCC;

The 1st pin of described multiplier U11 and the 3rd pin connect the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 12nd pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U12 and the 7th pin that meets U2, the 3rd pin connects the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 11st pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U13 and the 3rd pin connect the 7th pin of U2, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 10th pin of U6, and the 8th pin meets VCC.

2, a kind of analog circuit of realizing seven system's automatically switched chaotic systems of Chen type, it is characterized in that being, by operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 and multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 and voltage comparator U7 and analog switch U6 form, described operational amplifier U1 connects voltage comparator U7, operational amplifier U2, operational amplifier U5, operational amplifier U8, multiplier U4, multiplier U11, multiplier U12, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U5, voltage comparator U7, operational amplifier U8, multiplier U12, multiplier U13, described operational amplifier U3 concatenation operation amplifier U2, multiplier U4, described operational amplifier U5 connecting analog switch U6, described voltage comparator U7 connecting analog switch U6, described operational amplifier U8 concatenation operation amplifier U5, multiplier U9, multiplier U10, described multiplier U9, multiplier U10, multiplier U11, multiplier U12 and multiplier U13 connecting analog switch U6;

The 1st pin of described operational amplifier U1 joins by resistance R x and the 2nd pin, join by resistance R 1 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 1, the 7th pin connects the 13rd pin by resistance R 13, connect the 2nd pin of U2 by potentiometer R22, connect the 1st pin of U4, connect the 2nd pin of U5 by resistance R a1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, the 1st pin and the 3rd that meets U11 draws and connects, connect the 3rd pin of U12, the 8th pin connects the 9th pin by resistance R 25, and the 13rd pin connects the 14th pin by resistance R 14, and the 14th pin connects the 2nd pin by potentiometer R11;

The 1st pin of described operational amplifier U2 joins by resistance R y and the 2nd pin, join by resistance R 2 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 2, the 7th pin links to each other with the 2nd pin by potentiometer R23, connects the 9th pin of U1 by the R24 of resistance, connects the 2nd pin of U1 by potentiometer R12, connect the 11st pin of U5 by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, connect the 1st pin of U12, connect the 1st pin and the 3rd pin of U13, the 8th pin connects the 9th pin by capacitor C 3, and the 13rd pin connects the 14th pin by resistance R 34, the 14th pin connects the 2nd pin of U3 by potentiometer R32, connects the 3rd pin of U4;

Described operational amplifier U3 the 1st pin joins by resistance R z and the 2nd pin, join by the 9th pin of resistance R 3 with U2, U3 the 2nd pin connects 14 pins of U2 by R32, the 3rd pin ground connection, the 4th pin meets VCC, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

The 1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pins, and the 5th pin meets VEE, and the 7th pin was connected the 2nd pin that resistance R 21 meets U2, and the 8th pin meets VCC;

The 1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, the 2nd pin connects the 7th pin of U1 by resistance R a1, series connection the 1st pin by resistance R a2 and diode D4, series connection the 6th pin by resistance R a1 and resistance R a5, connect the 6th pin by resistance R a3, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by resistance R a4, the 7th pin connects the 6th pin of U6, the 8th pin connects the 4th pin of U6, connects the 9th pin by resistance R a9, and the 9th pin is by series connection the 14th pin of resistance R a8 and diode D6, the 13rd pin is by series connection the 14th pin of resistance R a7 and diode D6, and the 14th pin connects the 13rd pin by diode D5;

The 2nd pin of the 1st pin U7 of described analog switch U6, the 2nd pin, the 13rd pin connects positive 14V power supply, the 3rd pin connects negative 14V power supply, the 4th pin connects the 7th pin of U10, the 5th pin connects the 8th pin of U5, the 6th pin connects the 7th pin of U9, the 7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, and the 9th pin is unsettled, the 10th pin connects the 7th pin of U13, the 11st pin connects the 7th pin of U12, and the 12nd pin connects the 7th pin of U11, the 14th pin ground connection, the 15th pin connects the 1st pin of U7, and the 16th pin connects the 13rd pin of U7;

The 1st pin of described voltage comparator U7 connects positive 14V power supply by resistance R 05, series connection ground connection by diode D7 and resistance R 06, the 2nd pin connects positive 14V power supply by resistance R 01, series connection ground connection by diode D1 and resistance R 02, the 3rd pin connects positive 14V power supply, the 4th pin, the 6th pin, the 10th pin, the 12nd pin ground connection, the 5th pin connects the 7th pin of U1, the 7th pin connects the 8th pin of U2, the 8th pin, the 9th pin, the 14th pin is unsettled, the 11st pin connects the 7th pin of U2, and the 13rd pin connects positive 14V power supply by resistance R 03, by the series connection ground connection of diode D2 and resistance R 03;

The 1st pin of described operational amplifier U8 connects the 6th pin by resistance R s1, the 2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin by resistance R s2, the 7th pin connects the 3rd pin of U10, the 8th pin connects the 3rd pin of U9, and the 9th pin connects the 14th pin by resistance R s3, and the 13rd pin connects the 7th pin of U2;

The 1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 4th pin the 8th pin that the 7th pin meets U6 meets VCC;

The 1st pin of described multiplier U11 and the 3rd pin connect the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 12nd pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U12 and the 7th pin that meets U2, the 3rd pin connects the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 11st pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U13 and the 3rd pin connect the 7th pin of U2, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 10th pin of U6, and the 8th pin meets VCC.

Description of drawings

Fig. 1 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 2 is operational amplifier U1 peripheral circuit structural representation.

Fig. 3 is operational amplifier U2 and multiplier U4 peripheral circuit structural representation.

Fig. 4 is operational amplifier U5 peripheral circuit structural representation.

Fig. 5 is operational amplifier U8, multiplier U9 and multiplier U10 peripheral circuit structural representation.

Fig. 6 is the peripheral circuit structural representation of operational amplifier U3, voltage comparator U7, analog switch U6 and multiplier U11, multiplier U12 and multiplier U13.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment invention is done further to describe in detail.

Referring to Fig. 1-Fig. 6, seven system's automatically switched chaotic systems of structure Chen type, the system that this preferred embodiment is selected:

(1) according to Chen type chaos system i be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=x^2-\mathrm{bz}\end{array}\right.---\mathrm{ia}=35,b=3,c=28$

(2) according to Chen type chaos system ii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xy}-\mathrm{bz}\end{array}\right.---\mathrm{iia}=35,b=3,c=28$

(3) according to Chen type chaos system iii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=y^2-\mathrm{bz}\end{array}\right.---\mathrm{iiia}=35,b=3,c=28$

(4) according to Chen type chaos system iv be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---\mathrm{iva}=35,b=3,c=28$

(5) according to Chen type chaos system v be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{va}=35,b=3,c=28$

(6) according to sign function vi and vii be:

$\mathrm{sign}\left(x\right)\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{vi}$

$\mathrm{sign}\left(y\right)\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{vii}$

(7) according to Chen type chaos system viii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xign}\left(y\right)-\mathrm{bz}\end{array}\right.---\mathrm{viia}=35,b=3,c=28$

(8) according to Chen type chaos system ix be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{ixa}=35,b=3,c=28$

(9) according to choice function be:

$f\left(\mathrm{xyz}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0,z>0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0,z>0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0,z>0\\ \left|y\right|& x<0,y<0,z>0\\ x^2& x\&GreaterEqual;0,y\&GreaterEqual;0,z\&le;0\\ \mathrm{xy}& x\&GreaterEqual;0,y<0,z\&le;0\\ y^2& x<0,y\&GreaterEqual;0,z\&le;0\\ 0& x<0,y<0,z\&le;0\end{array}\right.---x$

(10) according to Chen type chaos system i-v and viii-ix and a Chen type of the choice function x structure automatically switched chaotic system xi of seven systems:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xyz}\right)-\mathrm{bz}\end{array}\right.---\mathrm{xia}=35,b=3,c=28$

(11) according to chaos system xi constructing analog Circuits System, utilize voltage comparator U7 to obtain the high-low level of three simulations, x 〉=0, x＜0, y 〉=0, y＜0 and z 〉=0, z＜0 is as the control inputs of analog switch U6, according to the various combination situation of three analog levels, realize seven kinds of different outputs of choice function f (xyz), the output concatenation operation amplifier U3 of analog switch U6, thus realize the automatic switchover of seven different chaos systems, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 adopts AD633, and analog switch U6 adopts ADG409, and voltage comparator U7 adopts LM139;

Described a kind of analog circuit of seven system's automatically switched chaotic systems of Chen type of realizing is by operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 and multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 and voltage comparator U7 and analog switch U6 form, described operational amplifier U1 connects voltage comparator U7, operational amplifier U2, operational amplifier U5, operational amplifier U8, multiplier U4, multiplier U11, multiplier U12, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U5, voltage comparator U7, operational amplifier U8, multiplier U12, multiplier U13, described operational amplifier U3 concatenation operation amplifier U2, multiplier U4, described operational amplifier U5 connecting analog switch U6, described voltage comparator U7 connecting analog switch U6, described operational amplifier U8 concatenation operation amplifier U5, multiplier U9, multiplier U10, described multiplier U9, multiplier U10, multiplier U11, multiplier U12 and multiplier U13 connecting analog switch U6;

The 1st pin of described operational amplifier U1 joins by resistance R x and the 2nd pin, join by resistance R 1 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 1, the 7th pin connects the 13rd pin by resistance R 13, connect the 2nd pin of U2 by potentiometer R22, connect the 1st pin of U4, connect the 2nd pin of U5 by resistance R a1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, the 1st pin and the 3rd that meets U11 draws and connects, connect the 3rd pin of U12, the 8th pin connects the 9th pin by resistance R 25, and the 13rd pin connects the 14th pin by resistance R 14, and the 14th pin connects the 2nd pin by potentiometer R11;

The 1st pin of described operational amplifier U2 joins by resistance R y and the 2nd pin, join by resistance R 2 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 2, the 7th pin links to each other with the 2nd pin by potentiometer R23, connects the 9th pin of U1 by the R24 of resistance, connects the 2nd pin of U1 by potentiometer R12, connect the 11st pin of U5 by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, connect the 1st pin of U12, connect the 1st pin and the 3rd pin of U13, the 8th pin connects the 9th pin by capacitor C 3, and the 13rd pin connects the 14th pin by resistance R 34, the 14th pin connects the 2nd pin of U3 by potentiometer R32, connects the 3rd pin of U4;

Described operational amplifier U3 the 1st pin joins by resistance R z and the 2nd pin, join by the 9th pin of resistance R 3 with U2, U3 the 2nd pin connects 14 pins of U2 by R32, the 3rd pin ground connection, the 4th pin meets VCC, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

The 1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pins, and the 5th pin meets VEE, and the 7th pin was connected the 2nd pin that resistance R 21 meets U2, and the 8th pin meets VCC;

The 1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, the 2nd pin connects the 7th pin of U1 by resistance R a1, series connection the 1st pin by resistance R a2 and diode D4, series connection the 6th pin by resistance R a1 and resistance R a5, connect the 6th pin by resistance R a3, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by resistance R a4, the 7th pin connects the 6th pin of U6, the 8th pin connects the 4th pin of U6, connects the 9th pin by resistance R a9, and the 9th pin is by series connection the 14th pin of resistance R a8 and diode D6, the 13rd pin is by series connection the 14th pin of resistance R a7 and diode D6, and the 14th pin connects the 13rd pin by diode D5;

The 2nd pin of the 1st pin U7 of described analog switch U6, the 2nd pin, the 13rd pin connects positive 14V power supply, the 3rd pin connects negative 14V power supply, the 4th pin connects the 7th pin of U10, the 5th pin connects the 8th pin of U5, the 6th pin connects the 7th pin of U9, the 7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, and the 9th pin is unsettled, the 10th pin connects the 7th pin of U13, the 11st pin connects the 7th pin of U12, and the 12nd pin connects the 7th pin of U11, the 14th pin ground connection, the 15th pin connects the 1st pin of U7, and the 16th pin connects the 13rd pin of U7;

The 1st pin of described voltage comparator U7 connects positive 14V power supply by resistance R 05, series connection ground connection by diode D7 and resistance R 06, the 2nd pin connects positive 14V power supply by resistance R 01, series connection ground connection by diode D1 and resistance R 02, the 3rd pin connects positive 14V power supply, the 4th pin, the 6th pin, the 10th pin, the 12nd pin ground connection, the 5th pin connects the 7th pin of U1, the 7th pin connects the 8th pin of U2, the 8th pin, the 9th pin, the 14th pin is unsettled, the 11st pin connects the 7th pin of U2, and the 13rd pin connects positive 14V power supply by resistance R 03, by the series connection ground connection of diode D2 and resistance R 03;

The 1st pin of described operational amplifier U8 connects the 6th pin by resistance R s1, the 2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin by resistance R s2, the 7th pin connects the 3rd pin of U10, the 8th pin connects the 3rd pin of U9, and the 9th pin connects the 14th pin by resistance R s3, and the 13rd pin connects the 7th pin of U2;

The 1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 4th pin the 8th pin that the 7th pin meets U6 meets VCC;

The 1st pin of described multiplier U11 and the 3rd pin connect the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 12nd pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U12 and the 7th pin that meets U2, the 3rd pin connects the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 11st pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U13 and the 3rd pin connect the 7th pin of U2, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 10th pin of U6, and the 8th pin meets VCC.

Certainly, above-mentioned explanation is not the restriction to invention, and the present invention also is not limited only to above-mentioned giving an example, and the variation that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement also belong to protection scope of the present invention.

Claims (2)

1. a method that realizes seven system's automatically switched chaotic systems of Chen type is characterized in that being, may further comprise the steps:

(1) according to Chen type chaos system i be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=x^2-\mathrm{bz}\end{array}\right.---\mathrm{ia}=35,b=3,c=28$

(2) according to Chen type chaos system ii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xy}-\mathrm{bz}\end{array}\right.---\mathrm{iia}=35,b=3,c=28$

(3) according to Chen type chaos system iii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=y^2-\mathrm{bz}\end{array}\right.---\mathrm{iiia}=35,b=3,c=28$

(4) according to Chen type chaos system iv be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---\mathrm{iva}=35,b=3,c=28$

(5) according to Chen type chaos system v be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{va}=35,b=3,c=28$

(6) according to sign function vi and vii be:

$\mathrm{sign}\left(x\right)\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{vi}$

$\mathrm{sign}\left(y\right)\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{vii}$

(7) according to Chen type chaos system viii be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xign}\left(y\right)-\mathrm{bz}\end{array}\right.---\mathrm{viia}=35,b=3,c=28$

(8) according to Chen type chaos system ix be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{ixa}=35,b=3,c=28$

(9) according to choice function be:

$f\left(\mathrm{xyz}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0,z>0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0,z>0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0,z>0\\ \left|y\right|& x<0,y<0,z>0\\ x^2& x\&GreaterEqual;0,y\&GreaterEqual;0,z\&le;0\\ \mathrm{xy}& x\&GreaterEqual;0,y<0,z\&le;0\\ y^2& x<0,y\&GreaterEqual;0,z\&le;0\\ 0& x<0,y<0,z\&le;0\end{array}\right.---x$

(10) according to Chen type chaos system i-v and viii-ix and a Chen type of the choice function x structure automatically switched chaotic system xi of seven systems:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xyz}\right)-\mathrm{bz}\end{array}\right.---\mathrm{xia}=35,b=3,c=28$

(11) according to chaos system xi constructing analog Circuits System, utilize voltage comparator U7 to obtain the high-low level of three simulations, x 〉=0, x＜0, y 〉=0, y＜0 and z 〉=0, z＜0 is as the control inputs of analog switch U6, according to the various combination situation of three analog levels, realize seven kinds of different outputs of choice function f (xyz), the output concatenation operation amplifier U3 of analog switch U6, thus realize the automatic switchover of seven different chaos systems, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 adopts AD633, and analog switch U6 adopts ADG409, and voltage comparator U7 adopts LM139;

The 1st pin of described operational amplifier U1 joins by resistance R x and the 2nd pin, join by resistance R 1 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 1, the 7th pin connects the 13rd pin by resistance R 13, connect the 2nd pin of U2 by potentiometer R22, connect the 1st pin of U4, connect the 2nd pin of U5 by resistance R a1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, the 1st pin and the 3rd that meets U11 draws and connects, connect the 3rd pin of U12, the 8th pin connects the 9th pin by resistance R 25, and the 13rd pin connects the 14th pin by resistance R 14, and the 14th pin connects the 2nd pin by potentiometer R11;

The 1st pin of described operational amplifier U2 joins by resistance R y and the 2nd pin, join by resistance R 2 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 2, the 7th pin links to each other with the 2nd pin by potentiometer R23, connects the 9th pin of U1 by the R24 of resistance, connects the 2nd pin of U1 by potentiometer R12, connect the 11st pin of U5 by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, connect the 1st pin of U12, connect the 1st pin and the 3rd pin of U13, the 8th pin connects the 9th pin by capacitor C 3, and the 13rd pin connects the 14th pin by resistance R 34, the 14th pin connects the 2nd pin of U3 by potentiometer R32, connects the 3rd pin of U4;

Described operational amplifier U3 the 1st pin joins by resistance R z and the 2nd pin, join by the 9th pin of resistance R 3 with U2, U3 the 2nd pin connects 14 pins of U2 by R32, the 3rd pin ground connection, the 4th pin meets VCC, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

The 1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pins, and the 5th pin meets VEE, and the 7th pin was connected the 2nd pin that resistance R 21 meets U2, and the 8th pin meets VCC;

The 1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, the 2nd pin connects the 7th pin of U1 by resistance R a1, series connection the 1st pin by resistance R a2 and diode D4, series connection the 6th pin by resistance R a1 and resistance R a5, connect the 6th pin by resistance R a3, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by resistance R a4, the 7th pin connects the 6th pin of U6, the 8th pin connects the 4th pin of U6, connects the 9th pin by resistance R a9, and the 9th pin is by series connection the 14th pin of resistance R a8 and diode D6, the 13rd pin is by series connection the 14th pin of resistance R a7 and diode D6, and the 14th pin connects the 13rd pin by diode D5;

The 2nd pin of the 1st pin U7 of described analog switch U6, the 2nd pin, the 13rd pin connects positive 14V power supply, the 3rd pin connects negative 14V power supply, the 4th pin connects the 7th pin of U10, the 5th pin connects the 8th pin of U5, the 6th pin connects the 7th pin of U9, the 7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, and the 9th pin is unsettled, the 10th pin connects the 7th pin of U13, the 11st pin connects the 7th pin of U12, and the 12nd pin connects the 7th pin of U11, the 14th pin ground connection, the 15th pin connects the 1st pin of U7, and the 16th pin connects the 13rd pin of U7;

The 1st pin of described voltage comparator U7 connects positive 14V power supply by resistance R 05, series connection ground connection by diode D7 and resistance R 06, the 2nd pin connects positive 14V power supply by resistance R 01, series connection ground connection by diode D1 and resistance R 02, the 3rd pin connects positive 14V power supply, the 4th pin, the 6th pin, the 10th pin, the 12nd pin ground connection, the 5th pin connects the 7th pin of U1, the 7th pin connects the 8th pin of U2, the 8th pin, the 9th pin, the 14th pin is unsettled, the 11st pin connects the 7th pin of U2, and the 13rd pin connects positive 14V power supply by resistance R 03, by the series connection ground connection of diode D2 and resistance R 03;

The 1st pin of described operational amplifier U8 connects the 6th pin by resistance R s1, the 2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin by resistance R s2, the 7th pin connects the 3rd pin of U10, the 8th pin connects the 3rd pin of U9, and the 9th pin connects the 14th pin by resistance R s3, and the 13rd pin connects the 7th pin of U2;

The 1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 4th pin the 8th pin that the 7th pin meets U6 meets VCC;

The 1st pin of described multiplier U11 and the 3rd pin connect the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 12nd pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U12 and the 7th pin that meets U2, the 3rd pin connects the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 11st pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U13 and the 3rd pin connect the 7th pin of U2, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 10th pin of U6, and the 8th pin meets VCC.

2. analog circuit of realizing seven system's automatically switched chaotic systems of Chen type, it is characterized in that being, by operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 and multiplier U4, multiplier U9, multiplier U10, multiplier U11, multiplier U12, multiplier U13 and voltage comparator U7 and analog switch U6 form, described operational amplifier U1 connects voltage comparator U7, operational amplifier U2, operational amplifier U5, operational amplifier U8, multiplier U4, multiplier U11, multiplier U12, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U5, voltage comparator U7, operational amplifier U8, multiplier U12, multiplier U13, described operational amplifier U3 concatenation operation amplifier U2, multiplier U4, described operational amplifier U5 connecting analog switch U6, described voltage comparator U7 connecting analog switch U6, described operational amplifier U8 concatenation operation amplifier U5, multiplier U9, multiplier U10, described multiplier U9, multiplier U10, multiplier U11, multiplier U12 and multiplier U13 connecting analog switch U6;

The 1st pin of described operational amplifier U1 joins by resistance R x and the 2nd pin, join by resistance R 1 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 1, the 7th pin connects the 13rd pin by resistance R 13, connect the 2nd pin of U2 by potentiometer R22, connect the 1st pin of U4, connect the 2nd pin of U5 by resistance R a1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, the 1st pin and the 3rd that meets U11 draws and connects, connect the 3rd pin of U12, the 8th pin connects the 9th pin by resistance R 25, and the 13rd pin connects the 14th pin by resistance R 14, and the 14th pin connects the 2nd pin by potentiometer R11;

The 1st pin of described operational amplifier U2 joins by resistance R y and the 2nd pin, join by resistance R 2 and the 6th pin, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 2, the 7th pin links to each other with the 2nd pin by potentiometer R23, connects the 9th pin of U1 by the R24 of resistance, connects the 2nd pin of U1 by potentiometer R12, connect the 11st pin of U5 by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, connect the 1st pin of U12, connect the 1st pin and the 3rd pin of U13, the 8th pin connects the 9th pin by capacitor C 3, and the 13rd pin connects the 14th pin by resistance R 34, the 14th pin connects the 2nd pin of U3 by potentiometer R32, connects the 3rd pin of U4;

Described operational amplifier U3 the 1st pin joins by resistance R z and the 2nd pin, join by the 9th pin of resistance R 3 with U2, U3 the 2nd pin connects 14 pins of U2 by R32, the 3rd pin ground connection, the 4th pin meets VCC, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

The 1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pins, and the 5th pin meets VEE, and the 7th pin was connected the 2nd pin that resistance R 21 meets U2, and the 8th pin meets VCC;

The 1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, the 2nd pin connects the 7th pin of U1 by resistance R a1, series connection the 1st pin by resistance R a2 and diode D4, series connection the 6th pin by resistance R a1 and resistance R a5, connect the 6th pin by resistance R a3, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by resistance R a4, the 7th pin connects the 6th pin of U6, the 8th pin connects the 4th pin of U6, connects the 9th pin by resistance R a9, and the 9th pin is by series connection the 14th pin of resistance R a8 and diode D6, the 13rd pin is by series connection the 14th pin of resistance R a7 and diode D6, and the 14th pin connects the 13rd pin by diode D5;

The 2nd pin of the 1st pin U7 of described analog switch U6, the 2nd pin, the 13rd pin connects positive 14V power supply, the 3rd pin connects negative 14V power supply, the 4th pin connects the 7th pin of U10, the 5th pin connects the 8th pin of U5, the 6th pin connects the 7th pin of U9, the 7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, and the 9th pin is unsettled, the 10th pin connects the 7th pin of U13, the 11st pin connects the 7th pin of U12, and the 12nd pin connects the 7th pin of U11, the 14th pin ground connection, the 15th pin connects the 1st pin of U7, and the 16th pin connects the 13rd pin of U7;

The 1st pin of described voltage comparator U7 connects positive 14V power supply by resistance R 05, series connection ground connection by diode D7 and resistance R 06, the 2nd pin connects positive 14V power supply by resistance R 01, series connection ground connection by diode D1 and resistance R 02, the 3rd pin connects positive 14V power supply, the 4th pin, the 6th pin, the 10th pin, the 12nd pin ground connection, the 5th pin connects the 7th pin of U1, the 7th pin connects the 8th pin of U2, the 8th pin, the 9th pin, the 14th pin is unsettled, the 11st pin connects the 7th pin of U2, and the 13rd pin connects positive 14V power supply by resistance R 03, by the series connection ground connection of diode D2 and resistance R 03;

The 1st pin of described operational amplifier U8 connects the 6th pin by resistance R s1, the 2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin by resistance R s2, the 7th pin connects the 3rd pin of U10, the 8th pin connects the 3rd pin of U9, and the 9th pin connects the 14th pin by resistance R s3, and the 13rd pin connects the 7th pin of U2;

The 1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 4th pin the 8th pin that the 7th pin meets U6 meets VCC;

The 1st pin of described multiplier U11 and the 3rd pin connect the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 12nd pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U12 and the 7th pin that meets U2, the 3rd pin connects the 7th pin of U1, the 2nd pin, the 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 11st pin of U6, and the 8th pin meets VCC;

The 1st pin of described multiplier U13 and the 3rd pin connect the 7th pin of U2, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 10th pin of U6, and the 8th pin meets VCC.

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