CN104301090A - Four-dimensional chaotic system circuit with time-lag items - Google Patents

Four-dimensional chaotic system circuit with time-lag items Download PDF

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CN104301090A
CN104301090A CN201410512490.3A CN201410512490A CN104301090A CN 104301090 A CN104301090 A CN 104301090A CN 201410512490 A CN201410512490 A CN 201410512490A CN 104301090 A CN104301090 A CN 104301090A
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circuit
resistance
multiplier
fractional order
exponent number
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CN104301090B (en
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闵富红
黄雯迪
王恩荣
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Nanjing Normal University
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Abstract

The invention discloses a four-dimensional chaotic system circuit with time-lag items. The four-dimensional chaotic system circuit comprises a first channel circuit, a second channel circuit, a third channel circuit and a fourth channel circuit. The first channel circuit is composed of a multiplying unit A1, a phase inverter U1A, a phase inverter U2A, an antiphase integrator U3A, a time-lag unit and a resistor. The second channel circuit is composed of a multiplying unit A2, a phase inverter U4A, an antiphase integrator U5A and a resistor. The third channel circuit is composed of a multiplying unit A3, a phase inverter U6A, an antiphase integrator U7A and a resistor. The fourth channel circuit is composed of a multiplying unit A4, a multiplying unit A5, a phase inverter U9A, an antiphase integrator U10A and a resistor. According to the four-dimensional chaotic system circuit with the time-lag items, elements and element parameter values in the circuit units are changed so that eleven kinds of four-dimensional fractional order chaotic circuits with time-lag items can be achieved, and all the chaotic system circuits have respective chaotic dynamics behaviors. If the output signals of the system are used in the secrete communication field, and the confidentiality can be greatly improved.

Description

Four dimensional chaos system circuit containing time lag item
Technical field
What the present invention relates to is four dimensional chaos system circuit containing time lag item, belongs to the technical field of chaos signal generator design.
Background technology
Since the Lorenz of the Massachusetts Institute of Technology in 1963 has found first chaos attractor, start the upsurge of research chaology and practical application.Chaotic signal has the characteristics such as aperiodic, continuous wide band frequency spectrum, noise like, abundant Design of Signal and mechanism can be provided, and time-delayed chaotic system can produce infinite dimensional state space, system is made to have complicated dynamics, continuous discovery and the structure of new time-delayed chaotic system can enrich chaology, deepen the understanding to chaos phenomenon.
At present, chaos science is transitioned into practical stage from theoretical research gradually, and circuit realiration be confirm chaos attractor existence and applied to the most direct approach of engineering field, design has the time-delayed chaotic system circuit of complex nonlinear item, and its integer rank chaos system is expanded to chaotic systems with fractional order, the dynamics of system can be reflected exactly.In addition, by changing chaos system order (namely changing chaos system circuit unit structure), the chaos system circuit of different rank can be designed.If by this type of time-delayed chaotic system circuit application in the experimental teaching of nonlinear circuit, the intuitive to nonlinear circuit design can be increased, and this type of chaos system circuit has good application prospect in secure communication field.
Summary of the invention
The object of this invention is to provide a kind of chaos system circuit, utilize the coding and decoding technology of its system output signal can realize the secure communication of chaotic signal, in addition, this chaos system circuit can be applied to nonlinear circuit education experiment equally.
The technical solution used in the present invention is:
Four dimensional chaos system circuit containing time lag item, this circuit is made up of four channel circuits: first passage circuit is by multiplier A1, inverter U1A, inverter U2A, inverting integrator U3A, time lag unit and resistance R1, R2, R3, R4, R5, R6, R7 and R8 forms, second channel circuit is by multiplier A2, inverter U4A, inverting integrator U5A and resistance R9, R10, R11 and R12 forms, third channel circuit is by multiplier A3, inverter U6A, inverting integrator U7A and resistance R13, R14, R15, R16 and R17 forms, four-way circuit is by multiplier A4, multiplier A5, inverter U9A, inverting integrator U10A and resistance R18, R19, R20 and R21 forms, the output signal of first passage circuit feeds back to input, one end contact resistance R4 and time lag unit are as a road input signal, other end contact resistance R8 is as another road input signal, and this output signal is also respectively as a road input signal of the multiplier A5 in the multiplier A2 in second channel circuit, the multiplier A3 in third channel circuit and four-way circuit, the output signal of second channel circuit feeds back to input, contact resistance R9 is as a road input signal, and this output signal is also respectively as a road input signal of the multiplier A4 in the multiplier A1 in first passage circuit, the multiplier A3 in third channel circuit and four-way circuit, the output signal of third channel circuit feeds back to input, contact resistance R16 is as a road input signal, also respectively as the multiplier A1 in first passage circuit and the multiplier A2 Zhong mono-road input signal in second channel circuit, this output signal also connects multiplier A4 and A5 respectively and acts on four-way, the output signal of four-way circuit feeds back to input and is connected as a road input signal with the resistance R15 in third channel circuit, and this output signal is also connected as a road input signal with the resistance R5 in first passage.
Described inverting integrator comprises inverter and circuit unit, and when circuit unit is single electric capacity, described four dimensional chaos system circuit is four-dimensional integer rank chaos system circuit; When circuit unit is formed by the mutual Hybrid connections of several resistance capacitance parallel circuitss, described four dimensional chaos system circuit is four-dimensional fractional order chaotic system circuit.Exponent number due to fractional order circuit unit is 0.90-0.99, then define ten kinds of four-dimensional fractional order chaotic system circuit containing time lag item, and first passage circuit mid-score rank inverting integrator U3A exports as X signal; Second channel circuit mid-score rank inverting integrator U5A exports as Y-signal; Third channel circuit mid-score rank inverting integrator U7A exports as Z signal; Four-way circuit mid-score rank inverting integrator U10A exports as W signal.
Described time lag unit comprises two inverters, two resistance and ten T-shaped LCL filter, wherein T-shaped LCL filter is composed in parallel between two by two inductance and an electric capacity, each inductance is 9.5mH, electric capacity is 525nF, input signal is first by an inverter, connect the resistance of a 1K Ω again, be connected the resistance of a 1K Ω after then connecting with ten T-shaped LCL filter again, finally by another inverter, signal exported.
The present invention devises novel fractional order circuit unit, successfully achieve the circuit unit that fractional order exponent number is 0.90 to 0.99, and utilize analog circuit to achieve 11 kinds of chaos system time-lag networks, often kind of chaos system circuit all has respective chaotic dynamics behavior, therefore, this type of chaos system has complicated dynamics, if the output signal of this system is used in secure communication field, greatly can improve confidentiality.The invention has the advantages that: (1) adds time lag unit on the basis of traditional chaos system circuit, and is expanded to fractional order field, have more practical study and be worth; (2) circuit system in the present invention has complicated nonlinear dynamic characteristic, and the coding and decoding technology of this signal can be utilized to realize the secure communication of chaotic signal.
Accompanying drawing explanation
Fig. 1 is basic circuit diagram of the present invention;
Fig. 2 is integer rank chaos system circuit diagrams;
Fig. 3 is time lag cellular construction figure;
Fig. 4 to be fractional order exponent number be 0.90 circuit unit structure chart;
Fig. 5 to be fractional order exponent number be 0.91 circuit unit structure chart;
Fig. 6 to be fractional order exponent number be 0.92 circuit unit structure chart;
Fig. 7 to be fractional order exponent number be 0.93 circuit unit structure chart;
Fig. 8 to be fractional order exponent number be 0.94 circuit unit structure chart;
Fig. 9 to be fractional order exponent number be 0.95 circuit unit structure chart;
Figure 10 to be fractional order exponent number be 0.96 circuit unit structure chart;
Figure 11 to be fractional order exponent number be 0.97 circuit unit structure chart;
Figure 12 to be fractional order exponent number be 0.98 circuit unit structure chart;
Figure 13 to be fractional order exponent number be 0.99 circuit unit structure chart;
Figure 14 is integer rank chaos system circuit X-Y phase-plane diagrams;
Figure 15 to be fractional order exponent number be 0.90 chaos system circuit X-Y phase-plane diagram;
Figure 16 to be fractional order exponent number be 0.91 chaos system circuit X-Y phase-plane diagram;
Figure 17 to be fractional order exponent number be 0.92 chaos system circuit X-Y phase-plane diagram;
Figure 18 to be fractional order exponent number be 0.93 chaos system circuit X-Y phase-plane diagram;
Figure 19 to be fractional order exponent number be 0.94 chaos system circuit X-Y phase-plane diagram;
Figure 20 to be fractional order exponent number be 0.95 chaos system circuit X-Y phase-plane diagram;
Figure 21 to be fractional order exponent number be 0.96 chaos system circuit X-Y phase-plane diagram;
Figure 22 to be fractional order exponent number be 0.97 chaos system circuit X-Y phase-plane diagram;
Figure 23 to be fractional order exponent number be 0.98 chaos system circuit X-Y phase-plane diagram;
Figure 24 to be fractional order exponent number be 0.99 chaos system circuit X-Y phase-plane diagram.
Embodiment
Below in conjunction with accompanying drawing and concrete enforcement, the present invention is described in further detail.
Mathematical Modeling involved in the present invention is as follows:
d q x dt q = - 17 x + 5 yz + 4 w + x ( t - τ ) , d q y dt q = 2 y - 8 xz , d q z dt q = - 6 z + 2 xy - 5 w , d q w dt q = - xz + 5 yz .
In formula, x, y, z, w are state variable, and q is exponent number, and as q=1, system is integer rank chaos systems, and as q < 1, system is chaotic systems with fractional order.τ is time lag item, and its coefficient is not fixed value, can obtain according to numerical simulation, and in the present invention, 11 kinds of chaos systems containing time lag item are when time lag variable τ=1, be all in chaos state, and system are comparatively stable, so the present invention selects time lag variable τ=1.Time lag cellular construction figure corresponding thereto as shown in Figure 3, time lag unit comprises two inverters, two resistance and ten T-shaped LCL filter, wherein T-shaped LCL filter is composed in parallel between two by two inductance and an electric capacity, each inductance is 9.5mH, electric capacity is 525nF, and input signal first by an inverter, then connects the resistance of a 1K Ω, then be connected the resistance of a 1K Ω after connecting with ten T-shaped LCL filter again, finally by another inverter, signal exported.This invention also has good autgmentability, can change the size of time lag variable as required, such as, during τ=2 of hysteresis amount when changes are needed, then can be obtained by series winding two time lag unit.Like this changing form is all based on the present invention, will will not enumerate at this.
Artificial circuit involved in the present invention is made up of first, second, third and fourth channel circuit, and first, second, third, fourth channel circuit realizes first, second, third, fourth function in above-mentioned Mathematical Modeling respectively.
As shown in Figure 1, the present invention contains the four dimensional chaos system circuit of time lag item, is made up of four channel circuits: first passage circuit mid-score rank inverting integrator U3A output is X signal; Second channel circuit mid-score rank inverting integrator U5A output is Y-signal; Third channel circuit mid-score rank inverting integrator U7A output is Z signal; Four-way circuit mid-score rank inverting integrator U10A output is in W signal circuit, and resistance capacitance is standard component, and the model of amplifier is TL082CP; The power values of operational amplifier is 15V.
As shown in Figure 2, integer rank of the present invention chaos system circuit: first passage circuit is by multiplier A1, inverter U1A, inverter U2A, inverting integrator U3A, time lag unit and resistance R1, R2, R3, R4, R5, R6, R7 and R8 forms, second channel circuit is by multiplier A2, inverter U4A, inverting integrator U5A and resistance R9, R10, R11 and R12 forms, third channel circuit is by multiplier A3, inverter U6A, inverting integrator U7A and resistance R13, R14, R15, R16 and R17 forms, four-way circuit is by multiplier A4, multiplier A5, inverter U9A, inverting integrator U10A and resistance R18, R19, R20 and R21 forms, the output signal of first passage circuit feeds back to input, one end contact resistance R4 and time lag unit are as a road input signal, other end contact resistance R8 is as another road input signal, and this output signal is also respectively as a road input signal of the multiplier A5 in the multiplier A2 in second channel circuit, the multiplier A3 in third channel circuit and four-way circuit, the output signal of second channel circuit feeds back to input, contact resistance R9 is as a road input signal, and this output signal is also respectively as a road input signal of the multiplier A4 in the multiplier A1 in first passage circuit, the multiplier A3 in third channel circuit and four-way circuit, the output signal of third channel circuit feeds back to input, contact resistance R16 is as a road input signal, also respectively as the multiplier A1 in first passage circuit and the multiplier A2 Zhong mono-road input signal in second channel circuit, this output signal also connects multiplier A4 and A5 respectively and acts on four-way, the output signal of four-way circuit feeds back to input and is connected as a road input signal with the resistance R15 in third channel circuit, and this output signal is also connected as a road input signal with the resistance R5 in first passage.
Mid-score rank of the present invention exponent number is 0.90,0.91,0.92,0.93,0.94,0.95,0.96,0.97,0.98, the fractional order circuit cellular construction figure of 0.99 is respectively as shown in Fig. 4,5,6,7,8,9,10,11,12,13.
Above-mentioned ten kinds containing the resistance value in the fractional order element circuit in the four-dimensional fractional order chaotic system circuit of time lag item, capacitance are:
Table 1 resistance value
q n R 1/MΩ R 2/MΩ R 3/MΩ R 4/MΩ
0.9 4 40.0753 20.1443 2.6122 0.2574
0.91 4 48.3909 17.8034 1.6909 0.1288
0.92 4 53.5260 14.6340 0.9585 0.0531
0.93 3 61.0797 10.9216 0.4448 ?
0.94 3 68.6834 7.0126 0.1592 ?
0.95 3 75.8351 3.5637 0.0367 ?
0.96 3 81.9473 1.2210 0.0039 ?
0.97 2 86.9046 0.1913 ? ?
0.98 2 91.1831 0.0044 ? ?
0.99 2 95.5402 4.6107×10 -8 ? ?
Table 2 capacitance
q n C 1/μF C 2/μF C 3/μF C 4/μF
0.9 4 0.5973 0.2714 0.2268 0.6472
0.91 4 0.4863 0.2484 0.2070 0.6242
0.92 4 0.4089 0.2296 0.1894 0.6020
0.93 3 0.3432 0.2245 0.7435 ?
0.94 3 0.2934 0.2065 0.7148 ?
0.95 3 0.2578 0.1916 0.6868 ?
0.96 3 0.2324 0.1801 0.6601 ?
0.97 2 0.2159 0.8045 ? ?
0.98 2 0.2043 0.7710 ? ?
0.99 2 0.1931 0.7386 ? ?
Wherein, q fractional order exponent number, n is the number of resistance, electric capacity.
Breadboardin emulation is carried out to above-mentioned 11 kinds of four dimensional chaos systems containing time lag item, the phase-plane diagram obtained is respectively as shown in Figure 14,15,16,17,18,19,20,21,22,23,24, and the chaos attractor obtained has good ergodic and boundedness etc.But due to the difference of fractional order order, the forms of motion of chaos attractor also has some to distinguish.This kind of chaotic systems with fractional order can carry out circuit realiration, so have very high researching value.

Claims (5)

1. the four dimensional chaos system circuit containing time lag item, it is characterized in that: this circuit is made up of four channel circuits: first passage circuit is by multiplier A1, inverter U1A, inverter U2A, inverting integrator U3A, time lag unit and resistance R1, R2, R3, R4, R5, R6, R7 and R8 forms, second channel circuit is by multiplier A2, inverter U4A, inverting integrator U5A and resistance R9, R10, R11 and R12 forms, third channel circuit is by multiplier A3, inverter U6A, inverting integrator U7A and resistance R13, R14, R15, R16 and R17 forms, four-way circuit is by multiplier A4, multiplier A5, inverter U9A, inverting integrator U10A and resistance R18, R19, R20 and R21 forms,
The output signal of first passage circuit feeds back to input, one end contact resistance R4 and time lag unit are as a road input signal, other end contact resistance R8 is as another road input signal, and this output signal is also respectively as a road input signal of the multiplier A5 in the multiplier A2 in second channel circuit, the multiplier A3 in third channel circuit and four-way circuit;
The output signal of second channel circuit feeds back to input, contact resistance R9 is as a road input signal, and this output signal is also respectively as a road input signal of the multiplier A4 in the multiplier A1 in first passage circuit, the multiplier A3 in third channel circuit and four-way circuit;
The output signal of third channel circuit feeds back to input, contact resistance R16 is as a road input signal, also respectively as the multiplier A1 in first passage circuit and the multiplier A2 Zhong mono-road input signal in second channel circuit, this output signal also connects multiplier A4 and A5 respectively and acts on four-way;
The output signal of four-way circuit feeds back to input and is connected as a road input signal with the resistance R15 in third channel circuit, and this output signal is also connected as a road input signal with the resistance R5 in first passage.
2. the four dimensional chaos system circuit containing time lag item according to claim 1, it is characterized in that: described inverting integrator comprises inverter and circuit unit, when circuit unit is single electric capacity, described four dimensional chaos system circuit is integer rank chaos system circuit; When circuit unit is formed by the mutual Hybrid connections of several resistance capacitance parallel circuitss, described four dimensional chaos system circuit is fractional order chaotic system circuit.
3. the four dimensional chaos system circuit containing time lag item according to claim 1 and 2, it is characterized in that: described time lag unit comprises two inverters, two resistance and ten T-shaped LCL filter, wherein T-shaped LCL filter is composed in parallel between two by two inductance and an electric capacity, each inductance is 9.5mH, electric capacity is 525nF, input signal is first by an inverter, connect the resistance of a 1K Ω again, then be connected the resistance of a 1K Ω after connecting with ten T-shaped LCL filter again, finally by another inverter, signal exported.
4. the four dimensional chaos system circuit containing time lag item according to claim 3, is characterized in that: described fractional order exponent number is 0.90-0.99.
5. the four dimensional chaos system circuit containing time lag item according to claim 4, it is characterized in that: when described fractional order exponent number is 0.90, the resistance in circuit unit and capacitance are respectively: 0.2596M Ω, 2.9047M Ω, 2.9010M Ω, 59.9250M Ω, 0.9362 μ F, 0.2230 μ F, 2.0969 μ F and 0.2251 μ F;
When described fractional order exponent number is 0.91, the resistance in circuit unit and capacitance are respectively: 0.1295M Ω, 1.8354M Ω, 2.3330M Ω, 64.1137M Ω, 0.90312 μ F, 0.2048 μ F, 2.0209 μ F and 0.2142 μ F;
When described fractional order exponent number is 0.92, the resistance in circuit unit and capacitance are respectively: 0.0561M Ω, 14.5312M Ω, 0.0705M Ω, 54.5843M Ω, 0.8206 μ F, 0.1701 μ F, 2.2605 μ F and 0.4311 μ F;
When described fractional order exponent number is 0.93, the resistance in circuit unit and capacitance are respectively: 10.8112M Ω, 61.6349M Ω, 0.0219M Ω, 0.9501 μ F, 0.3579 μ F and 3.4185 μ F;
When described fractional order exponent number is 0.94, the resistance in circuit unit and capacitance are respectively: 6.9540M Ω, 68.9012M Ω, 0.0076M Ω, 0.9120 μ F, 0.3018 μ F and 3.3059 μ F;
When described fractional order exponent number is 0.95, the resistance in circuit unit and capacitance are respectively: 3.5466M Ω, 75.8888M Ω, 0.0017M Ω, 0.8745 μ F, 0.2615 μ F and 3.2007 μ F;
When described fractional order exponent number is 0.96, the resistance in circuit unit and capacitance are respectively: 1.2188M Ω, 81.9533M Ω, 0.0002M Ω, 0.8390 μ F, 0.2335 μ F and 3.0946 μ F;
When described fractional order exponent number is 0.97, the resistance in circuit unit and capacitance are respectively: 914.102 Ω, 9.3303M Ω, 0.8045 μ F and 0.2159 μ F;
When described fractional order exponent number is 0.98, the resistance in circuit unit and capacitance are respectively: 0.0044M Ω, 91.1831M Ω, 0.7710 μ F and 0.2043 μ F;
When described fractional order exponent number is 0.99, the resistance in circuit unit and capacitance are respectively: 0.046107 Ω, 95.5402M Ω, 0.7386 μ F and 0.1931 μ F.
CN201410512490.3A 2014-09-29 2014-09-29 Four-dimensional chaotic system circuit with time-lag items Expired - Fee Related CN104301090B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105490801A (en) * 2016-02-17 2016-04-13 南京师范大学 Four-dimensional fractional order chaotic system circuit with memristor
CN107070635A (en) * 2017-05-19 2017-08-18 南京师范大学 A kind of four-dimensional fractional order time-lag chaos circuit containing three magnetic control memristors
CN109347614A (en) * 2018-09-18 2019-02-15 安顺学院 A kind of different Fractional Order Hyperchaotic system and its circuit are realized
CN110113146A (en) * 2019-06-04 2019-08-09 齐鲁理工学院 A kind of analog circuit of chaotic systems with fractional order

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103152161A (en) * 2013-03-19 2013-06-12 王少夫 Multi-scroll chaotic attractor generating method based on one-dimensional time-lag system
CN103178952A (en) * 2013-03-15 2013-06-26 南京师范大学 Fractional order chaotic system circuit
CN103259645A (en) * 2013-05-23 2013-08-21 南京师范大学 Fractional order four-wing hyperchaos system circuit
CN103414550A (en) * 2013-08-02 2013-11-27 南京师范大学 Four-dimensional hyper-chaotic circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103178952A (en) * 2013-03-15 2013-06-26 南京师范大学 Fractional order chaotic system circuit
CN103152161A (en) * 2013-03-19 2013-06-12 王少夫 Multi-scroll chaotic attractor generating method based on one-dimensional time-lag system
CN103259645A (en) * 2013-05-23 2013-08-21 南京师范大学 Fractional order four-wing hyperchaos system circuit
CN103414550A (en) * 2013-08-02 2013-11-27 南京师范大学 Four-dimensional hyper-chaotic circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
崔智勇: "时滞混沌系统的同步研究及电路仿真", 《中国优秀硕士学位论文全文数据库 基础科学辑》 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105490801A (en) * 2016-02-17 2016-04-13 南京师范大学 Four-dimensional fractional order chaotic system circuit with memristor
CN105490801B (en) * 2016-02-17 2018-07-20 南京师范大学 Four-dimensional fractional order chaotic system circuit containing memristor
CN107070635A (en) * 2017-05-19 2017-08-18 南京师范大学 A kind of four-dimensional fractional order time-lag chaos circuit containing three magnetic control memristors
CN109347614A (en) * 2018-09-18 2019-02-15 安顺学院 A kind of different Fractional Order Hyperchaotic system and its circuit are realized
CN109347614B (en) * 2018-09-18 2021-08-13 安顺学院 Different fractional order hyperchaotic system circuit
CN110113146A (en) * 2019-06-04 2019-08-09 齐鲁理工学院 A kind of analog circuit of chaotic systems with fractional order
CN110113146B (en) * 2019-06-04 2022-04-29 齐鲁理工学院 Analog circuit of fractional order chaotic system

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