CN102967971A - 阵列基板以及显示装置 - Google Patents

阵列基板以及显示装置 Download PDF

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CN102967971A
CN102967971A CN2012104346071A CN201210434607A CN102967971A CN 102967971 A CN102967971 A CN 102967971A CN 2012104346071 A CN2012104346071 A CN 2012104346071A CN 201210434607 A CN201210434607 A CN 201210434607A CN 102967971 A CN102967971 A CN 102967971A
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CN102967971B (zh
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严允晟
崔贤植
徐智强
李会
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BOE Technology Group Co Ltd
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Abstract

本发明公开了一种阵列基板，涉及显示技术领域。该阵列基板包括：若干栅线、数据线及栅线和数据线交叉定义的若干像素单元，所述像素单元包括：薄膜晶体管、像素电极及公共电极，所述数据线与所述公共电极不重叠。本发明还公开了一种包括上述阵列基板的显示装置。本发明的阵列基板中不存在由于数据线和公共电极的耦合所导致的相关不良、功耗低的问题，又能保证较高的开口率和分辨率。

Description

阵列基板以及显示装置
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板以及显示装置。
背景技术
高级超维场转换技术（ADvanced Super Dimension Switch，ADS）是平面电场宽视角核心技术，其通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转。从而提高了液晶工作效率并增大了透光效率。高级超维场转换技术可以提高TFT-LCD产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹（push Mura）等优点。
目前ADS面板被广泛使用，其改进技术还有高开口率的ADS(也称作H-ADS),常用的小尺寸高开口率ADS显示面板为了获得高开口率对数据（S/D）线进行屏蔽（Shielding），传统的屏蔽方式为将数据线用公共电极进行屏蔽，即在数据线上方也设置公共电极。但是，数据线和公共电极会产生耦合电容，由于对于显示面板来说，其上所设置的数据线众多，且施加在数据线上的电压是变化的，因此，会增大数据IC的负载，增加了面板的功耗。
为了解决上述问题，现有技术中存在一种采用了一层树脂（Resin）层的ADS显示面板。如图1~4所示，该显示面板的阵列基板上依次形成有：栅金属层（包括栅极101、栅线102以及公共电极线103）、栅绝缘层2、源漏金属层（包括源电极301、漏电极302以及数据线303）、树脂层4、公共电极层（包括公共电极501）、钝化层6、以及像素电极层（包括多个条状像素电极701）。其中，像素电极701通过钝化层601过孔以及树脂层401过孔与漏电极301电连接，公共电极501通过钝化层过孔601与公共电极线103电连接。该显示面板在形成栅金属层、源漏金属层之后，使用涂布工艺涂布了一层树脂层4，而后在该树脂层4上方形成公共电极501以及像素电极701等结构，其中，公共电极501不仅形成在显示区域，还形成在数据线303上方，树脂层4的设置减少了数据线303和公共电极501之间的耦合，面板功耗有所降低，进而由于耦合电容而导致的相关不良也得到了改善。
但是，由于增加了树脂层4，为了实现像素电极701与漏电极302之间的电连接，需要形成该树脂层过孔，由于树脂层的存在，像素电极701与漏电极302之间的厚度增加，因此，树脂层过孔的上开口会做的较一般的钝化层过孔更大，且漏电极302有具有一定的宽度，为了防止漏光，彩膜基板上对应该处漏电极302的黑矩阵宽度会更大些。随着面板尺寸的增大，分辨率的提高，像素面积越来越小，这样的结构会产生较大的开口率损失，影响面板的分辨率。
发明内容
（一）要解决的技术问题
本发明要解决的技术问题是：提供一种保证较高的开口率和分辨率的阵列基板以及显示装置，且又能避免由于数据线和公共电极的耦合所导致的相关不良及功耗高的问题。
（二）技术方案
为解决上述技术问题，本发明提供了一种阵列基板，包括：若干栅线、数据线及栅线和数据线交叉定义的若干像素单元，所述像素单元包括：薄膜晶体管、像素电极及公共电极，其特征在于，所述数据线与所述公共电极不重叠。
其中，所述栅线上方设置所述公共电极。
其中，所述像素电极为狭缝像素电极，公共电极为板状电极，每条所述狭缝像素电极与所述栅线平行。
其中，所述公共电极为狭缝公共电极，像素电极为板状电极，每条所述狭缝公共电极与所述栅线平行。
其中，所述栅线上方设有所述狭缝公共电极；位于所述栅线上方的狭缝公共电极的数量为一条，而且该狭缝公共电极在阵列基板上的投影覆盖所述栅线。
其中，所述像素电极与所述公共电极之间还设置有绝缘层。
其中，所述像素电极与所述公共电极均为狭缝电极，交叉设置于同一层。
其中，所述栅线和公共电极之间设有绝缘层。
其中，所述像素电极和数据线之间设有绝缘层。
其中，所述像素电极和数据线位于同一层。
本发明还提供了一种显示装置，包括上述任一项所述的阵列基板。
（三）有益效果
本发明的阵列基板以及显示装置，数据线与所述公共电极不重叠，即数据线与公共电极在基板上的投影不重叠，确保数据线与公共电极的耦合电容Cdc最小化，从而降低数据线的负载，使面板功率降低，且避免数据线与公共电极之间的耦合所导致的相关显示品质问题；此外，其结构简单，制备容易，且与插入树脂层的结构相比，同等条件下的开口率较高，较适用于大尺寸的面板。
附图说明
图1为传统的插入树脂层的阵列基板的结构示意图；
图2为图1所示的阵列基板沿A-A’线的横截面视图；
图3为图1所示的阵列基板沿B-B’线的横截面视图；
图4为图1所示的阵列基板沿C-C’线的横截面视图；
图5为依照本发明一种实施方式的阵列基板的结构示意图；
图6为图5所示的阵列基板沿A-A’线的横截面视图；
图7为图5所示的阵列基板沿B-B’线的横截面视图。
具体实施方式
本发明提出的阵列基板以及显示装置，结合附图及实施例详细说明如下。
如图5~7所示，依照本发明一种实施例的阵列基板包括：形成在基板上的若干栅线102、数据线303及栅线102和数据线303之间定义的若干像素单元。还包括与公共电极连接的公共电极线（图中未示出）。该像素单元还包括：薄膜晶体管、像素电极701和公共电极501。薄膜晶体管的栅极101与栅线102同层形成，源极301连接数据线303，漏极302通过过孔（图中未示出）连接像素电极701。数据线303与公共电极不重叠，即数据线303在阵列基板上的投影与公共电极501在阵列基板上的投影不重叠。这样可以确保阵列基板上的数据线上方没有公共电极从而使公共电极与数据线的耦合电容Cdc可以最小化。进一步的，栅线102上方设置公共电极501，数据线303与公共电极501不重叠。进一步的，栅线与公共电极之间设置有绝缘层，确保两者之间没有电连接，如图7所示的，公共电极501完全覆盖于栅线102上方，且两者之间还设有栅绝缘层2和绝缘层6。像素电极701和数据线303位于同一层，但两者在基板上的投影不重叠，像素电极701和数据线303也可位于不同层，位于不同层时两者之间具有绝缘层且两者在基板上的投影不重叠。阵列基板上还包括与公共电极501连接的公共电极线（图中未示出）。
本实施例中，公共电极501为板状电极，像素电极701为狭缝像素电极，两者之间设置有绝缘层6。板状的公共电极501位于栅线102上方，公共电极501和栅线102之间设有绝缘层（如图6和7所示，绝缘层为绝缘层6和栅绝缘层2），且公共电极501完全覆盖栅线102。数据线303与公共电极501不重叠，即数据线303在基板上投影和公共电极501在基板上的投影没有重叠区域。
本实施例中，栅线上方设置的公共电极具有能够将栅线完全遮挡住的宽度，以对栅线进行屏蔽，同时数据线与公共电极在基板上的投影不重叠，可以确保数据线与公共电极的耦合电容最小化，且能避免因耦合电容导致的显示品质问题。与现有技术中使用公共电极对数据线进行屏蔽的像素结构相比，本发明的上述像素结构数据线的驱动负载将显著下降，在保证同样的开口率的前提下，数据驱动IC的功耗将下降35%作用。另外，用公共电极对栅线进行屏蔽，相比通入时刻变化的电压信号的数据线（通入的数据线上的电压信号与公共电压信号的差值不大），公共电极上通入的信号为恒定的电压信号，且栅线上通入的开启和关闭电压信号会远大于公共电压信号，栅线与公共电极之间即便会产生耦合电容，对于栅极驱动IC来讲，其负载远小于以公共电极屏蔽数据线的结构中的数据驱动IC的负载，整个像素结构甚至包括该像素结构的阵列基板以及显示装置的功耗将显著下降。
进一步地，狭缝的像素电极701的每一条像素电极与栅线102平行，即与栅线102平行延伸设置，通常液晶分子的取向方向与狭缝像素电极的延伸方向一致，即像素电极上取向膜的Rubbing摩擦方向与狭缝像素电极平行设置，这样，数据线303与狭缝像素电极701相互垂直，此时靠近两侧数据线303侧的电场方向与液晶分子的排列方向一致，则此处的液晶分子没有力矩不会发生旋转，因此数据线303两侧不会产生漏光现象，与数据线303相对应的遮光层可以缩小宽幅，相对狭缝的像素电极701与数据线303平行延伸设置的方式增大了开口率。
本发明的阵列基板并不限于上述实施例的方案，例如：公共电极为狭缝公共电极，像素电极为板状电极，此时的公共电极位于像素电极的上方，公共电极与像素电极之间设有绝缘层，保证狭缝公共电极与数据线在基板上的投影不重叠即可，优选地，狭缝公共电极与栅线102平行。优选的所述栅线上方设有所述狭缝公共电极；位于所述栅线上方的狭缝公共电极的数量为一条，而且该狭缝公共电极在阵列基板上的投影覆盖所述栅线。
公共电极501和像素电极701还可以都是狭缝电极，两者交叉设置且不接触，因此可位于同一层。当然保证狭缝公共电极与数据线在基板上的投影不重叠即可，优选的狭缝公共电极的其中一条公共电极完全覆盖栅线即可。优选地，狭缝的公共电极和像素电极均与栅线102平行。
此外，本发明还提供了一种包括多个上述阵列基的显示装置。该显示装置可以是：液晶面板、电子纸、液晶电视、液晶显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
另外，对于本领域的技术人员来说，可使用熟知的制备工艺来制备本发明的像素结构、阵列基板以及显示装置的制备。与现有的插入树脂层的结构相比，由于少了一层树脂层，便减少了一次MASK的使用，另外，由于不需要形成树脂层过孔，在同样的条件下，不会影响像素结构的开口率，即便是面板尺寸较大的时候。因此，本发明的像素结构、阵列基板以及显示装置的适用范围更广。
以上实施方式仅用于说明本发明，而并非对本发明的限制。尽管参照实施例对本发明进行了详细说明，本领域的普通技术人员应当理解，对本发明的技术方案进行各种组合、修改或者等同替换，都不脱离本发明技术方案的精神和范围，其均应涵盖在本发明的权利要求范围当中。

Claims (11)

1.一种阵列基板，包括：若干栅线、数据线及栅线和数据线交叉定义的若干像素单元，所述像素单元包括：薄膜晶体管、像素电极及公共电极，其特征在于，所述数据线与所述公共电极不重叠。
2.如权利要求1所述的阵列基板，其特征在于，所述栅线上方设置所述公共电极。
3.如权利要求1所述的阵列基板，其特征在于，所述像素电极为狭缝像素电极，公共电极为板状电极，每条所述狭缝像素电极与所述栅线平行。
4.如权利要求1所述的阵列基板，其特征在于，所述公共电极为狭缝公共电极，像素电极为板状电极，每条所述狭缝公共电极与所述栅线平行。
5.如权利要求4所述的阵列基板，其特征在于，所述栅线上方设有所述狭缝公共电极；位于所述栅线上方的狭缝公共电极的数量为一条，而且该狭缝公共电极在阵列基板上的投影覆盖所述栅线。
6.如权利要求1所述的阵列基板，其特征在于，所述像素电极与所述公共电极之间还设置有绝缘层。
7.如权利要求1所述的阵列基板，其特征在于，所述像素电极与所述公共电极均为狭缝电极，交叉设置于同一层。
8.如权利要求1所述的阵列基板，其特征在于，所述栅线和公共电极之间设有绝缘层。
9.如权利要求1~8中任一项所述的阵列基板，其特征在于，所述像素电极和数据线之间设有绝缘层。
10.如权利要求1~8中任一项所述的阵列基板，其特征在于，所述像素电极和数据线位于同一层。
11.一种显示装置，其特征在于，包括权利要求1~10中任一项所述的阵列基板。
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