CN102959687B - 金属化方法、混合物以及电子器件 - Google Patents

金属化方法、混合物以及电子器件 Download PDF

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CN102959687B
CN102959687B CN201180032031.XA CN201180032031A CN102959687B CN 102959687 B CN102959687 B CN 102959687B CN 201180032031 A CN201180032031 A CN 201180032031A CN 102959687 B CN102959687 B CN 102959687B
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metallic particles
copper
matrix
substrate
metallic
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CN102959687A (zh
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阿尔图尔·科利奇
弗里茨·雷德克
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Lam Research Corp
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Lam Research Corp
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Abstract

本发明的一方面提供处理基底的方法。在一实施方式中，所述方法包括通过以下方式在所述基底上或内部形成导电体：提供包含金属颗粒和无电沉积溶液的混合物，和无电沉积金属基体以及共沉积所述金属颗粒。在另一实施方式中，所述方法包括通过以下方式在所述基底上或内部形成导电体：提供包含金属颗粒和电化学镀溶液的混合物，和电化学镀金属基体以及共沉积所述金属颗粒。本发明的另一方面提供用于在基底上或内部形成导电体的混合物。本发明的另一方面提供一种电子器件。

Description

金属化方法、混合物以及电子器件
技术领域
本发明涉及诸如集成电路等电子器件的制造；更具体地，本发明涉及用于在制造电子器件中采用的基底的金属化和电互连。
背景技术
湿化学法已广泛应用于采用铜金属化的电子器件的加工处理。诸如无电沉积（ELD）和电化学镀（ECP）等湿化学法应用于二维集成电路的槽和过孔的镶嵌和双镶嵌铜填充。湿化学法还应用于集成电路制造的其它作业。已存在有多种成熟工艺，并应用于制造所述器件。这些工艺中的大部分提供了满意的效果，且几乎没有（如果有的话，仅有少数）针对这些成熟工艺的大多数进行较大的改进。
本发明人获得一个或多个的发明，其与诸如用于电子器件的金属化互连技术之类的金属化互连技术相关。所述一个或多个发明可提供一种或多种方法、材料和/或电子器件，其能作为一种或多种现有技术的替代选择。
发明内容
本发明涉及电子器件的制造。本发明的一方面是处理基底的方法。在一实施方式中，所述方法包括通过以下步骤在所述基底上或内部形成导电体：提供包含金属颗粒和无电沉积溶液的混合物，和无电沉积金属基体，以及共沉积所述金属颗粒，使得所述金属颗粒被包埋于所述金属基体内。在另一实施方式中，所述方法包括通过以下步骤在所述基底上或内部形成导电体：提供包含金属颗粒和电化学镀溶液的混合物，和电化学镀金属基体，以及共沉积所述金属颗粒，使得所述金属颗粒被包埋于所述金属基体内。本发明的另一方面是用于在基底上或内部形成导电体的混合物。本发明的另一方面是电子器件。
应理解的是，本发明并不局限应用于在下文中描述的详细结构和组件的装配。本发明可以是其它实施方式，以及可以多种方式实践和实施。此外，应理解的是，在本文中采用的用语和术语用于描述的目的，且不应被认为是限制性的。
附图简要说明
图1是本发明的一实施方式的工艺流程图。
图2是根据本发明的一实施方式的一部分基底的横截面侧视图。
本领域技术人员理解的是，为简单清楚起见，附图中的部件用于举例说明，且不一定是按比例绘制。例如，附图中的一些部件的大小尺寸可以是相对于其它部件而被放大的，有助于增进对本发明实施方式的理解。
具体实施方式
对于以下定义的术语，除非在权利要求书或本说明书的其它部分给出了不同的定义，否则将采用以下定义解释。无论是否明确指出，本文中所有数值被定义为由术语“约”修饰。术语“约”通常是指数值范围，本领域普通技术人员会认为该数值范围内的值等同于所描述的值，能获得基本上相同的性质、功能、结果等。
由下限值和上限值指明的数值范围定义为包括归入所述数值范围内的所有数值以及归入所述数值范围内的所有子范围。例如，数值范围10至15包括，但不限于，10,10.1,10.47,11,11.75至12.2,12.5,13至13.8,14,14.025，和15。
本文中采用的术语“金属”是指元素周期表中的金属元素和/或包含一种或多种与至少一种其它元素混合的金属元素的金属合金；所述金属和所述金属合金具有元素周期表的金属元素的一般性质，例如高导电性。
本文中采用的术语“基体”是指包埋或用于包埋诸如细粒和诸如粉末之类颗粒的材料。
本发明涉及诸如集成电路等电子器件的制造；更具体地，本发明涉及在电子器件制造中采用的基底的金属化和电互连。下文中将主要在处理用于制造集成电路的诸如硅片等半导体晶片的背景中讨论本发明的一个或多个实施方式。金属化层可包括在镶嵌和/或双镶嵌介电结构中形成的金属线。一个或多个实施方式还涉及贯穿基底的金属化互连，例如那些用于三维集成电路的金属化互连。然而，应理解的是，根据本发明的实施方式还可用于其它半导体器件、除了铜以外的金属、以及除了半导体晶片以外的晶片，或者还可与其它半导体器件、除了铜以外的金属、以及除了半导体晶片以外的晶片一起使用。
参见图1，其中图示了根据本发明一个或多个实施方式的示例性工艺图20。示例性工艺图20包括非穷举的一系列步骤，其中还可加入额外的步骤（未图示）。本领域普通技术人员会认识到多种变化、修改和替代方案。图1示出示例性工艺图20，其包括提供基底25。可选地，所述基底可以是诸如半导体晶片之类的基底，例如硅片，或是适于制造电子器件的另一种材料的基底。
工艺流程图20还涉及在所述基底上或所述基底内形成导电体。更具体地，可在所述基底的表面上形成所述导电体，例如在所述基底的整个表面或至少部分表面上形成导电体层；和/或在所述基底中制造的特征之上或内部形成导电体，这些特征诸如槽、诸如盲孔、诸如贯穿孔；和/或在用于诸如镶嵌金属化、诸如双镶嵌金属化以及诸如贯穿基底过孔金属化等技术的其它基底特征之上或内部形成导电体。可选择地，所述导电体可以层的形式形成，和/或所述导电体可以诸如槽填充物和/或诸如过孔填充物之类的间隙填充物的形式形成。
对于本发明的一个或多个实施方式，工艺流程图20包括提供无电沉积（ELD）溶液和金属颗粒50。可选地，可在实施所述工艺之前，将所述无电沉积溶液和所述金属颗粒预混合。或者，可分别提供所述无电沉积溶液和所述金属颗粒，使得可刚好在实施所述工艺之前充分混合前述材料。或者，所述工艺可用例如在基本上连续流工艺中连续混合的所述金属颗粒和所述无电沉积溶液实施。然后是无电沉积金属基体，和共沉积所述金属颗粒60。换言之，使用所述无电沉积溶液通过用溶于所述溶液的离子无电沉积金属，以形成金属基体。所述金属颗粒共沉积，使得所述金属颗粒被包埋入所述金属基体。
根据本发明的一个或多个实施方式，通过采用无电沉积溶液实现所述无电沉积，所述无电沉积溶液为例如包含一种或多种金属盐和一种或多种还原剂的水溶液。任选地，所述无电沉积溶液可进一步包括一种或多种络合剂、一种或多种pH调节剂、一种或多种缓冲剂、一种或多种表面活性剂、以及一种或多种添加剂。选择所述无电沉积溶液的组分，以便制备具有一种或多种所需性质的金属基体和/或提供额外的工艺控制和稳定性。本发明一个或多个实施方式采用的无电沉积工艺涉及无需采用外部电流的由化学驱动的氧化-还原反应。
对于本发明的一个或多个实施方式，无电沉积的采用是一个选择方案。对于本发明的一个或多个实施方式，工艺流程图20包括提供电化学镀（ECP）溶液和金属颗粒70。可选地，可在实施所述工艺之前预先混合所述电化学镀溶液和所述金属颗粒。或者，可分别提供所述电化学镀溶液和所述金属颗粒，使得刚好在实施所述工艺之前可充分混合前述材料。或者，所述工艺可用例如在基本上连续流工艺中连续混合的所述金属颗粒和所述电化学镀溶液实施。然后是电化学镀金属基体，和共沉积所述金属颗粒80。换言之，所述电化学镀溶液用于从来自所述电化学镀溶液的离子电化学镀金属，以形成金属基体。所述金属颗粒共沉积，使得所述金属颗粒被包埋入所述金属基体。
根据本发明的一个或多个实施方式，通过采用电化学镀溶液实现所述电化学镀，所述电化学镀溶液为例如包含电解质和任选的一种或多种金属盐的水溶液。任选地，所述电化学镀溶液可进一步包括一种或多种络合剂、一种或多种pH调节剂、一种或多种缓冲剂、一种或多种表面活性剂、以及一种或多种添加剂。选择所述电化学镀溶液的组分，以便制备具有一种或多种所需性质的金属基体，和/或提供额外的工艺控制和稳定性。本发明一个或多个实施方式采用的电化学镀工艺涉及由采用的外部电流驱动的氧化-还原反应且所述基底用作为阴极。在应用中，所述基底未充分导电，不足以起阴极的作用，在所述电化学镀之前在所述基底上沉积导电籽晶层。
根据工艺流程图20的本发明实施方式可包括多种变型。多种可能的变型可应用于本发明的采用无电沉积的实施方式，以制造金属基体，以及应用于本发明的采用电化学镀的实施方式，以制造所述金属基体。以下是工艺流程图20中的示例性变型，适于与无电沉积一起应用和/或适于与电化学镀所述金属基体一起应用。
根据本发明的一个或多个实施方式，所述提供无电沉积溶液和金属颗粒50以及所述提供电化学镀溶液和金属颗粒70可包括提供具有与金属基体基本上相同组分的金属颗粒。换言之，对于本发明的一个或多个实施方式，可选择所述金属基体的组分与所述金属颗粒的组分相同，使得由所述金属基体和被包埋的金属颗粒产生的导电层在组分上基本一致。通常，所述金属基体可以是适于电子器件金属化的任意纯的周期表金属元素或其合金。同样地，所述金属颗粒可以是适于电子器件金属化的任意纯的周期表金属元素或其合金。针对这样的实施方式的具体实施例可以是基本上沉积纯铜作为金属基体以及包埋基本上纯铜颗粒的实施方式。另一具体实施例可以是其中铜合金是金属基体以及包埋颗粒是具有与所述金属基体相同组分的铜合金的实施例。
根据本发明的一个或多个实施方式，所述提供无电沉积溶液和金属颗粒50以及所述提供电化学镀溶液和金属颗粒70可包括提供具有与金属基体的组分不同的组分的金属颗粒。换言之，对于本发明的一个或多个实施方式，可选择所述金属基体的组分与所述金属颗粒的组分不同，使得由所述金属基体和被包埋的金属颗粒产生的导电层在组分上不一致。针对这样的实施方式的具体实施例可以是基本上沉积纯铜作为金属基体以及包埋铜合金颗粒的实施方式。或反之亦然，金属基体可以是铜合金而包埋颗粒可以是基本上纯的铜。另一具体实施例可以是其中铜合金是金属基体以及包埋颗粒是具有与所述金属基体的组分不同的组分的另一铜合金的实施例。
本发明的其它实施方式可包括金属基体的组分和金属颗粒的组分的其它组合。根据本发明的一个或多个实施方式，所述提供无电沉积溶液和金属颗粒50以及所述提供电化学镀溶液和金属颗粒70可包括提供无电沉积溶液或电化学镀溶液，以制备金属基体组合物；所述金属基体组合物为例如但不限于，钴，钴合金，钴钨合金，钴钨磷合金，镍，镍合金，可在适于制造电子器件的条件下无电沉积或电化学镀的基本上任意的金属，和包含至少一种以下元素的基本上任意的金属：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。根据本发明的一个或多个实施方式，所述提供无电沉积溶液和金属颗粒50以及所述提供电化学镀溶液和金属颗粒70可包括可提供包含至少一种以下元素的金属颗粒：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。通常，所述金属颗粒可以是在适于制造电子器件的条件下基本上不溶于无电沉积溶液和/或电化学镀溶液的基本上任意的金属。
根据本发明的一个或多个实施方式，工艺流程图20包括变型，以在金属基体和金属颗粒之间产生不同于组分上的差别的差别和/或除了产生组分上的差别以外还产生其他的差别。根据本发明的一个或多个实施方式，所述提供无电沉积溶液和金属颗粒50以及所述提供电化学镀溶液和金属颗粒70可包括提供具有与金属基体基本上相同的晶体结构和/或晶体微结构的金属颗粒。换言之，对于本发明的一个或多个实施方式，可选择所述金属基体的诸如晶体结构和/或诸如晶粒尺寸等晶体性质与金属颗粒采用的晶体性质相同，使得由所述金属基体和包埋颗粒产生的导电层在晶体结构上基本一致。针对这样的实施方式的具体实施例可以是沉积基本上纯的铜作为金属基体和具有与基本上纯的铜包埋颗粒相同的晶体结构和晶体尺寸的实施方式。
或者，对于本发明的一个或多个实施方式，可选择所述金属基体的诸如晶体结构和/或诸如晶体尺寸等晶体性质与所述金属颗粒的晶体性质不同。另一具体实施例可以是这样的实施例，其中铜金属基体具有的晶体尺寸范围或其它晶体性质不同于包埋的铜金属颗粒的晶体尺寸范围或其它晶体性质。
根据本发明的一个或多个实施方式的方法，对于包埋入所述金属基体的金属颗粒，可采用各种尺寸。任选地，所述金属颗粒可具有一致的尺寸和/或窄的尺寸范围。或者，多种颗粒尺寸的范围可以是有目的地应用于所述金属颗粒。在本发明的一个或多个实施方式中，所述方法包括提供具有的最大的直径为小于30微米的金属颗粒。根据本发明的另一实施方式，所述方法包括提供具有的最大尺寸范围是0.1微米至10微米的金属颗粒。根据本发明的更具体的实施方式，所述方法包括提供包含至少一种以下元素的金属颗粒：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌，且所述金属颗粒具有的最大尺寸为小于30微米。
如上面所指出的，本发明的一个或多个实施方式可用于在基底上或内部形成导电体，所述基底为例如包括一种或多种过孔的基底，所述过孔例如可用于形成用于三维集成电路的贯穿基底导电体。本发明的一实施方式包括提供具有一种或多种过孔的基底，和在所述基底上或所述基底内形成导电体，所述在所述基底上或所述基底内形成导电体通过以下步骤实施：用包含金属颗粒和无电沉积溶液的混合物填充所述一种或多种过孔，以及在所述一种或多种过孔中无电沉积金属基体和共沉积所述金属颗粒；或用包含金属颗粒和电化学镀溶液的混合物填充所述一种或多种过孔，以及在所述一种或多种过孔中电化学镀金属基体和共沉积所述金属颗粒。任选地，采用本发明的一个或多个实施方式处理的过孔可以是过孔底部封闭的盲孔，过孔底部开口的贯穿基底过孔（通孔），或根据本发明实施方式填充且然后采用其它工艺步骤在底部开口的盲孔。
或者，根据本发明实施方式的一种或多种方法包括形成覆盖在过孔表面和/或侧壁上的阻挡层。阻挡层金属颗粒与无电沉积阻挡层金属基体或电化学镀阻挡层金属基体一起共沉积。通过采用阻挡层金属颗粒和用于无电沉积阻挡层金属基体的无电沉积溶液的混合物，或采用阻挡层金属颗粒和用于电化学镀阻挡层金属基体的电化学镀溶液的混合物，实现所述方法。
本发明的一个或多个实施方式是金属颗粒和无电沉积溶液的混合物，所述无电沉积溶液为例如包含一种或多种金属盐和一种或多种还原剂的水溶液。任选地，所述无电沉积溶液可进一步包括一种或多种络合剂、一种或多种pH调节剂、一种或多种缓冲剂、一种或多种表面活性剂、以及一种或多种添加剂。所述一种或多种金属盐提供溶解的金属离子。选择所述无电沉积溶液的组分，以便制备从所述金属离子沉积的金属基体。所述金属盐可包含离子，以沉积金属基体组合物；所述金属基体组合物为例如但不限于，钴，钴合金，钴钨合金，钴钨磷合金，镍，镍合金，可在适于制造电子器件的条件下无电沉积的基本上任意的金属，和包含至少一种以下元素的基本上任意的金属：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。根据一更具体实施方式，所述混合物包含铜颗粒和用于无电沉积铜或铜合金的包含铜离子的无电沉积溶液。通过将一种或多种铜盐溶解于水溶液中可以制得所述铜离子。
本发明的一个或多个其它实施方式是金属颗粒和电化学镀溶液的混合物，所述电化学镀溶液为例如包含电解质和任选的一种或多种金属盐的水溶液。所述金属盐可包含离子，以沉积金属基体组合物；所述金属基体组合物为例如但不限于，钴，钴合金，钴钨合金，钴钨磷合金，镍，镍合金，可在适于制造电子器件的条件下电化学镀的基本上任意的金属，和包含至少一种以下元素的基本上任意的金属：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。任选地，所述电化学镀溶液可进一步包括一种或多种络合剂、一种或多种pH调节剂、一种或多种缓冲剂、一种或多种表面活性剂、以及一种或多种添加剂。根据一更具体实施方式，所述混合物包含铜颗粒和用于电化学镀铜或铜合金的包含铜离子的电化学镀溶液。任选地，所述铜离子源可以是溶解的铜盐或所述铜离子可以是来自于用于电化学镀工艺的阳极。
根据本发明的一个或多个实施方式的混合物可包括各种尺寸的金属颗粒。任选地，所述金属颗粒可具有一致的尺寸或窄的尺寸范围。或者，多种颗粒尺寸的混合可以是有目的地应用于所述金属颗粒。在本发明的一个实施方式中，所述金属颗粒具有的最大尺寸为小于30微米。根据本发明的另一实施方式，所述金属颗粒具有的最大尺寸范围是0.1微米至10微米。
根据本发明的一个或多个实施方式的混合物包括具有化学组分的无电沉积溶液，以制备具有与所述金属颗粒的化学组分不同的化学组分的无电沉积金属基体。换言之，所述无电沉积溶液组合物产生具有与所述金属颗粒的组分不同的组分的金属基体。根据一更具体实施方式，所述无电沉积溶液具有组分以产生包含铜的基体，所述基体具有与所述金属颗粒的化学组分不同的化学组分。还在另一实施方式中，所述混合物包括具有组分的无电沉积溶液，以沉积包含铜的基体，以及所述混合物包括铜颗粒；所述包含铜的基体的组分和所述铜颗粒的组分不同。
或者，根据本发明的一个或多个实施方式的混合物包括具有化学组分的无电沉积溶液，以制备具有的化学组分与包含于所述混合物中的金属颗粒的化学组分基本上相同的无电沉积金属基体。
还在另一实施方式中，所述混合物包含具有组分的无电沉积溶液，以沉积包含铜的基体，以及所述混合物包含铜或铜合金颗粒；所述包含铜的基体的组分与所述铜或铜合金颗粒的组分基本上相同。
根据本发明的一个或多个实施方式的混合物，其包括电化学镀溶液和金属颗粒，其中所述金属颗粒的组分与从所述电化学镀溶液镀覆得到的金属基体的组分基本上相同。根据一更具体的实施方式，所述电化学镀溶液可具有用于沉积包含铜的基体的组分，以及所述金属颗粒可包括铜且具有的组分与所述金属基体的组分基本上相同。
根据本发明的一个或多个实施方式的混合物，其包括电化学镀溶液和金属颗粒，其中所述金属颗粒的组分与从所述电化学镀溶液镀覆得到的金属基体的组分不同。根据一更具体的实施方式，所述电化学镀溶液可具有用于沉积包含铜的基体的组分，以及所述金属颗粒可包括铜且具有的组分与包含铜的所述基体的组分不同。
根据本发明的一个或多个实施方式的混合物，其包括金属颗粒和用于沉积金属基体的无电沉积溶液。任选地，所述金属颗粒可包括例如但不限于铜、银和金之类的元素。或者，所述无电沉积溶液可具有组分，以无电沉积包含铜的金属基体。或者，所述混合物包含铜颗粒和无电沉积溶液，所述无电沉积溶液具有用于无电沉积铜金属基体的组分。大体而言，所述金属颗粒可包括至少一种以下元素：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。所述金属颗粒可以是在适于制造电子器件的条件下基本上不溶于无电沉积溶液和/或电化学镀溶液的基本上任意的金属。
本发明的一个或多个实施方式涉及制造诸如包含贯穿基底的导电体的三维集成电路等半导体器件的方法。所述半导体器件包括可以半导体晶片、半导体芯片、半导体层或其组合的形式存在的半导体材料。所述半导体材料可负载于另一材料的基底上，所述另一材料例如是玻璃、石英、蓝宝石、氧化铝、陶瓷或芯片载体材料。所述半导体器件可包括诸如电子器件、晶体管、光学器件和/或存储器件之类的器件。所述半导体材料可以是IV族元素半导体、III-V族元素半导体、和/或其它半导体。
三维集成电路可包括两个以上具有集成电路的半导体芯片，或包括两个以上具有集成电路的半导体晶片。所述半导体芯片或半导体晶片被以三维形式堆叠在一起，连接，以及电互连，即，被集成到半导体芯片或半导体晶片内，和被集成在半导体芯片或半导体晶片之间。各芯片之间或各晶片之间的互连，通过从一个或多个芯片的或一个或多个半导体晶片的背面到正面的通孔得以实现。换言之，通过通孔实施在堆叠的芯片或堆叠的晶片之间的电互连。三维集成电路可具有大量的通孔，用于在各半导体芯片之间或各半导体晶片之间互连金属化。
根据一些设计，三维集成电路将采用贯穿基底的过孔，该过孔是大的高的深宽比特征，其具有比标准技术双镶嵌金属化互连的最小几何特征大一个数量级或更大的尺寸。所述贯穿基底的过孔可需要的直径为约5-30微米。一些接触孔（contactholes）的长度可以是70至300微米。
本发明的一个或多个实施方式可用于以比一些其它工艺更高的沉积速率形成导电体。本发明的一个或多个实施方式可获得比采用其它技术获得的沉积速率高10倍的沉积速率。并且，本发明的一个或多个实施方式可提供比采用标准器件制造技术获得的导电体具有更高导电率的导电体。本发明的一个或多个实施方式可提供种类更多的材料，用于集成电路、二维集成电路和三维集成电路的制造和金属化。
参见图2，其中图示了根据本发明的一个或多个实施方式的电子器件100的一部分的横截面侧视图。电子器件100包括基底105。基底105可以是诸如半导体晶片（例如硅晶片）之类的基底，或适于制造电子器件的另一种材料的基底。图2图示了电子器件100具有在基底105内以孔的形式存在的过孔110。电子器件100进一步包括内衬于过孔110表面的阻挡层和/或籽晶层120。图2进一步图示了用通过无电沉积形成的或通过电化学镀形成的金属基体以及金属颗粒140填充的过孔110。由于金属颗粒140与无电沉积的金属基体或电化学镀的金属基体共沉积，金属颗粒140被包埋入金属基体130中。
本发明的实施方式可采用用于阻挡层和/或籽晶层120的各种材料。用于阻挡层的通常材料是基本上阻止金属扩散进入基底105的材料。一些阻挡层的材料的实例包括，但不限于，钽、钽/氮化钽、镍、和镍合金。或者针对本发明的一个或多个实施方式，所述阻挡层包括被包埋入阻挡层金属基体内的阻挡层金属颗粒。
根据本发明的一个或多个实施方式可选择各种材料用作金属基体130。可用作为金属基体130的材料的实例包括，但不限于，铜，铜合金，钴，钴合金，钴钨合金，钴钨磷合金，镍，镍合金，可在适于制造电子器件的条件下无电沉积或电化学镀的基本上任意的金属，和包含至少一种以下元素的基本上任意的金属：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。
根据本发明的一个或多个实施方式，可选择各种材料用作为金属颗粒140。可用作为金属颗粒140的材料的实例包括，但不限于，包含至少一种以下元素的金属颗粒：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。通常，金属颗粒140可以是基本上不溶于用于制造金属基体130的无电沉积溶液和/或电化学镀溶液的基本上任意的金属。
根据本发明的一实施方式，金属基体130包括铜，且金属颗粒140包括铜。在另一实施方式中，金属颗粒140是铜颗粒，且金属基体130是铜。任选地，金属基体130的组分与金属颗粒140的组分基本上相同。在本发明的另一实施方式中，金属基体130具有的晶体结构和/或晶体形态与金属颗粒140的晶体结构和/或晶体形态不同。根据本发明的一个或多个实施方式，选择金属颗粒140，以具有小于约30微米的最大尺寸。根据本发明的另一实施方式，选择金属颗粒140，以具有范围是约0.1微米至约10微米的最大尺寸。
在前述说明中，已根据具体实施方式描述了本发明。然而，本领域普通技术人员应能理解，在不背离如所附权利要求书中阐明的本发明的范围的前提下，可进行各种修改和变化。因此，应在举例说明的意义上，而非限制性意义上，理解本说明书，且所有这样的修改旨在被涵盖于本发明的范围内。
已参照具体实施方式在上面描述了有益效果、其它优点和解决问题的方案。然而，所述有益效果、优点、解决问题的方案和可导致任意有益效果、优点或解决问题的方案出现或变得更为显著的任意要素不应被解释为任意或所有权利要求的关键的、需要的或必要的特征或要素。
正如本文所采用的，术语“包含”，“包含有”，“包括”，“包括有”，“具有”，“含有”，“至少一种”，或其任意其它变体，旨在涵盖非排他性内含物。例如，包含一系列要素的工艺、方法、制品或设备不一定仅局限于那些要素，而是可包括其它未明确列出的或所述工艺、方法、制品或设备所固有的要素。进一步地，除非有明确相反的说明，“或”是指包容性的或，且不是指排他性的或。例如，以下的任意一种满足条件A或B：A是真的（或存在的）且B是假的（或不存在的），A是假的（或不存在的）且B是真的（或存在的），以及A和B都是真的（或存在的）。

Claims (22)

1.一种制造半导体器件的方法，所述方法包括：
提供基底；和
通过以下步骤在所述基底上或所述基底内形成导电体：
提供包含尺寸范围是大于0.1微米小于等于10微米的金属颗粒和无电沉积溶液的混合物，无电沉积金属基体和共沉积所述金属颗粒；或
提供包含尺寸范围是大于0.1微米小于等于10微米的金属颗粒和电化学镀溶液的混合物，电化学镀金属基体和共沉积所述金属颗粒。
2.根据权利要求1所述的方法，其中所述金属颗粒和所述金属基体具有相同的组分。
3.根据权利要求1所述的方法，其中所述金属颗粒和所述金属基体具有不同的组分。
4.根据权利要求1所述的方法，其中所述金属基体包含铜，和所述金属颗粒包含铜。
5.根据权利要求1所述的方法，其中所述金属基体包含以下元素中的至少一种：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。
6.根据权利要求1所述的方法，其中所述金属颗粒是纯的周期表中的金属元素的颗粒。
7.根据权利要求1所述的方法，其中所述金属颗粒包含至少一种选自由以下元素组成的组的元素：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。
8.根据权利要求1所述的方法，其中所述金属颗粒包含至少一种选自由以下元素组成的组的元素：钴、铜、金、铱、铁、钼、镍、锇、钯、铂、铼、铑、钌、银、锡、钨和锌。
9.根据权利要求1所述的方法，其中所述金属基体的晶体结构和/或晶粒尺寸与所述金属颗粒的晶体结构和/或晶粒尺寸相同。
10.根据权利要求1所述的方法，其中所述金属基体的晶体结构和/或晶粒尺寸与所述金属颗粒的晶体结构和/或晶粒尺寸不相同。
11.根据权利要求1所述的方法，其中所述提供基底包括提供具有一种或多种过孔的基底；且所述在所述基底上或所述基底内形成导电体的步骤包括：
用包含金属颗粒和无电沉积溶液的混合物填充所述一种或多种过孔，在所述一种或多种过孔中无电沉积金属基体和共沉积所述金属颗粒；或
用包含金属颗粒和电化学镀溶液的混合物填充所述一种或多种过孔，在所述一种或多种过孔中电化学镀金属基体和共沉积所述金属颗粒。
12.一种用于在基底上或基底内形成铜结构的混合物，所述混合物包括：
包含铜的颗粒，以及包含用于无电沉积包含铜的基体的铜离子的无电沉积溶液；或
包含铜的颗粒，以及包含用于电化学镀包含铜的基体的铜离子的电化学镀溶液；
其中所述颗粒尺寸范围是大于0.1微米小于等于10微米。
13.根据权利要求12所述的混合物，其中所述无电沉积溶液或所述电化学镀溶液包括一种或多种金属盐、一种或多种还原剂、一种或多种络合剂、一种或多种pH调节剂、一种或多种缓冲剂、和/或一种或多种表面活性剂。
14.根据权利要求12所述的混合物，其中所述无电沉积溶液或所述电化学镀溶液包括一种或多种添加剂。
15.一种电子器件，其包括：
具有一种或多种贯穿基底的过孔的基底；
在所述一种或多种基底过孔的壁上的阻挡层；
包含铜的基体；和
包埋于所述基体中的金属颗粒；
其中所述金属颗粒和包含铜的所述基体填充所述一种或多种过孔；
其中所述金属颗粒尺寸范围是大于0.1微米小于等于10微米。
16.根据权利要求15所述的电子器件，其中所述金属颗粒包含铜。
17.根据权利要求15所述的电子器件，其中所述金属颗粒是铜。
18.根据权利要求15所述的电子器件，其中包含铜的所述基体是铜。
19.根据权利要求15所述的电子器件，其中所述金属颗粒是铜且包含铜的所述基体是铜。
20.根据权利要求15所述的电子器件，其中所述金属颗粒包含银或金。
21.根据权利要求15所述的电子器件，其中所述阻挡层包括包埋于阻挡金属基体中的阻挡金属颗粒。
22.根据权利要求15所述的电子器件，其中所述基底是硅片。
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