CN102929735A - Clock-correcting method and equipment - Google Patents
Clock-correcting method and equipment Download PDFInfo
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- CN102929735A CN102929735A CN2012104019385A CN201210401938A CN102929735A CN 102929735 A CN102929735 A CN 102929735A CN 2012104019385 A CN2012104019385 A CN 2012104019385A CN 201210401938 A CN201210401938 A CN 201210401938A CN 102929735 A CN102929735 A CN 102929735A
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Abstract
The invention discloses a clock-correcting method and clock-correcting equipment. The clock-correcting method comprises the following steps of: acquiring the clock information of a current system when a timing cycle comes; comparing the clock information of the current system and the determined reference information of the system clock to obtain the deviation information of a system clock in the current timing cycle; determining the numerical information for every clock correction according to the preset clock correction frequency and the deviation information; and correcting the clock information of the system by using the numerical information when every clock interrupt cycle comes. By the method, the determined numerical information for correcting the clock information of the system every time is small; and the correction of the system clock is realized through a micro-adjustment mode, so that the problem that because the system clock hops suddenly due to large correction numerical information when the system clock is corrected in the prior art, equipment in the system works abnormally can be avoided, and the reliability and stability of the system are improved.
Description
Technical field
The present invention relates to computer application field, relate in particular to a kind of method and apparatus of clock correction.
Background technology
So-called embedded system refers to non-PC system, have computer function but be not referred to as equipment or the equipment of computing machine, application-centered, the software and hardware Tailorable, adapt to application system, and to the dedicated computer system of the comprehensive strict demands such as function, reliability, cost, volume, power consumption.Wherein, embedded system mainly is comprised of flush bonding processor (being embedded type CPU), associated support hardware, embedded OS and application software system etc.The operating system of operation for embedded system is called embedded OS.
Usually, in embedded system, the concept relevant with clock comprises: hardware clock, system clock, clock period are frequent, clock ticktack and system clock are crossed slow or too fast etc.
So-called hardware clock refers to clock battery-powered on the mainboard; So-called system clock refers in the current operation system clock by software maintenance, when embedded OS is started shooting, system clock can read the hardware clock of setting, and system clock has been counted independent operating according to the ticktock number of times since system's startup afterwards; The so-called clock period frequently refers to the number of the time clock (0 or 1 potential pulse) that produced within 1 second time; So-called clock ticktack (clock tick) refers to produce a clock and interrupts the needed time; So-called system clock is crossed slow or too fast referring to because some hardware deficiency (can't the Obtaining Accurate processor frequencies such as some low side processors) and is caused the clock interruption, cause owing to interval time occurring and so that inaccurate clock finally causes system clock too fast or excessively slow.
For the too fast or excessively slow problem of clock appears in anti-locking system, present operating system mainly contains following method and comes the corrective system clock:
1, provide NTP software and network to carry out correction of timing;
2, utilize GPS to carry out clock correction.
As shown in Figure 1, be the schematic diagram of the method for in the prior art clock being proofreaied and correct, concrete method comprises:
The first step: when producing the clock interruption, judge whether present clock needs compensation;
Second step: if need, then determine the difference of present clock and standard time clock, and utilize the difference that obtains that present clock is compensated.
These schemes are the too fast or excessively slow problem of corrective system clock effectively, but this correction can allow system clock that unexpected saltus step (namely from a time change to suddenly the another one time) occurs, some software or the hardware device that will cause like this relying on system clock occur unusually causing the instability of system works when work.
Summary of the invention
The embodiment of the invention provides a kind of method and apparatus of clock correction, is used for solving prior art system clock is carried out timing, and unexpected saltus step appears in system clock, causes the devices in system operation irregularity, so that the unsettled problem of system works.
A kind of method of clock correction, described method comprises:
When a timing cycle arrives, obtain the clock information of current system;
The clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle;
According to default clock correction number of times and described deviation information, determine to carry out each time the numerical information of clock correction;
When each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct.
A kind of equipment of clock correction, described equipment comprises:
Acquisition module is used for obtaining the clock information of current system when a timing cycle arrives;
Comparison module is used for the clock information of the described current system reference information with the system clock of determining is compared, and obtains the deviation information of system clock in the current timing cycle;
Determination module is used for determining to carry out each time the numerical information of clock correction according to default clock correction number of times and described deviation information;
Correction module is used for utilizing described numerical information that the clock information of system is proofreaied and correct when each clock interrupt cycle arrives.
Beneficial effect of the present invention is as follows:
The embodiment of the invention is by when a timing cycle arrives, obtain the clock information of current system, the clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle, according to default clock correction number of times and described deviation information, determine to carry out each time the numerical information of clock correction, when each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct, the numerical information of each time clock information of system being proofreaied and correct of determining like this is less, the correction of the system clock mode by inching is realized, avoided in the prior art system clock being carried out timing, because the numerical information of proofreading and correct is large so that unexpected saltus step appears in system clock, the problem that causes the devices in system operation irregularity has improved the reliability and stability of service system.
Description of drawings
Fig. 1 is the schematic diagram of the method for in the prior art clock being proofreaied and correct;
Fig. 2 is the process flow diagram of method of a kind of clock correction of the embodiment of the invention one;
Fig. 3 is the structural representation of equipment of a kind of clock correction of the present embodiment two.
Embodiment
In order to realize purpose of the present invention, the embodiment of the invention provides a kind of method and apparatus of clock correction, by when a timing cycle arrives, obtain the clock information of current system, the clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle, according to default clock correction number of times and described deviation information, determine to carry out each time the numerical information of clock correction, when each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct, the numerical information of each time clock information of system being proofreaied and correct of determining like this is less, the correction of the system clock mode by inching is realized, avoided in the prior art system clock being carried out timing, cause the problem of devices in system operation irregularity because the numerical information of proofreading and correct is large so that unexpected saltus step appears in system clock, improved the reliability and stability of system.
Below in conjunction with Figure of description each embodiment of the present invention is described in detail.
Embodiment one:
As shown in Figure 2, be the process flow diagram of the method for a kind of clock correction of the embodiment of the invention one, described method comprises:
Step 101: when a timing cycle arrives, obtain the clock information of current system.
Wherein, described timing cycle can also can be determined as required according to the determining of the state of system operation, not limit here.
Particularly, described timing cycle can be a certain regular time section, can also be a period of time length, also can carry out in real time, and namely timing cycle is not free interval.
Wherein, a plurality of clock interrupt cycles have been comprised in the described timing cycle.
Determine that the mode that timing cycle arrives includes but not limited to following mode:
First kind of way: determined the arrival of timing cycle by software program.For example: software timer.
The second way: determined the arrival of timing cycle by the timing watch-dog of hardware.
When determining that a timing cycle arrives, the mode of obtaining the clock information of current system includes but not limited to: the RTC clock information that reads this hardware device from external hardware device.
Step 102: the clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle.
In step 102, the reference information of described system clock refers to the standard time clock information for the corrective system clock.This standard time clock information can be obtained from other equipment, can also obtain by communication mode.
More preferably, the reference information of described system clock can be that this front once carries out the system clock information that obtains after system clock is proofreaied and correct, and is stored in local.
The clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle, concrete mode includes but not limited to:
At first, the clock information of the described current system reference information with the system clock of determining is compared, obtain the clock reference difference.
For example: the clock information of the current system that obtains is T
1, the reference information of the system clock of determining is T
2, obtain so the clock reference difference and be: (T
1-T
2).
Wherein, when described clock reference difference is positive number, illustrate that then the clock of current system is too fast, need the slower of correction; When described clock reference difference is negative, illustrate that then the clock of current system is excessively slow, need the faster of correction; When described clock reference difference is 0, illustrate that then the clock of current system is normal, do not need to proofread and correct.
Secondly, utilize the duration numerical value of described clock reference difference and timing cycle to compare, obtain the deviation information of system clock in the current timing cycle.
For the numerical value of determining in current timing cycle, system clock to be finely tuned, need at first to determine relatively and the deviation information of the system clock of the duration numerical value of timing cycle.
For example: the clock information of the current system that obtains is T
1, the reference information of the system clock of determining is T
2, obtain so the clock reference difference and be: (T
1-T
2), this moment, the duration numerical value of timing cycle was T, the deviation information of the system clock that obtains so is (T
1-T
2)-T.
Namely when the duration of timing cycle was T, needing the deviation information of the system clock of correction was (T
1-T
2In other words)-T, is exactly in the T duration, and the deviation information of finishing the system clock of correction is (T
1-T
2)-T.
Step 103: according to default clock correction number of times and described deviation information, determine in this timing cycle, to carry out each time the numerical information of clock correction.
In step 103, owing to having comprised a plurality of clock interrupt cycles in a timing cycle, when utilizing clock to interrupt system clock is proofreaied and correct, can satisfy actual needs, therefore, can select different clock interrupt cycles for a timing cycle.
Described default clock correction number of times is to determine according to the cycle duration that clock interrupts, and wherein: the cycle duration that clock interrupts is larger, and described default clock correction number of times is fewer.
Particularly, the cycle duration that interrupts according to clock determines that the concrete mode of clock correction number of times includes but not limited to:
At first, select a clock interrupt cycle according to system running state, for example: the duration information of a clock interrupt cycle is 10 milliseconds, with the cycle duration of selecting the cycle duration of clock interruption as current timing cycle internal clock interruption.
Secondly, according to the cycle duration and the corresponding relation between the clock correction number of times that default clock interrupts, clock correction number of times corresponding to the cycle duration that the clock of selecting is interrupted is as the clock correction number of times of setting.
As shown in table 1, be the cycle duration of clock interruption and the signal table of the corresponding relation between the clock correction number of times:
| The cycle duration that clock interrupts | The clock correction number of times |
| 10 milliseconds | 6000 |
| 12 milliseconds | 4000 |
| 15 milliseconds | 3000 times |
| 20 milliseconds | 1500 times |
Table 1
Particularly, when the clock correction number of times that obtains presetting, determine in this timing cycle, to carry out each time the numerical information of clock correction, specifically include but not limited to:
Described deviation information and the described clock correction number of times determined are discussed computing, and the numerical value that obtains is as the numerical information that carries out each time clock correction in this timing cycle.
For example: suppose that the deviation information that obtains is (T
1-T
2-T), what determine is that the clock correction number of times is 1500 times, carry out each time clock correction this moment in this timing cycle numerical information is (T
1-T
2-T)/1500, wherein, T is the duration information of timing cycle.
Step 104: when each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct.
Particularly, in step 104, when entering a clock interrupt cycle, utilize described numerical information that the clock information of system is proofreaied and correct.
More preferably, when each clock interrupt cycle arrives, utilize after described numerical information proofreaies and correct the clock information of system, default clock correction number of times is subtracted one.
When next clock interrupt cycle arrives, judge whether default clock correction number of times is 0, if then do not carry out clock correction and process; Otherwise, carry out the operation that utilizes described numerical information that the clock information of system is proofreaied and correct.
Except the operation that above-mentioned steps 103～step 104 is carried out, embodiment of the present invention also includes but not limited to following mode:
In obtaining current timing cycle, step 102 after the deviation information of system clock, carries out following steps:
At first, select a clock interrupt cycle according to system running state.
Secondly, according to the numerical information of the clock correction that arranges and the relation between the clock interrupt cycle duration, the numerical information of the clock correction that definite clock interrupt cycle of selecting is corresponding.
For example: described corresponding relation is to satisfy the condition of setting between the numerical information of clock correction and the clock interrupt cycle duration, particularly, described impose a condition be the numerical information of clock correction be the clock interrupt cycle duration part (for example: 1/10th).
The 3rd, according to numerical information and the described deviation information of the clock correction of determining, in this timing cycle, need to determine to carry out the number of the clock interrupt cycle of correct operation.
For example: described deviation information is 1 minute, a clock interrupt cycle is 10 milliseconds, the numerical information that carries out clock correction in the clock interrupt cycle of determining is 1 millisecond, and the number that needs so to carry out the clock interrupt cycle of correct operation in timing cycle is 6000 times.
The 4th, from first clock interrupt cycle arrives, utilize the numerical information of the clock correction of determining that system clock information is proofreaied and correct.
More preferably, every pair of system clock is proofreaied and correct once, the number of the needs of determining being carried out the clock interrupt cycle of correct operation subtracts one, and when next clock interrupt cycle arrives, whether the number of judging the clock interrupt cycle of fixed needs execution correct operation is 0, if then do not carry out clock correction and process; Otherwise, the operation that the numerical information of the clock correction that execution utilization is determined is proofreaied and correct the clock information of system.
Scheme by embodiment one, when a timing cycle arrives, obtain the clock information of current system, the clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle, according to default clock correction number of times and described deviation information, determine to carry out each time the numerical information of clock correction, when each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct, the numerical information of each time clock information of system being proofreaied and correct of determining like this is less, the correction of the system clock mode by inching is realized, avoided in the prior art system clock being carried out timing, because the numerical information of proofreading and correct is large so that unexpected saltus step appears in system clock, the problem that causes the devices in system operation irregularity has improved the reliability and stability of service system.
Embodiment two:
As shown in Figure 3, be the structural representation of the equipment of a kind of clock correction of the present embodiment two, described equipment comprises: acquisition module 11, comparison module 12, determination module 13 and correction module 14, wherein:
Wherein, described comparison module 12 specifically comprises: the first difference computational unit 21 and the second difference computational unit 22, wherein:
The first difference computational unit 21 is used for the clock information of the described current system reference information with the system clock of determining is compared, and obtains the clock reference difference;
The second difference computational unit 22 is used for utilizing the duration numerical value of described clock reference difference and timing cycle to compare, and obtains the deviation information of system clock in the current timing cycle.
A described timing cycle has comprised a plurality of clock interrupt cycles; And described default clock correction number of times is to determine according to the cycle duration that clock interrupts, wherein:
The cycle duration that clock interrupts is larger, and described default clock correction number of times is fewer.
More preferably, described determination module 13 specifically comprises: selected cell 23 and clock correction number of times determining unit 24, wherein:
Selected cell 23 is used for selecting the cycle duration of a clock interruption as the cycle duration of current timing cycle internal clock interruption;
Clock correction number of times determining unit 24 is used for the cycle duration and the corresponding relation between the clock correction number of times that interrupt according to default clock, and clock correction number of times corresponding to the cycle duration that the clock of selecting is interrupted is as the clock correction number of times of setting.
Particularly, described determination module 13, concrete described deviation information and the described clock correction number of times that is used for determining discussed computing, and the numerical value that obtains is as the numerical information that carries out each time clock correction in this timing cycle.
More preferably, described equipment also comprises: counting module 15, wherein:
Counting module 15 is used for when each clock interrupt cycle arrives, and utilizes after described numerical information proofreaies and correct the clock information of system, and default clock correction number of times is subtracted one.
More preferably, described equipment also comprises: judge module 16, wherein:
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (12)
1. the method for a clock correction is characterized in that, described method comprises:
When a timing cycle arrives, obtain the clock information of current system;
The clock information of the described current system reference information with the system clock of determining is compared, obtain the deviation information of system clock in the current timing cycle;
According to default clock correction number of times and described deviation information, determine in this timing cycle, to carry out each time the numerical information of clock correction;
When each clock interrupt cycle arrives, utilize described numerical information that the clock information of system is proofreaied and correct.
2. the method for claim 1 is characterized in that, the clock information of the described current system reference information with the system clock of determining is compared, and obtains the deviation information of system clock in the current timing cycle, specifically comprises:
The clock information of the described current system reference information with the system clock of determining is compared, obtain the clock reference difference;
Utilize the duration numerical value of described clock reference difference and timing cycle to compare, obtain the deviation information of system clock in the current timing cycle.
3. the method for claim 1 is characterized in that, a described timing cycle has comprised a plurality of clock interrupt cycles; And described default clock correction number of times is to determine according to the cycle duration that clock interrupts, wherein:
The cycle duration that clock interrupts is larger, and described default clock correction number of times is fewer.
4. method as claimed in claim 3 is characterized in that, determines the clock correction number of times according to the cycle duration that clock interrupts, and specifically comprises:
The cycle duration that the cycle duration of selecting a clock to interrupt interrupts as current timing cycle internal clock;
According to the cycle duration and the corresponding relation between the clock correction number of times that default clock interrupts, clock correction number of times corresponding to the cycle duration that the clock of selecting is interrupted is as the clock correction number of times of setting.
5. such as the arbitrary described method of claim 1～4, it is characterized in that, according to default clock correction number of times and described deviation information, determine in this timing cycle, to carry out each time the numerical information of clock correction, specifically comprise:
Described deviation information and the described clock correction number of times determined are discussed computing, and the numerical value that obtains is as the numerical information that carries out each time clock correction.
6. method as claimed in claim 5 is characterized in that, when each clock interrupt cycle arrives, utilizes after described numerical information proofreaies and correct the clock information of system, and described method also comprises:
Default clock correction number of times is subtracted one;
When next clock interrupt cycle arrives, judge whether default clock correction number of times is 0, if then do not carry out clock correction and process; Otherwise, carry out the operation that utilizes described numerical information that the clock information of system is proofreaied and correct.
7. the equipment of a clock correction is characterized in that, described equipment comprises:
Acquisition module is used for obtaining the clock information of current system when a timing cycle arrives;
Comparison module is used for the clock information of the described current system reference information with the system clock of determining is compared, and obtains the deviation information of system clock in the current timing cycle;
Determination module is used for determining to carry out each time the numerical information of clock correction according to default clock correction number of times and described deviation information in this timing cycle;
Correction module is used for utilizing described numerical information that the clock information of system is proofreaied and correct when each clock interrupt cycle arrives.
8. equipment as claimed in claim 7 is characterized in that, described comparison module specifically comprises:
The first difference computational unit is used for the clock information of the described current system reference information with the system clock of determining is compared, and obtains the clock reference difference;
The second difference computational unit is used for utilizing the duration numerical value of described clock reference difference and timing cycle to compare, and obtains the deviation information of system clock in the current timing cycle.
9. equipment as claimed in claim 7 is characterized in that, a described timing cycle has comprised a plurality of clock interrupt cycles; And described default clock correction number of times is to determine according to the cycle duration that clock interrupts, wherein:
The cycle duration that clock interrupts is larger, and described default clock correction number of times is fewer.
10. equipment as claimed in claim 9 is characterized in that, described determination module specifically comprises:
Selected cell is used for selecting the cycle duration of a clock interruption as the cycle duration of current timing cycle internal clock interruption;
Clock correction number of times determining unit is used for the cycle duration and the corresponding relation between the clock correction number of times that interrupt according to default clock, and clock correction number of times corresponding to the cycle duration that the clock of selecting is interrupted is as the clock correction number of times of setting.
11. such as the arbitrary described equipment of claim 7～10, it is characterized in that,
Described determination module, concrete described deviation information and the described clock correction number of times that is used for determining discussed computing, and the numerical value that obtains is as the numerical information that carries out each time clock correction in this timing cycle.
12. equipment as claimed in claim 11 is characterized in that, described equipment also comprises:
Counting module is used for when each clock interrupt cycle arrives, and utilizes after described numerical information proofreaies and correct the clock information of system, and default clock correction number of times is subtracted one;
Judge module is used for when next clock interrupt cycle arrives, and judges whether default clock correction number of times is 0, if then do not carry out clock correction and process; Otherwise, carry out the operation that utilizes described numerical information that the clock information of system is proofreaied and correct.
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| CN107272822A (en) * | 2017-06-16 | 2017-10-20 | 郑州云海信息技术有限公司 | A kind of system clock monitoring method and device |
| CN107544619A (en) * | 2017-06-27 | 2018-01-05 | 新华三云计算技术有限公司 | Method for synchronizing time and device |
| CN107544619B (en) * | 2017-06-27 | 2020-05-12 | 新华三云计算技术有限公司 | Time synchronization method and device |
| CN109827288A (en) * | 2018-12-29 | 2019-05-31 | 珠海格力电器股份有限公司 | A kind of automatic error-correcting control method, device and electrical equipment |
| CN109918337A (en) * | 2019-02-21 | 2019-06-21 | 广州技象科技有限公司 | A kind of time automatic calibrating method applied to SCM system |
| CN111856916A (en) * | 2019-04-30 | 2020-10-30 | 联合汽车电子有限公司 | External clock diagnosis method |
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| CN110850707B (en) * | 2019-10-17 | 2021-06-15 | 北京全路通信信号研究设计院集团有限公司 | Satellite time service-based time keeping method and system |
| CN113009899A (en) * | 2019-12-20 | 2021-06-22 | 金卡智能集团股份有限公司 | RTC (real time clock) calibration method for high-precision timing of metering instrument |
| CN111447333A (en) * | 2020-03-09 | 2020-07-24 | 深圳震有科技股份有限公司 | TDM bus fault detection method, device, equipment and readable storage medium |
| CN111447333B (en) * | 2020-03-09 | 2021-07-02 | 深圳震有科技股份有限公司 | TDM bus fault detection method, device, equipment and readable storage medium |
| CN113687916A (en) * | 2021-08-17 | 2021-11-23 | 锐捷网络股份有限公司 | Data processing method and device, time updating method and device and electronic equipment |
| CN113777981A (en) * | 2021-08-27 | 2021-12-10 | 煤炭科学技术研究院有限公司 | Fault diagnosis and voice alarm method for coal mine safety monitoring substation |
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