CN101605013A - A kind of clock synchronizing method and system - Google Patents

A kind of clock synchronizing method and system Download PDF

Info

Publication number
CN101605013A
CN101605013A CNA2009101588151A CN200910158815A CN101605013A CN 101605013 A CN101605013 A CN 101605013A CN A2009101588151 A CNA2009101588151 A CN A2009101588151A CN 200910158815 A CN200910158815 A CN 200910158815A CN 101605013 A CN101605013 A CN 101605013A
Authority
CN
China
Prior art keywords
clock
subordinate
principal
synchronism deviation
reference value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2009101588151A
Other languages
Chinese (zh)
Other versions
CN101605013B (en
Inventor
冯冬芹
章涵
褚健
金建祥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZHONGKONG SCIENCE AND TECHNOLOGY GROUP Co Ltd
Zhejiang University ZJU
Supcon Group Co Ltd
Original Assignee
ZHONGKONG SCIENCE AND TECHNOLOGY GROUP Co Ltd
Zhejiang University ZJU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZHONGKONG SCIENCE AND TECHNOLOGY GROUP Co Ltd, Zhejiang University ZJU filed Critical ZHONGKONG SCIENCE AND TECHNOLOGY GROUP Co Ltd
Priority to CN200910158815A priority Critical patent/CN101605013B/en
Publication of CN101605013A publication Critical patent/CN101605013A/en
Application granted granted Critical
Publication of CN101605013B publication Critical patent/CN101605013B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The embodiment of the invention provides a kind of clock synchronizing method and system.A kind of embodiment of clock synchronizing method comprises: obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtain synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock; Obtain in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock; Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock; Calculate synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval; With being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock, carry out clock synchronization as master clock.The embodiment of the invention has reduced synchronism deviation between principal and subordinate's clock, makes synchronism deviation between principal and subordinate's clock satisfy required precision between principal and subordinate's clock of system.

Description

A kind of clock synchronizing method and system
Technical field
The present invention relates to the industrial communication technical field, particularly a kind of clock synchronizing method and system.
Background technology
Along with network application in industrial control system, the effect of Clock Synchronization Technology in industrial control system is more and more important, and different commercial Application has also proposed different requirements to the clock synchronization accuracy of equipment room.The most frequently used clock synchronizing method is in the industrial control system at present: under the master-slave network structure, main equipment clock in the network system is regularly to slave unit clock broadcast main equipment self time, all slave units upgrade self clock after receiving described main equipment self time in the network system, thereby all clocks is synchronous in the realization network system.
But in industrial control system, after master-slave equipment is realized clock synchronization, owing to there are deviations such as crystal oscillator frequency between master-slave equipment, make the clock synchronization deviation between master-slave equipment increase, may cause clock synchronization deviation between master-slave equipment is that synchronism deviation can not satisfy synchronization accuracy requirement between principal and subordinate's clock between principal and subordinate's clock.
Summary of the invention
The purpose of the embodiment of the invention provides a kind of clock synchronizing method and system, and to solve after master-slave equipment is realized clock synchronization, the clock synchronization deviation between master-slave equipment can satisfy synchronization accuracy requirement between principal and subordinate's clock.
For solving the problems of the technologies described above, a kind of clock synchronizing method and system that the embodiment of the invention provides are achieved in that
A kind of clock synchronizing method comprises:
Obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtain synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock;
Obtain in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock;
Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock;
Calculate synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval;
With being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock, carry out clock synchronization as master clock.
A kind of clock system comprises:
First acquiring unit is used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtains synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock;
Second acquisition unit is used for obtaining in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock; Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock;
Computing unit is used for calculating synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval;
Processing unit is used for carrying out clock synchronization with being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock as master clock.
The technical scheme that is provided by the above embodiment of the invention as seen, the embodiment of the invention is after principal and subordinate's clock is realized clock synchronization, according to synchronization accuracy between principal and subordinate's clock require and principal and subordinate's clock between synchronism deviation calculate synchronizing frequency minimum value between principal and subordinate's clock, adjust the synchronizing frequency of master clock according to synchronizing frequency minimum value between described principal and subordinate's clock, make of the synchronizing frequency increase of the synchronizing frequency of adjusted master clock than the master clock before adjusting, thereby reduced synchronism deviation between principal and subordinate's clock, made synchronism deviation between principal and subordinate's clock satisfy required precision between principal and subordinate's clock of system.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only shows some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain the accompanying drawing of other embodiment according to these accompanying drawings.
Fig. 1 is the clock synchronizing method flow chart that the embodiment of the invention provides;
Fig. 2 be the embodiment of the invention provide obtain flow chart from the clock weight coefficient;
Fig. 3 is the clock system block diagram that the embodiment of the invention provides;
Fig. 4 is the first embodiment block diagram of first acquiring unit that provides of the embodiment of the invention;
Fig. 5 is the second embodiment block diagram of first acquiring unit that provides of the embodiment of the invention;
Fig. 6 is the 3rd an embodiment block diagram of first acquiring unit that provides of the embodiment of the invention;
Fig. 7 is the embodiment block diagram that weight coefficient that the embodiment of the invention provides obtains subelement.
Embodiment
The embodiment of the invention provides a kind of clock synchronizing method and system.
In order to make those skilled in the art person understand the present invention program better, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills should belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
Below introduce the method embodiment of the clock synchronizing method that the embodiment of the invention provides, Fig. 1 shows the flow chart of this embodiment, and this method embodiment may further comprise the steps:
S101: obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtain synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock.
In actual applications, master clock is regularly published self time and is given from clock, receive the time that master clock regularly publishes from clock after, write down before the local clock synchronization synchronism deviation between principal and subordinate's clock.
Master clock is after realizing clock synchronization, and obtaining from the method for synchronism deviation between principal and subordinate's clock of clock transmission has two kinds, is specially:
1, master clock sends a request message to from clock, comprises in the described request message that request sends synchronism deviation message between principal and subordinate's clock from clock.
After receiving described request message from clock, send that synchronism deviation is to master clock between described principal and subordinate's clock, synchronism deviation is sent to master clock with the form of message between described principal and subordinate's clock;
Master clock receives synchronism deviation between described principal and subordinate's clock.
2, initiatively report synchronism deviation between described principal and subordinate's clock to master clock from clock after finishing clock synchronization, synchronism deviation is sent to master clock with the form of message between described principal and subordinate's clock at every turn.
Master clock receives synchronism deviation between described principal and subordinate's clock.
In embodiments of the present invention, master clock receives after synchronism deviation between principal and subordinate's clock of clock transmission, and the method for obtaining synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock specifically can comprise following three kinds:
One, master clock selects between described principal and subordinate's clock the maximum in the synchronism deviation as synchronism deviation reference value between principal and subordinate's clock.
Two, calculate the mean value of synchronism deviation between described principal and subordinate's clock, with the mean value of synchronism deviation between described master-slave equipment as synchronism deviation reference value between principal and subordinate's clock.
Three, obtain weight coefficient from clock, calculate synchronism deviation reference value between principal and subordinate's clock according to described weight coefficient from clock, the synchronism deviation reference value is between described principal and subordinate's clock:
Figure G2009101588151D00041
Wherein, i represents the label from clock, and n represents the number from clock.
S102: obtain in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock.
In actual applications, master clock obtains Y synchronizing cycle of master clock, master clock according to described master clock synchronizing cycle Y and described principal and subordinate's clock between synchronism deviation reference value X unit of account in the time between principal and subordinate's clock the synchronism deviation reference value be: X/Y.
S103: require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock.
Synchronization accuracy requires the synchronism deviation value scope that allows between outside principal and subordinate's clock that clock system is set between described principal and subordinate's clock, with the maximum in the synchronism deviation value scope that allows between described principal and subordinate's clock as the maximum synchronism deviation Z that allows between principal and subordinate's clock.
S104: calculate synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval.
Maximum is to calculate between principal and subordinate's clock synchronizing cycle according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval:
Z/(X/Y)=Z*Y/X
The synchronizing frequency minimum value is between principal and subordinate's clock according to calculating synchronizing cycle between described principal and subordinate's clock:
1/(Z*Y/X)=X/(Z*Y)
If synchronism deviation reference value X is greater than the maximum synchronism deviation Z that allows between principal and subordinate's clock between principal and subordinate's clock, be that synchronism deviation increases between principal and subordinate's clock, make synchronism deviation between principal and subordinate's clock can not satisfy synchronization accuracy requirement between principal and subordinate's clock of system, according to X/ (Z*Y) as can be known, master clock should improve the synchronizing frequency of master clock, make master clock as early as possible the tranmitting data register sync message realize between principal and subordinate's clock synchronously.
S105: will be not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock, and carry out clock synchronization as master clock.
Master clock can be realized the embodiment of the invention as the synchronizing frequency value of master clock with the arbitrary value that is not less than synchronizing frequency minimum value between described principal and subordinate's clock, it is higher but if the synchronizing frequency of master clock is provided with, can cause too much clock synchronization operation, strengthen the load of network and CPU.Preferably, master clock is adjusted into synchronizing frequency between described principal and subordinate's clock with the synchronizing frequency of master clock.
If the synchronism deviation reference value is than little from synchronism deviation between actual principal and subordinate's clock of clock between principal and subordinate's clock, in order fully to guarantee that synchronism deviation between principal and subordinate's clock satisfies synchronization accuracy requirement between principal and subordinate's clock of system, can further improve between principal and subordinate's clock the synchronizing frequency minimum value on the basis of synchronizing frequency minimum value between the principal and subordinate's clock that calculates as the synchronizing frequency of master clock.
After master-slave equipment realization clock synchronization in the prior art, clock synchronization deviation between master-slave equipment can not satisfy that synchronization accuracy requires between principal and subordinate's clock, the embodiment of the invention require according to synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock between synchronism deviation calculate synchronizing frequency minimum value between principal and subordinate's clock, adjust the synchronizing frequency of master clock according to synchronizing frequency minimum value between described principal and subordinate's clock, make the synchronizing frequency of adjusted master clock adjust the synchronizing frequency increase of preceding master clock, thereby reduced synchronism deviation between principal and subordinate's clock, made synchronism deviation between principal and subordinate's clock satisfy required precision between principal and subordinate's clock of system.
After master clock carried out clock synchronization, the synchronizing frequency of master clock is continued to optimize and adjusted to repeated execution of steps 101~105, constantly adjust automatically and compensation principal and subordinate clock between synchronism deviation, realize the process of dynamic optimization.
On the other hand, after if master-slave equipment is realized clock synchronization in the prior art, clock synchronization deviation between master-slave equipment can satisfy synchronization accuracy requirement between principal and subordinate's clock, but synchronization accuracy requires to be provided with words less than normal between master clock relative principal and subordinate's clock synchronizing cycle, also can increase the synchronizing cycle of master clock by the method that the embodiment of the invention provides, thereby realization reduces the function of the load of network and CPU.
On the other hand, the clock synchronizing method that the embodiment of the invention the provides crystal oscillator backoff algorithm algorithm of the prior art of comparing is simple, has saved the software and hardware resources of system, has improved the reliability of clock synchronization.
Fig. 2 obtains flow chart for what the embodiment of the invention provided from the clock weight coefficient, describedly obtains flow process from the clock weight coefficient and may further comprise the steps:
S201:, obtain the quantitative evaluation value to from the importance of clock corresponding device control system, synchronism deviation between the requirement of synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock is carried out quantitative evaluation respectively from clock.
For in the network system each from clock, respectively to from the importance of clock corresponding device control system, synchronism deviation between the requirement of synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock is carried out quantitative evaluation from clock, obtain quantitative evaluation value A, B and C, and quantitative evaluation value A, B and C all belong in the scope of [1%, 100%].
The standard of quantitative evaluation can for: high more from the importance of clock corresponding device control system, quantitative evaluation value A is high more; High more to the requirement of synchronization accuracy between principal and subordinate's clock from clock, quantitative evaluation value B is high more; Synchronism deviation is more little between principal and subordinate's clock, and quantitative evaluation value C is high more.But the standard of quantitative evaluation is not limited to this, does not do at this and gives unnecessary details.
Can also divide with grade 1~10 for A, B and C and to sort out, grade 1~10 quality is in order successively decreased, the optimal quality of grade 1 expression quantitative evaluation value, and the quality of 10 expressions of grade quantitative evaluation value are the poorest.
The quantitative evaluation value is divided into the method for grade 1~10, include but not limited to the following criteria for classifying, for example: the quantitative evaluation value that will be positioned at 1%~10% scope is classified as grade 1, and the quantification mean value that will be positioned at 11%~20% scope is classified as grade 2, by that analogy.
S202:, obtain the weight coefficient of described quantitative evaluation value correspondence according to predetermined application requirements.
Suppose from the importance of clock corresponding device control system, the weight coefficient of synchronism deviation between the requirement of synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock be respectively a, b and c from clock, and a+b+c=1.The concrete parameter value of a, b, c is according to the difference of application requirements, is provided with by the structure side of network system.For example at requiring the highest application from clock corresponding device importance in the control system, weight coefficient a can be set at one maximum among a, b, the c, value as a, b, c is respectively: 0.5,0.2,0.3, illustrate that this application is the highest to requiring from clock corresponding device importance in the control system, require minimum synchronization accuracy between principal and subordinate's clock.
S203: calculate weight coefficient from clock according to described quantitative evaluation value and described weight coefficient.
From the weight coefficient of clock be: A*a+B*b+C*c.
Described to from the importance of clock corresponding device control system, from clock to synchronism deviation between the requirement of synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock carry out respectively obtaining of quantitative evaluation and described weight coefficient can be by master clock according to self to all carry out respective handling from the understanding of the situation information of clock corresponding device the network system.
Acquisition methods from the clock weight coefficient in the embodiment of the invention can adopt method shown in Figure 2 to obtain, and perhaps also can adopt the method that directly reads outside configuration and setting to obtain weight coefficient from clock, is specially:
All weight coefficients in the direct configuration and setting network system of external equipment from clock;
Master clock directly reads the described weight coefficient from clock by the external equipment configuration and setting, thereby obtains the weight coefficient from clock.
The embodiment of the invention is according to the weight coefficient from the various computing of clock weight from clock, and then calculates synchronism deviation reference value between principal and subordinate's clock, between described principal and subordinate's clock the concentrated expression of synchronism deviation reference value in the network system from the importance of clock.
Corresponding with the method that a kind of clock synchronizing method embodiment of the invention described above is provided, referring to Fig. 3, the present invention also provides a kind of embodiment of clock system, and in the present embodiment, this system comprises:
First acquiring unit 301 is used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtains synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock.
Second acquisition unit 302 is used for obtaining in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock; Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock.
In actual applications, second acquisition unit 302 obtains Y synchronizing cycle of master clock, according to described master clock synchronizing cycle Y and described principal and subordinate's clock between synchronism deviation reference value X unit of account in the time between principal and subordinate's clock the synchronism deviation reference value be: X/Y.
Synchronization accuracy requires the synchronism deviation value scope that allows between outside principal and subordinate's clock that clock system is set between described principal and subordinate's clock, second acquisition unit 302 with the maximum in the synchronism deviation value scope that allows between described principal and subordinate's clock as the maximum synchronism deviation Z that allows between principal and subordinate's clock.
Computing unit 303 is used for calculating synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval.
Maximum is to calculate between principal and subordinate's clock synchronizing cycle according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval:
Z/(X/Y)=Z*Y/X
The synchronizing frequency minimum value is between principal and subordinate's clock according to calculating synchronizing cycle between described principal and subordinate's clock:
1/(Z*Y/X)=X/(Z*Y)
Processing unit 304 is used for carrying out clock synchronization with being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock as master clock.
Processing unit 304 can be realized the embodiment of the invention as the synchronizing frequency value of master clock with the arbitrary value that is not less than synchronizing frequency minimum value between described principal and subordinate's clock, it is higher but if the synchronizing frequency of master clock is provided with, can cause too much clock synchronization operation, strengthened the load of network and CPU, preferably, processing unit 304 is adjusted into synchronizing frequency minimum value between described principal and subordinate's clock with the synchronizing frequency of master clock.
After master-slave equipment realization clock synchronization in the prior art, clock synchronization deviation between master-slave equipment can not satisfy that synchronization accuracy requires between principal and subordinate's clock, the embodiment of the invention require according to synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock between synchronism deviation calculate synchronizing frequency minimum value between principal and subordinate's clock, adjust the synchronizing frequency of master clock according to synchronizing frequency minimum value between described principal and subordinate's clock, make the synchronizing frequency of adjusted master clock adjust the synchronizing frequency increase of preceding master clock, reduce synchronism deviation between principal and subordinate's clock, made synchronism deviation between principal and subordinate's clock satisfy required precision between principal and subordinate's clock of system.
On the other hand, after if master-slave equipment is realized clock synchronization in the prior art, clock synchronization deviation between master-slave equipment can satisfy synchronization accuracy requirement between principal and subordinate's clock, but synchronization accuracy requires to be provided with words less than normal between master clock relative principal and subordinate's clock synchronizing cycle, also can increase the synchronizing cycle of master clock by the system that the embodiment of the invention provides, thereby realization reduces the function of the load of network and CPU.
On the other hand, the clock system that the embodiment of the invention provides can be saved the software and hardware resources of system, has improved the reliability of clock synchronization.
The first embodiment block diagram of first acquiring unit that Fig. 4 provides for the embodiment of the invention, described first acquiring unit comprises:
Obtain subelement 401, be used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission.
In embodiments of the present invention, master clock is after realizing clock synchronization, and obtaining from the method for synchronism deviation between principal and subordinate's clock of clock transmission has two kinds, is specially:
1, master clock sends a request message to from clock, comprises in the described request message that request sends synchronism deviation message between principal and subordinate's clock from clock.
After receiving described request message from clock, send between described principal and subordinate's clock synchronism deviation to master clock;
Master clock receives synchronism deviation between described principal and subordinate's clock.
2, initiatively report synchronism deviation between described principal and subordinate's clock to master clock from clock after finishing clock synchronization, synchronism deviation is sent to master clock with the form of message between described principal and subordinate's clock at every turn.
Master clock receives synchronism deviation between described principal and subordinate's clock.
Chooser unit 402 is used for selecting the maximum of synchronism deviation between described principal and subordinate's clock as synchronism deviation reference value between principal and subordinate's clock.
The second embodiment block diagram of first acquiring unit that Fig. 5 provides for the embodiment of the invention comprises:
Obtain subelement 501, be used to receive from synchronism deviation between principal and subordinate's clock of clock transmission.
Describedly obtain subelement 501 and described to obtain subelement 401 functions identical, do not do at this and give unnecessary details.
Mean value calculation subelement 502 is used to calculate the mean value of synchronism deviation between described principal and subordinate's clock, with the mean value of synchronism deviation between described master-slave equipment as synchronism deviation reference value between principal and subordinate's clock.
The 3rd embodiment block diagram of first acquiring unit that Fig. 6 provides for the embodiment of the invention comprises:
Obtain subelement 601, be used to receive from synchronism deviation between principal and subordinate's clock of clock transmission.
Describedly obtain subelement 601 and described to obtain subelement 401 functions identical, do not do at this and give unnecessary details.
Weight coefficient obtains subelement 602, is used to obtain the weight coefficient from clock.
Synchronism deviation reference value computation subunit 603 is used for calculating synchronism deviation reference value between principal and subordinate's clock according to described weight coefficient from clock.
The weight coefficient that Fig. 7 provides for the embodiment of the invention obtains the embodiment block diagram of subelement, and described weight coefficient obtains subelement and comprises:
Quantitative evaluation subelement 701, be used for to from the clock corresponding device the importance of control system, from clock to principal and subordinate's clock between between the requirement of synchronization accuracy and principal and subordinate's clock synchronism deviation carry out quantitative evaluation respectively, obtain the quantitative evaluation value.
Weight coefficient obtains subelement 702, is used for obtaining the weight coefficient of described quantitative evaluation value correspondence according to predetermined application requirements.
Weight coefficient computation subunit 703 is used for calculating weight coefficient from clock according to described quantitative evaluation value and described weight coefficient.
The weight coefficient that another embodiment of the present invention provides obtains subelement and specifically is used to read the weight coefficient from clock by the external equipment configuration and setting.
For device class embodiment, because it is similar substantially to method embodiment, so description is fairly simple, relevant part gets final product referring to the part explanation of method embodiment.
The embodiment of the invention can be used in numerous general or special purpose calculation element environment or the configuration.For example: personal computer, server computer, handheld device or portable set, plate equipment, multiprocessor device, comprise distributed computing environment (DCE) of above any device or equipment or the like.
The embodiment of the invention can be described in the general context of the computer executable instructions of being carried out by computer, for example program module.Usually, program module comprises the routine carrying out particular task or realize particular abstract, program, object, assembly, data structure or the like.Also can in distributed computing environment (DCE), put into practice the embodiment of the invention, in these distributed computing environment (DCE), by by communication network connected teleprocessing equipment execute the task.In distributed computing environment (DCE), program module can be arranged in the local and remote computer-readable storage medium that comprises memory device.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims (12)

1, a kind of clock synchronizing method is characterized in that, comprising:
Obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtain synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock;
Obtain in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock;
Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock;
Calculate synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval;
With being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock, carry out clock synchronization as master clock.
2, clock synchronizing method according to claim 1 is characterized in that, describedly obtains according to synchronism deviation between described principal and subordinate's clock that the synchronism deviation reference value comprises between principal and subordinate's clock:
Select between described principal and subordinate's clock the maximum in the synchronism deviation as synchronism deviation reference value between principal and subordinate's clock.
3, clock synchronizing method according to claim 1 is characterized in that, describedly obtains according to synchronism deviation between described principal and subordinate's clock that the synchronism deviation reference value comprises between principal and subordinate's clock:
Calculate the mean value of synchronism deviation between described principal and subordinate's clock, with the mean value of synchronism deviation between described principal and subordinate's clock as synchronism deviation reference value between principal and subordinate's clock.
4, clock synchronizing method according to claim 1 is characterized in that, describedly obtains according to synchronism deviation between described principal and subordinate's clock that the synchronism deviation reference value comprises between principal and subordinate's clock:
Obtain weight coefficient from clock;
According to described from clock weight coefficient and described principal and subordinate's clock between synchronism deviation calculate that the synchronism deviation reference value is between principal and subordinate's clock:
Figure A2009101588150002C1
Wherein, i represents the label from clock, and n represents the number from clock.
5, clock synchronizing method according to claim 4 is characterized in that, described obtaining from the weight coefficient of clock comprises:
To from the importance of clock corresponding device control system, synchronism deviation between the requirement of synchronization accuracy between principal and subordinate's clock and principal and subordinate's clock is carried out quantitative evaluation respectively, obtain the quantitative evaluation value from clock;
According to predetermined application requirements, obtain the weight coefficient of described quantitative evaluation value correspondence;
Calculate weight coefficient according to described quantitative evaluation value and described weight coefficient from clock.
6, clock synchronizing method according to claim 4 is characterized in that, described obtaining from the weight coefficient of clock is specially the weight coefficient from clock that reads by the external equipment configuration and setting.
7, a kind of clock system is characterized in that, comprising:
First acquiring unit is used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission, obtains synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation between described principal and subordinate's clock;
Second acquisition unit is used for obtaining in the unit interval synchronism deviation reference value between principal and subordinate's clock according to synchronism deviation reference value between described principal and subordinate's clock; Require to obtain the maximum synchronism deviation that allows between principal and subordinate's clock according to synchronization accuracy between principal and subordinate's clock;
Computing unit is used for calculating synchronizing frequency minimum value between principal and subordinate's clock according to the maximum synchronism deviation that allows between synchronism deviation reference value and described principal and subordinate's clock between principal and subordinate's clock in the described unit interval;
Processing unit is used for carrying out clock synchronization with being not less than the synchronizing frequency value of the value of synchronizing frequency minimum value between described principal and subordinate's clock as master clock.
8, clock system according to claim 7 is characterized in that, described first acquiring unit comprises:
Obtain subelement, be used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission;
The chooser unit is used for selecting the maximum of synchronism deviation between described principal and subordinate's clock as synchronism deviation reference value between principal and subordinate's clock.
9, clock system according to claim 7 is characterized in that, described first acquiring unit comprises:
Obtain subelement, be used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission;
The mean value calculation subelement is used to calculate the mean value of synchronism deviation between described principal and subordinate's clock, with the mean value of synchronism deviation between described principal and subordinate's clock as synchronism deviation reference value between principal and subordinate's clock.
10, clock system according to claim 7 is characterized in that, described first acquiring unit comprises:
Obtain subelement, be used to obtain from synchronism deviation between principal and subordinate's clock of clock transmission;
Weight coefficient obtains subelement, is used to obtain the weight coefficient from clock;
Synchronism deviation reference value computation subunit, be used for according to described from clock weight coefficient and described principal and subordinate's clock between synchronism deviation calculate synchronism deviation reference value between principal and subordinate's clock.
11, clock system according to claim 10 is characterized in that, described weight coefficient obtains subelement and comprises:
The quantitative evaluation subelement, be used for to from the clock corresponding device the importance of control system, from clock to principal and subordinate's clock between between the requirement of synchronization accuracy and principal and subordinate's clock synchronism deviation carry out quantitative evaluation respectively, obtain the quantitative evaluation value;
Weight coefficient obtains subelement, is used for obtaining the weight coefficient of described quantitative evaluation value correspondence according to predetermined application requirements;
The weight coefficient computation subunit is used for calculating weight coefficient from clock according to described quantitative evaluation value and described weight coefficient.
12, clock system according to claim 10 is characterized in that, described weight coefficient obtains subelement and specifically is used to read the weight coefficient from clock by the external equipment configuration and setting.
CN200910158815A 2009-07-06 2009-07-06 Clock synchronization method and system Expired - Fee Related CN101605013B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200910158815A CN101605013B (en) 2009-07-06 2009-07-06 Clock synchronization method and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910158815A CN101605013B (en) 2009-07-06 2009-07-06 Clock synchronization method and system

Publications (2)

Publication Number Publication Date
CN101605013A true CN101605013A (en) 2009-12-16
CN101605013B CN101605013B (en) 2012-09-05

Family

ID=41470578

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200910158815A Expired - Fee Related CN101605013B (en) 2009-07-06 2009-07-06 Clock synchronization method and system

Country Status (1)

Country Link
CN (1) CN101605013B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103378848A (en) * 2012-04-26 2013-10-30 华为技术有限公司 Method and device for selecting sampling clock
CN106685632A (en) * 2016-12-02 2017-05-17 杭州维昕科技有限公司 Low-crystal oscillator precision-based low-rate wireless TD transmission method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893318A (en) * 1988-01-26 1990-01-09 Computer Sports Medicine, Inc. Method for referencing multiple data processors to a common time reference
CN101217330B (en) * 2008-01-02 2012-07-25 中兴通讯股份有限公司 A method and device for time synchronism calibration
CN101227246A (en) * 2008-01-28 2008-07-23 中兴通讯股份有限公司 Method and apparatus for master-salve clock synchronization

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103378848A (en) * 2012-04-26 2013-10-30 华为技术有限公司 Method and device for selecting sampling clock
CN103378848B (en) * 2012-04-26 2016-03-30 华为技术有限公司 A kind of system of selection of sampling clock and device
CN106685632A (en) * 2016-12-02 2017-05-17 杭州维昕科技有限公司 Low-crystal oscillator precision-based low-rate wireless TD transmission method

Also Published As

Publication number Publication date
CN101605013B (en) 2012-09-05

Similar Documents

Publication Publication Date Title
CN102929735B (en) A kind of method and apparatus of clock correction
CN101827302B (en) Processing method and unified service platform are unified in multi-service
EP2976926A2 (en) Dynamic intervals for synchronizing data
CN110019537A (en) Local cache method for refreshing, device, computer equipment and storage medium
CN101605013B (en) Clock synchronization method and system
EP3723343B1 (en) Resource processing method and system, storage medium and electronic device
CN107436839B (en) Process load acquisition method, electronic terminal and computer readable storage medium
CN115879543B (en) Model training method, device, equipment, medium and system
CN109660310B (en) Clock synchronization method and device, computing equipment and computer storage medium
CN115982273A (en) Data synchronization method, system, electronic equipment and storage medium
US7536580B2 (en) System and method for generating timer output corresponding to timer request from plurality of processes
CN115694704A (en) Time synchronization method, device, equipment and storage medium
CN115269145A (en) High-energy-efficiency heterogeneous multi-core scheduling method and device for offshore unmanned equipment
CN114493119A (en) Production scheduling method, device, equipment and storage medium for manufacturing execution system
CN111124482B (en) Configuration method and device for document information
CN113204516A (en) Method and device for time synchronization of processors
CN106776035B (en) Method and system for realizing cross-system multi-document algorithm docking and request heterogeneous system
CN111324310A (en) Data reading method and device and computer system
CN112148448B (en) Resource allocation method, apparatus, device and computer readable medium
CN117236522B (en) Power energy consumption management method, system, electronic equipment and medium
US20240143394A1 (en) Heterogeneous computing terminal for task scheduling
CN114625364A (en) Data processing method, device, equipment and storage medium
CN103345237B (en) The method of adjustment of real time data time tag, host computer and scattered control system
CN111628571A (en) Master-slave-free carrier synchronization method for multi-module system and multi-module carrier synchronization system
CN112632053A (en) Method and system for realizing data splicing

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120905

Termination date: 20180706