CN111447333B - TDM bus fault detection method, device, equipment and readable storage medium - Google Patents
TDM bus fault detection method, device, equipment and readable storage medium Download PDFInfo
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- CN111447333B CN111447333B CN202010157237.6A CN202010157237A CN111447333B CN 111447333 B CN111447333 B CN 111447333B CN 202010157237 A CN202010157237 A CN 202010157237A CN 111447333 B CN111447333 B CN 111447333B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M7/00—Arrangements for interconnection between switching centres
- H04M7/006—Networks other than PSTN/ISDN providing telephone service, e.g. Voice over Internet Protocol (VoIP), including next generation networks with a packet-switched transport layer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M7/00—Arrangements for interconnection between switching centres
- H04M7/006—Networks other than PSTN/ISDN providing telephone service, e.g. Voice over Internet Protocol (VoIP), including next generation networks with a packet-switched transport layer
- H04M7/0081—Network operation, administration, maintenance, or provisioning
- H04M7/0084—Network monitoring; Error detection; Error recovery; Network testing
Abstract
The application relates to a TDM bus fault detection method, a device, equipment and a readable storage medium, wherein the method comprises the following steps: configuring a TDM controller, and generating an interrupt to a CPU every first preset time; the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times; comparing the actual interruption times with expected times of expected time; and comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm to perform abnormal recovery processing. The fault detection mechanism of the TDM (time division multiplexing interface) hardware provided by the invention is used for detecting the working condition of the TDM hardware, thereby facilitating the detection of the TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned.
Description
Technical Field
The present application relates to the technical field of voice transmission systems based on IP, and in particular, to a TDM bus fault detection method, apparatus, device, and readable storage medium.
Background
Existing VoIP (voice over IP) systems typically employ a CPU to process call control messages and a dedicated voice DSP (digital signal processor) to process voice codecs, which provides a TDM (time division multiplexing) interface to access the data exchanged in the time slots.
The TDM (time division multiplexing interface) bus works reliably and stably, but the TDM (time division multiplexing interface) bus of some equipment in the prior art works problematically, which is shown in that the established voice channel has no voice, and the whole system is easy to work abnormally. There are many reasons for no voice, and there is no fault detection mechanism for TDM hardware in the prior art to detect the working condition of TDM hardware, which is inconvenient for detecting TDM bus fault.
Therefore, the prior art is in need of improvement.
Disclosure of Invention
The invention provides a TDM bus fault detection method, a device, equipment and a readable storage medium, and the fault detection mechanism of TDM hardware provided by the invention is used for detecting the working condition of TDM hardware, thereby facilitating the detection of TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned; the invention can quickly solve the problem of voice service and indicate the host after the TDM bus is recovered.
The technical scheme of the invention is as follows:
a TDM bus fault detection method, wherein the method comprises:
configuring a TDM controller, and generating an interrupt to a CPU every first preset time;
the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times;
comparing the actual interruption times with expected times of expected time;
and comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm to perform abnormal recovery processing.
The TDM bus fault detection method comprises the following steps of:
it is determined whether the measured actual number of interruptions is less than the expected number of interruptions in the expected time (1+ tolerance) or whether the measured actual number of interruptions in the TDM is greater than the expected number of interruptions in the expected time (1+ tolerance).
The TDM bus fault detection method comprises the following steps of comparing expected times of detected expected time with actual interruption times, judging differences generated by a TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm, and performing abnormal recovery processing, wherein the steps comprise:
and when the measured TDM actual interruption times are less than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are more than the expected times (1+ tolerance) of the expected time, determining that the TDM clock fails, sending an alarm, and performing exception recovery processing.
The TDM bus fault detection method comprises the following steps of comparing expected times of detected expected time with actual interruption times, judging differences generated by a TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm, and performing abnormal recovery processing, wherein the steps of:
and when the measured TDM actual interruption times are larger than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are smaller than the expected times (1+ tolerance) of the expected time, judging that the TDM clock is normal, and redoing the check.
The TDM bus fault detection method comprises the following steps of:
interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute;
the tolerance is plus or minus 20%.
The TDM bus fault detection method further comprises the following steps:
when the TDM bus recovers after detecting the failure, information will be indicated to the host that the TDM bus has recovered.
A TDM bus fault detection apparatus, wherein the apparatus comprises:
the configuration module is used for configuring the TDM controller and generating an interrupt to the CPU every first preset time;
the interrupt checking module is used for controlling the CPU to detect the interrupt generation times at regular time, and the interrupt generation times are actual interrupt times;
the comparison module is used for comparing the actual interruption times with the expected times of the expected time;
and the judging and fault alarming module is used for comparing the expected times and the actual interruption times of the detected expected time, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, and if not, judging that the TDM clock is abnormal and sending an alarm to perform abnormal recovery processing.
The TDM bus fault detection device comprises a judging and fault alarming module, a bus fault detection module and a bus fault detection module, wherein the judging and fault alarming module comprises a bus fault detection module;
a fault processing unit, configured to determine that the TDM clock has a fault and send an alarm to perform exception recovery processing when the measured TDM actual interruption time is less than an expected time (1-tolerance) or the measured TDM actual interruption time is greater than the expected time (1+ tolerance);
and the normal processing unit is used for judging that the TDM clock is normal when the measured TDM actual interruption times are greater than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are less than the expected times (1+ tolerance) of the expected time, and redoing the check.
An apparatus comprising a memory and a processor, the memory storing a computer program, wherein the processor implements the steps of any of the methods when executing the computer program.
A computer-readable storage medium, on which a computer program is stored, wherein the computer program realizes the steps of any of the methods when executed by a processor.
Compared with the prior art, the embodiment of the invention has the following advantages:
the utility model relates to a TDM bus fault detection method, a device and a readable storage medium, wherein, the method adopts a configuration TDM controller to generate an interrupt to a CPU at intervals of a first preset time; the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times; comparing the actual interruption times with expected times of expected time; and comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured actual interruption times of the TDM clock are within the tolerance, judging that the TDM clock works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm, performing abnormal recovery processing, finding the difference generated by the TDM clock according to the comparison of the expected interruption times of the detected time and the actual interruption times, and if the expected interruption times of the detected time are within the tolerance, judging that the TDM clock works normally, otherwise, judging that the TDM clock works abnormally. The fault detection mechanism of the TDM (time division multiplexing interface) hardware provided by the invention is used for detecting the working condition of the TDM hardware, thereby facilitating the detection of the TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a TDM bus fault detection method according to an embodiment of the present invention.
Fig. 2 is a functional block diagram of a TDM bus fault detection apparatus according to an embodiment of the present invention.
Fig. 3 is a functional block diagram of an apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The inventor has found that, in the prior art, the TDM (time division multiplexing interface) bus generally works reliably and stably, but the TDM (time division multiplexing interface) bus of the existing device in the prior art works problematically, which is that the established voice channel has no voice, and the whole system is easy to work abnormally. There are many reasons for no voice, and there is no fault detection mechanism for TDM hardware in the prior art to detect the working condition of TDM hardware, which is inconvenient for detecting TDM bus fault.
In order to solve the above problem, in the embodiment of the present invention, an extension method for a TDM interface is provided, where a difference generated by a TDM clock is found according to a comparison between an expected number of interrupts and an actual number of interrupts of a detected time, and if the difference indicates that TDM operates normally within a tolerance, otherwise, the difference is abnormal. The fault detection mechanism of the TDM (time division multiplexing interface) hardware provided by the invention is used for detecting the working condition of the TDM hardware, thereby facilitating the detection of the TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned.
Various non-limiting embodiments of the present invention are described in detail below with reference to the accompanying drawings.
The embodiment of the invention provides a mechanism for detecting TDM hardware faults; the method is mainly designed as an auxiliary means for the problem of quick positioning; and instructs the host after the TDM bus is restored. The present invention supports TDMCKIN (meaning clock input) and TDMFS (frame synchronization signal) presence detection, which will send an alarm when one or both signals are lost.
Specifically, referring to fig. 1, fig. 1 shows a TDM bus fault detection method in an embodiment of the present invention, where the method includes:
step S1, configuring TDM controller, generating an interrupt to CPU every first preset time;
in the embodiment of the present invention, a TDM (time division multiplexing interface) controller needs to be configured, for example, to generate an interrupt to a CPU every first predetermined time (for example, 5 milliseconds). Typically 1 frame data is 0.125us, 40 frames worth of data, 5 milliseconds.
Specifically, it is to detect TDMCKIN (clock input) and TDMFS (frame synchronization signal) loss;
the TDM (time division multiplexing interface) hardware of the inventive apparatus uses a special DMA (direct memory access)) to collect data from the TDM (time division multiplexing interface) bus. When a slot is opened and TDMCKIN/TDMFS (frame synchronization signal) is correct, it will periodically generate an interrupt. The interrupt handler will increment a counter to mark the presence of the clock. TDMCKIN (i.e., TDMCLOCKIN refers to a clock input), such as an 8M,16M clock. TDMFS refers to a frame synchronization signal.
Step S2, the CPU detects the interrupt generation times in fixed time, which is the actual interrupt times;
in the embodiment of the invention, a CPU detects the interrupt generation times at regular time, which is the actual interrupt times; for example, the CPU expects to generate (1000/5) × 60 12000 times every 1 minute.
Step S3, comparing the actual interruption times with the expected times of the expected time;
in the embodiment of the invention, the actual interruption times are compared with the expected times of the expected time. For example, it is determined whether the measured actual number of interruptions is less than the expected number of interruptions in the expected time (1+ tolerance) or whether the measured actual number of interruptions in the TDM is greater than the expected number of interruptions in the expected time (1+ tolerance).
Normally one interruption of 5ms, 200 times in 1 second and 12000 times in 1 minute. 1 minute takes both cpu consumption and examination finding time to be within the acceptable range.
That is, in the present invention, the desired number of times of the expected time includes: interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute; the tolerance (tolerance _ value) is plus or minus 20%, and considering the timing fluctuation range of the periodic timer of the operating system, the range does not exceed 20%, and the tolerance is set to be 20%.
That is, the step determines whether the measured actual interruption times are less than the expected times of the expected time (1-tolerance _ value) or whether the measured TDM actual interruption times are greater than the expected times of the expected time (1+ tolerance _ value))
Step S4, comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, the TDM works normally, otherwise, the TDM clock is judged to be abnormal and is a TDM clock fault, and sending an alarm to perform abnormal recovery processing.
In the embodiment of the invention: and when the measured TDM actual interruption times are less than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are more than the expected times (1+ tolerance) of the expected time, determining that the TDM clock fails, sending an alarm, and performing exception recovery processing.
Specifically, the present invention can detect an incorrect TDM clock; by checking the number of interrupts, the device can detect an incorrect TDM clock. For example, if a TDM (time division multiplexing interface) bus is configured to run in 8M clocks, while the actual TDMCKIN (referring to clock input) is 4M, an alarm to notify the host may occur. The tolerance for clock default errors is 20%, which can be configured by the user. A TDM clock failure is considered if the measured actual number of TDM interrupts < expected number of expected times (1-tolerance _ value%) or the measured actual number of TDM interrupts > expected number of times of expected times (1+ tolerance _ value%).
For example, when the measured actual number of TDM interruptions is not within the expected range of times for the expected time as described above: interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute; and plus or minus 20% over the tolerance (tolerance _ value); then it is considered as a TDM clock failure; and sending an alarm to perform exception recovery processing.
And when the measured TDM actual interruption times are larger than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are smaller than the expected times (1+ tolerance) of the expected time, the TDM clock is judged to be normal, and the check is redone.
I.e. when the measured actual number of TDM interruptions is within the expected range of times for said expected time, e.g. as described above: interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute; and the tolerance (tolerance _ value) is not exceeded by plus or minus 20%; the TDM clock is determined to be normal and the redo check is continued. I.e., as a detection of an incorrect TDM clock, it may be considered to be working properly if the clock difference is less than the configured error tolerance.
Therefore, the method of the invention discovers the difference generated by the TDM clock according to the comparison between the expected interruption times and the actual interruption times of the detected time, if the difference indicates that the TDM clock works normally within the tolerance, otherwise, the difference is abnormal; the fault detection mechanism of the TDM (time division multiplexing interface) hardware provided by the invention is used for detecting the working condition of the TDM hardware, thereby facilitating the detection of the TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned; the invention can quickly solve the problem of voice service and indicate the host after the TDM bus is recovered.
As a further embodiment of the present invention, the TDM bus fault detection method further includes the steps of:
when the TDM bus recovers after detecting the failure, information will be indicated to the host that the TDM bus has recovered. I.e. information that the TDM bus has recovered when it has recovered after a failure has been detected, will indicate to the host that the TDM bus has recovered.
The invention provides a fault detection mechanism of TDM (time division multiplexing interface) hardware to detect the working condition of the TDM hardware, which is convenient for detecting the fault of a TDM bus; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned; the invention can quickly solve the problem of voice service and indicate the host after the TDM bus is recovered.
In one embodiment, the present invention provides a TDM bus fault detection apparatus, as shown in fig. 2, comprising:
a configuration module 21, configured to configure the TDM controller, and generate an interrupt to the CPU every first predetermined time;
the interrupt checking module 22 is used for controlling the CPU to detect the interrupt generation times at regular time, namely the actual interrupt times;
a comparison module 23, configured to compare the actual interruption times with expected times of the expected time;
the judgment and fault alarm module 24 is configured to judge a difference generated by the TDM clock according to a comparison between an expected number of detected expected time and an actual number of interruptions, and if the measured actual number of interruptions of the TDM is within a tolerance, it indicates that the TDM is working normally, otherwise, it is determined that the TDM is abnormal and an alarm is sent to perform an abnormal recovery process, which is specifically described above.
The judging and fault warning module comprises;
a fault processing unit, configured to determine that the TDM clock has a fault and send an alarm to perform exception recovery processing when the measured TDM actual interruption time is less than an expected time (1-tolerance) or the measured TDM actual interruption time is greater than the expected time (1+ tolerance);
a normal processing unit, configured to determine that the TDM clock is normal when the measured actual TDM interruption time is greater than an expected time (1-tolerance) or the measured actual TDM interruption time is less than the expected time (1+ tolerance), and redo the check; as described above.
In one embodiment, the present invention provides an apparatus, which may be a terminal, having an internal structure as shown in fig. 3. The apparatus includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the device is configured to provide computing and control capabilities. The memory of the device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a method of generating a natural language model. The display screen of the equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the equipment, an external keyboard, a touch pad or a mouse and the like.
Those skilled in the art will appreciate that fig. 3 is a block diagram of only a portion of the structure associated with the disclosed aspects and is not intended to limit the devices to which the disclosed aspects apply, and that a particular device may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
The embodiment of the invention provides equipment, which comprises a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to realize the following steps:
configuring a TDM controller, and generating an interrupt to a CPU every first preset time;
the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times;
comparing the actual interruption times with expected times of expected time;
and comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm to perform abnormal recovery processing.
Wherein the step of comparing the actual number of interruptions to the expected number of interruptions for the expected time comprises:
it is determined whether the measured actual number of interruptions is less than the expected number of interruptions in the expected time (1+ tolerance) or whether the measured actual number of interruptions in the TDM is greater than the expected number of interruptions in the expected time (1+ tolerance).
Wherein, the comparison of the expected times and the actual interruption times according to the detected expected time is used for judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, the TDM works normally, otherwise, the TDM clock is judged to be abnormal and is a TDM clock fault, and an alarm is sent, and the step of performing abnormal recovery processing comprises the following steps:
and when the measured TDM actual interruption times are less than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are more than the expected times (1+ tolerance) of the expected time, determining that the TDM clock fails, sending an alarm, and performing exception recovery processing.
Wherein, the step of comparing the expected times of the detected expected time with the actual interruption times to judge the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, the TDM works normally, otherwise, the TDM clock is judged to be abnormal and is a TDM clock fault, and an alarm is sent, and the step of performing abnormal recovery processing further comprises:
and when the measured TDM actual interruption times are larger than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are smaller than the expected times (1+ tolerance) of the expected time, judging that the TDM clock is normal, and redoing the check.
Wherein the expected number of times of the expected time comprises:
interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute;
the tolerance is plus or minus 20%.
The TDM bus fault detection method further comprises the following steps:
when the TDM bus is recovered after the fault is detected, the recovered information of the TDM bus is indicated to the host; as described above.
In summary, compared with the prior art, the embodiment of the invention has the following advantages:
the utility model relates to a TDM bus fault detection method, a device and a readable storage medium, wherein, the method adopts a configuration TDM controller to generate an interrupt to a CPU at intervals of a first preset time; the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times; comparing the actual interruption times with expected times of expected time; and comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured actual interruption times of the TDM clock are within the tolerance, judging that the TDM clock works normally, otherwise, judging that the TDM clock is abnormal and sending an alarm, performing abnormal recovery processing, finding the difference generated by the TDM clock according to the comparison of the expected interruption times of the detected time and the actual interruption times, and if the expected interruption times of the detected time are within the tolerance, judging that the TDM clock works normally, otherwise, judging that the TDM clock works abnormally. The fault detection mechanism of the TDM (time division multiplexing interface) hardware provided by the invention is used for detecting the working condition of the TDM hardware, thereby facilitating the detection of the TDM bus fault; the abnormity of the TDM bus can be found, and the voice service problem can be conveniently positioned.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A TDM bus fault detection method, the method comprising:
configuring a TDM controller, and generating an interrupt to a CPU every first preset time;
the CPU detects the interruption generation times at regular time, and the interruption generation times are actual interruption times;
comparing the actual interruption times with expected times of expected time;
comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock has a fault, sending an alarm, and performing abnormal recovery processing;
the step of comparing the expected times of the detected expected time with the actual interruption times to judge the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, the TDM clock works normally, otherwise, the TDM clock is judged to be in fault, and an alarm is sent, and the step of performing abnormal recovery processing comprises the following steps:
and when the measured TDM actual interruption times are less than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are more than the expected times (1+ tolerance) of the expected time, determining that the TDM clock fails, sending an alarm, and performing exception recovery processing.
2. The TDM bus fault detection method of claim 1, wherein the step of comparing the actual number of interrupts with the expected number of interrupts for the expected time comprises:
it is determined whether the measured actual number of interruptions is less than the expected number of interruptions in the expected time (1+ tolerance) or whether the measured actual number of interruptions in the TDM is greater than the expected number of interruptions in the expected time (1+ tolerance).
3. The TDM bus fault detection method according to claim 1, wherein the step of comparing the expected number of times of the detected expected time with the actual number of times of interruption to determine a difference generated by the TDM clock, and if the measured actual number of times of interruption of the TDM is within the tolerance, it is determined that the TDM is working normally, and if not, it is determined that the TDM is faulty, and an alarm is sent, and the step of performing the abnormal recovery processing further includes:
and when the measured TDM actual interruption times are larger than the expected times (1-tolerance) of the expected time and the measured TDM actual interruption times are smaller than the expected times (1+ tolerance) of the expected time, judging that the TDM clock is normal, and redoing the check.
4. The TDM bus fault detection method of claim 1, wherein the expected number of times of the expected time comprises:
interruption is carried out once in 5ms, 200 times in 1 second and 12000 times in 1 minute;
the tolerance is plus 20%.
5. The TDM bus fault detection method of claim 1, further comprising the steps of:
when the TDM bus recovers after detecting the failure, information will be indicated to the host that the TDM bus has recovered.
6. A TDM bus fault detection apparatus, the apparatus comprising:
the configuration module is used for configuring the TDM controller and generating an interrupt to the CPU every first preset time;
the interrupt checking module is used for controlling the CPU to detect the interrupt generation times at regular time, and the interrupt generation times are actual interrupt times;
the comparison module is used for comparing the actual interruption times with the expected times of the expected time;
the judgment and fault alarm module is used for comparing the expected times of the detected expected time with the actual interruption times, judging the difference generated by the TDM clock, if the measured TDM actual interruption times are within the tolerance, indicating that the TDM works normally, otherwise, judging that the TDM clock has a fault, sending an alarm and performing abnormal recovery processing;
the judging and fault warning module comprises;
and the fault processing unit is used for judging that the TDM clock has a fault when the measured TDM actual interruption times are less than the expected times (1-tolerance) of the expected time or the measured TDM actual interruption times are more than the expected times (1+ tolerance) of the expected time, and sending an alarm to perform exception recovery processing.
7. The TDM bus fault detection apparatus according to claim 6, wherein the determining and fault warning module further comprises:
and the normal processing unit is used for judging that the TDM clock is normal when the measured TDM actual interruption times are greater than the expected times (1-tolerance) of the expected time and the measured TDM actual interruption times are less than the expected times (1+ tolerance) of the expected time, and redoing the check.
8. A terminal comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method according to any of claims 1 to 5.
9. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
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