CN109827288A - A kind of automatic error-correcting control method, device and electrical equipment - Google Patents

A kind of automatic error-correcting control method, device and electrical equipment Download PDF

Info

Publication number
CN109827288A
CN109827288A CN201811638376.XA CN201811638376A CN109827288A CN 109827288 A CN109827288 A CN 109827288A CN 201811638376 A CN201811638376 A CN 201811638376A CN 109827288 A CN109827288 A CN 109827288A
Authority
CN
China
Prior art keywords
clock
default
chip
control chip
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811638376.XA
Other languages
Chinese (zh)
Inventor
庞伟
华洪香
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gree Electric Appliances Inc of Zhuhai
Original Assignee
Gree Electric Appliances Inc of Zhuhai
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gree Electric Appliances Inc of Zhuhai filed Critical Gree Electric Appliances Inc of Zhuhai
Priority to CN201811638376.XA priority Critical patent/CN109827288A/en
Publication of CN109827288A publication Critical patent/CN109827288A/en
Pending legal-status Critical Current

Links

Abstract

The present invention discloses a kind of automatic error-correcting control method, device and electrical equipment.Wherein, this method comprises: the first default clock of setting controls the operation of load as work clock;Interrupt operation is triggered after every default interruption duration of operation, and opens Clocked operation according to the second default clock, and control load later continues to run;When triggering interrupt operation next time, the timing time that the Clocked operation monitors is obtained;Determine whether the system clock of control chip is abnormal according to the timing time and the default duration of interrupting.Through the invention; whether the system clock that chip can be controlled with effective monitoring is normal; running electrical equipment is applied to for abnormal strong jamming; lead to the clock entanglement of the control chip of equipment and the case where operation out of control; safe shutdown controllable in time may be implemented to restart; it eliminates safe hidden trouble, improves the anti-interference ability of product, improve Product Safety.

Description

A kind of automatic error-correcting control method, device and electrical equipment
Technical field
The present invention relates to machine set technology fields, set in particular to a kind of automatic error-correcting control method, device and electric appliance It is standby.
Background technique
Existing air conditioner controlling technology is well positioned to meet lightning surge vulnerability to jamming standard (international highest standard is 4kV) It is required that passing through certification.Once but product then may be used by the surge voltage of the interference far beyond standard class, such as 10kV Air-conditioning can be caused to be in runaway condition operation, there are certain security risks.
Aiming at the problem that lightning surge in the prior art leads to equipment operation out of control, effective solution side is not yet proposed at present Case.
Summary of the invention
A kind of automatic error-correcting control method, device and electrical equipment are provided in the embodiment of the present invention, to solve the prior art Middle lightning surge leads to the problem of equipment operation out of control.
In order to solve the above technical problems, the present invention provides a kind of automatic error-correcting control methods, wherein this method comprises: First default clock is set as work clock, controls the operation of load;Interrupt operation is triggered after every default interruption duration of operation, And Clocked operation is opened according to the second default clock, control load later continues to run;When triggering interrupt operation next time, obtain The timing time for taking the Clocked operation to monitor;Control chip is determined according to the timing time and the default interruption duration System clock it is whether abnormal.
Further, the described first default clock is the work clock by original clock after frequency multiplication and scaling down processing; The second default clock is original clock or backup clock.
Further, according to the timing time and it is described it is default interrupt duration determine control chip system clock whether It is abnormal, comprising: whether the timing time and the default interruption duration are equal;If equal, it is determined that control chip System clock it is normal;If unequal, it is determined that the system clock for controlling chip is abnormal.
Further, according to the timing time and it is described it is default interrupt duration determine control chip system clock whether After exception, further includes: if it is determined that the system clock of control chip is abnormal, then the control chip reset is restarted.
The present invention also provides a kind of automatic error-correcting control systems, wherein the system includes: control chip, for being arranged First default clock controls the operation of load as work clock;It is also used to the default triggering interruption behaviour after interrupting duration of every operation Make;Clock supervision timer, for opening timing behaviour according to the second default clock when the control chip triggers interrupt operation Make;Processor, the timing time monitored between interrupt operation twice for obtaining the clock supervision timer, and according to The timing time and the default duration of interrupting determine whether the system clock of the control chip is abnormal.
Further, the described first default clock is the work clock by original clock after frequency multiplication and scaling down processing; The second default clock is original clock or backup clock.
Further, the processor, be specifically used for the timing time and the default interruption duration whether phase Deng;If equal, it is determined that the system clock of the control chip is normal;If unequal, it is determined that the control chip System clock is abnormal.
Further, the control chip, for determining that the system clock of the control chip is abnormal in the processor Afterwards, reset is restarted.
The present invention also provides a kind of electrical equipments, wherein including above-mentioned automatic error-correcting control system.
The present invention also provides a kind of computer readable storage mediums, are stored thereon with computer program, wherein the journey Such as above-mentioned method is realized when sequence is executed by processor.
The present invention provides a kind of safely controllable automatic error-correcting control program, the system that chip can be controlled with effective monitoring Whether clock is normal, once because superpower lightning surge (such as the 10kV surge required much higher than international standard 4kV) etc. is different Normal strong jamming is applied to running electrical equipment, leads to the clock entanglement of the control chip of equipment and operation out of control, can be with It realizes that safe shutdown controllable in time is restarted, eliminates safe hidden trouble, improve the anti-interference ability of product, improve Product Safety.
Detailed description of the invention
Fig. 1 is the flow chart of automatic error-correcting control method according to an embodiment of the present invention;
Fig. 2 is the automatic error-correcting control flow chart of air-conditioning according to an embodiment of the present invention;
Fig. 3 is the structural block diagram of automatic error-correcting control device according to an embodiment of the present invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into It is described in detail to one step, it is clear that described embodiments are only a part of the embodiments of the present invention, rather than whole implementation Example.Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts All other embodiment, shall fall within the protection scope of the present invention.
The term used in embodiments of the present invention is only to be not intended to be limiting merely for for the purpose of describing particular embodiments The present invention.In the embodiment of the present invention and the "an" of singular used in the attached claims, " described " and "the" It is also intended to including most forms, unless the context clearly indicates other meaning, " a variety of " generally comprise at least two.
It should be appreciated that term "and/or" used herein is only a kind of incidence relation for describing affiliated partner, indicate There may be three kinds of relationships, for example, A and/or B, can indicate: individualism A, exist simultaneously A and B, individualism B these three Situation.In addition, character "/" herein, typicallys represent the relationship that forward-backward correlation object is a kind of "or".
Depending on context, word as used in this " if ", " if " can be construed to " ... when " or " when ... " or " in response to determination " or " in response to detection ".Similarly, context is depended on, phrase " if it is determined that " or " such as Fruit detection (condition or event of statement) " can be construed to " when determining " or " in response to determination " or " when detection (statement Condition or event) when " or " in response to detection (condition or event of statement) ".
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability Include, so that commodity or device including a series of elements not only include those elements, but also including not clear The other element listed, or further include for this commodity or the intrinsic element of device.In the feelings not limited more Under condition, the element that is limited by sentence "including a ...", it is not excluded that in the commodity or device for including the element also There are other identical elements.
The alternative embodiment that the invention will now be described in detail with reference to the accompanying drawings.
Embodiment 1
Fig. 1 is the flow chart of automatic error-correcting control method according to an embodiment of the present invention, as shown in Figure 1, this method includes Following steps:
Step S101 is arranged the first default clock as work clock, controls the operation of load;
Step S102, every operation triggers interrupt operation after presetting interruption duration, and opens timing according to the second default clock Operation, later control load continue to run;
Step S103 obtains the timing time that Clocked operation monitors when triggering interrupt operation next time;
Step S104 determines whether the system clock of control chip is abnormal according to timing time and default duration of interrupting.
A kind of safely controllable automatic error-correcting control program is present embodiments provided, can be with what effective monitoring controlled chip Whether clock of uniting normal, is applied to running electrical equipment for abnormal strong jamming, cause the control chip of equipment when Clock entanglement and the case where operation out of control, safe shutdown controllable in time, which may be implemented, restarts, and eliminates safe hidden trouble, improves product Anti-interference ability improves Product Safety.
When the first default clock that the present embodiment is related to is the work by original clock after frequency multiplication and scaling down processing Clock;Second default clock is original clock or backup clock, without frequency multiplication and scaling down processing.
In the present embodiment, whether equal with default interruption duration by comparing timing time to be determine control chip Whether clock of uniting is normal;If the two is equal, it is determined that the system clock for controlling chip is normal;If the two is unequal, really Surely the system clock for controlling chip is abnormal.To accurately and timely judge whether system clock abnormal, can when occurring abnormal Alignment processing is made in time.
If it is determined that the system clock of control chip is abnormal, then controlling chip reset and restart, control equipment downtime is restarted, from And it eliminates safe hidden trouble.
Embodiment 2
It describes in detail with reference to the accompanying drawing with preferred embodiment to technical solution of the present invention.Fig. 2 is according to this hair The automatic error-correcting control flow chart of the air-conditioning of bright embodiment, as shown in Fig. 2, the process includes:
Step 1: airconditioning control chip starts work.
Step 2: airconditioning control chip executes initialization program, and original clock source is supplied to after frequency multiplication and frequency dividing Each functional module of chip interior is controlled as work clock.It is arranged timing T (i.e. above-mentioned default interruption duration), i.e., at interval of T, holds Interruption subroutine of row.
Step 3: the work clock operating system program set by step 2, control air conditioner load operation.
Step 4: judge whether that triggering timing T interrupts? if it is not, then step 3 is executed, if it is, executing step Rapid five.
Step 5: being arranged clock supervision timer timer in timing T interruption subroutine, and clock source is control chip Original clock or backup clock, without any frequency multiplication and frequency dividing.
Step 6: the timer timework of clock supervision timer is enabled in timing T interruption subroutine.
Step 7: timing T interruption subroutine, operating system program, control air conditioner load operation are exited.
Step 8: judge whether that triggering timing interrupts? if it is not, then step 7 is executed, if so, thening follow the steps Nine.
Step 9: the timing time T1 of clock supervision timer timer is read in timing T interruption subroutine.
Step 10: judging whether T1 is equal to T in timing T interruption subroutine, equal, illustrates that system clock is normal, executes Step 3;It is unequal, illustrate that system clock is abnormal, air-conditioning is in operating status out of control at this time, executes step 11.
Step 11: control chip reset is restarted, and air-conditioning shutdown is restarted.
This embodiment describes a kind of safely controllable automatic error-correcting control methods.When air-conditioning because lightning surge etc. is abnormal Strong jamming when leading to operation out of control, automatic error-correcting may be implemented, guarantee safe and reliable shut down, it is ensured that product is in safely controllable State, improve Product Safety.The anti-interference ability of product is improved, effectively solving lightning surge leads to product operation out of control Problem eliminates safe hidden trouble.
Embodiment 3
Corresponding to the automatic error-correcting control method of Fig. 1 introduction, a kind of automatic error-correcting control device is present embodiments provided, such as The structural block diagram of automatic error-correcting control device shown in Fig. 3, the device include:
Chip is controlled, for the first default clock to be arranged as work clock, controls the operation of load;It is also used to every operation Interrupt operation is triggered after default interruption duration;
Clock supervision timer, for opening timing according to the second default clock when controlling chip triggering interrupt operation Operation;
Processor, the timing time monitored between interrupt operation twice for obtaining clock supervision timer, and root Determine whether the system clock of control chip is abnormal according to timing time and default duration of interrupting.
A kind of safely controllable automatic error-correcting control program is present embodiments provided, can be with what effective monitoring controlled chip Whether clock of uniting normal, is applied to running electrical equipment for abnormal strong jamming, cause the control chip of equipment when Clock entanglement and the case where operation out of control, safe shutdown controllable in time, which may be implemented, restarts, and eliminates safe hidden trouble, improves product Anti-interference ability improves Product Safety.
When the first default clock that the present embodiment is related to is the work by original clock after frequency multiplication and scaling down processing Clock;Second default clock is original clock or backup clock, without frequency multiplication and scaling down processing.
Whether above-mentioned processor is equal specifically for comparing timing time and default interruption duration;If equal, it is determined that The system clock for controlling chip is normal;If unequal, it is determined that the system clock for controlling chip is abnormal.Thus accurately and timely Judge whether system clock is abnormal, can make alignment processing in time when occurring abnormal.
Above-mentioned control chip, for after the system clock exception that processor determines control chip, reset to be restarted.To disappear Except security risk.
The present embodiment additionally provides a kind of electrical equipment, the automatic error-correcting control system including above-mentioned introduction.Above-mentioned electric appliance Method provided by the embodiment of the present invention can be performed in equipment, has the corresponding functional module of execution method and beneficial effect.Do not exist The technical detail of detailed description in the present embodiment, reference can be made to method provided by the embodiment of the present invention.
The apparatus embodiments described above are merely exemplary, wherein described, unit can as illustrated by the separation member It is physically separated with being or may not be, component shown as a unit may or may not be physics list Member, it can it is in one place, or may be distributed over multiple network units.It can be selected according to the actual needs In some or all of the modules achieve the purpose of the solution of this embodiment.
Embodiment 4
The embodiment of the invention provides a kind of nonvolatile computer storage media, the computer storage medium is stored with The automatic error-correcting controlling party in above-mentioned any means embodiment can be performed in computer executable instructions, the computer executable instructions Method.
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can It realizes by means of software and necessary general hardware platform, naturally it is also possible to pass through hardware.Based on this understanding, on Stating technical solution, substantially the part that contributes to existing technology can be embodied in the form of software products in other words, should Computer software product may be stored in a computer readable storage medium, such as ROM/RAM, magnetic disk, CD, including several fingers It enables and using so that a computer equipment (can be personal computer, server or the network equipment etc.) executes each implementation Method described in certain parts of example or embodiment.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;Although Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features; And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and Range.

Claims (10)

1. a kind of automatic error-correcting control method, which is characterized in that the described method includes:
First default clock is set as work clock, controls the operation of load;
Interrupt operation is triggered after every default interruption duration of operation, and opens Clocked operation according to the second default clock, is controlled later Load continues to run;
When triggering interrupt operation next time, the timing time that the Clocked operation monitors is obtained;
Determine whether the system clock of control chip is abnormal according to the timing time and the default duration of interrupting.
2. the method according to claim 1, wherein
The first default clock is the work clock by original clock after frequency multiplication and scaling down processing;
The second default clock is original clock or backup clock.
3. the method according to claim 1, wherein true according to the timing time and the default interruption duration Whether the system clock for controlling chip surely is abnormal, comprising:
Compare the timing time and whether the default interruption duration is equal;
If equal, it is determined that the system clock for controlling chip is normal;If unequal, it is determined that control the system clock of chip It is abnormal.
4. the method according to claim 1, wherein true according to the timing time and the default interruption duration Surely the system clock of chip is controlled whether after exception, further includes:
If it is determined that the system clock of control chip is abnormal, then the control chip reset is restarted.
5. a kind of automatic error-correcting control system, which is characterized in that the system comprises:
Chip is controlled, for the first default clock to be arranged as work clock, controls the operation of load;It is default to be also used to every operation Interrupt operation is triggered after interrupting duration;
Clock supervision timer, for opening timing according to the second default clock when the control chip triggers interrupt operation Operation;
Processor, the timing time monitored between interrupt operation twice for obtaining the clock supervision timer, and root Determine whether the system clock of the control chip is abnormal according to the timing time and the default duration of interrupting.
6. system according to claim 5, which is characterized in that
The first default clock is the work clock by original clock after frequency multiplication and scaling down processing;
The second default clock is original clock or backup clock.
7. system according to claim 5, which is characterized in that
The processor, is specifically used for the timing time and whether the default interruption duration is equal;If equal, Determine that the system clock of the control chip is normal;If unequal, it is determined that the system clock of the control chip is abnormal.
8. system according to claim 5, which is characterized in that
The control chip, for after the system clock exception that the processor determines the control chip, reset to be restarted.
9. a kind of electrical equipment, which is characterized in that including automatic error-correcting control system described in any one of claim 5 to 8.
10. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that described program is processed Device realizes method according to any one of claims 1 to 4 when executing.
CN201811638376.XA 2018-12-29 2018-12-29 A kind of automatic error-correcting control method, device and electrical equipment Pending CN109827288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811638376.XA CN109827288A (en) 2018-12-29 2018-12-29 A kind of automatic error-correcting control method, device and electrical equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811638376.XA CN109827288A (en) 2018-12-29 2018-12-29 A kind of automatic error-correcting control method, device and electrical equipment

Publications (1)

Publication Number Publication Date
CN109827288A true CN109827288A (en) 2019-05-31

Family

ID=66860740

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811638376.XA Pending CN109827288A (en) 2018-12-29 2018-12-29 A kind of automatic error-correcting control method, device and electrical equipment

Country Status (1)

Country Link
CN (1) CN109827288A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110529975A (en) * 2019-08-16 2019-12-03 特灵空调系统(中国)有限公司 Method for diagnosing faults, device, machine readable storage medium

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2107494A (en) * 1981-09-01 1983-04-27 Sanyo Electric Co Electronic timepiece with microprocessor
US5708817A (en) * 1995-05-31 1998-01-13 Apple Computer, Inc. Programmable delay of an interrupt
CN1673926A (en) * 2004-03-26 2005-09-28 联发科技股份有限公司 Timer system and related method capable of dynamically compensating a difference of a timer
CN101290649A (en) * 2008-05-19 2008-10-22 北京深思洛克数据保护中心 Software protector with time valve protection and its realization method
CN102929735A (en) * 2012-10-19 2013-02-13 北京星网锐捷网络技术有限公司 Clock-correcting method and equipment
CN103746625A (en) * 2013-11-19 2014-04-23 广东威灵电机制造有限公司 System clock fault detection method of microprocessor in motor control system
CN105302640A (en) * 2015-11-18 2016-02-03 中工科安科技有限公司 Time slice and management and control method applied to multiple time slices
CN109004932A (en) * 2018-06-29 2018-12-14 合肥微商圈信息科技有限公司 A kind of method of real-time detection differential clocks frequency correctness

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2107494A (en) * 1981-09-01 1983-04-27 Sanyo Electric Co Electronic timepiece with microprocessor
US5708817A (en) * 1995-05-31 1998-01-13 Apple Computer, Inc. Programmable delay of an interrupt
CN1673926A (en) * 2004-03-26 2005-09-28 联发科技股份有限公司 Timer system and related method capable of dynamically compensating a difference of a timer
CN101290649A (en) * 2008-05-19 2008-10-22 北京深思洛克数据保护中心 Software protector with time valve protection and its realization method
CN102929735A (en) * 2012-10-19 2013-02-13 北京星网锐捷网络技术有限公司 Clock-correcting method and equipment
CN103746625A (en) * 2013-11-19 2014-04-23 广东威灵电机制造有限公司 System clock fault detection method of microprocessor in motor control system
CN105302640A (en) * 2015-11-18 2016-02-03 中工科安科技有限公司 Time slice and management and control method applied to multiple time slices
CN109004932A (en) * 2018-06-29 2018-12-14 合肥微商圈信息科技有限公司 A kind of method of real-time detection differential clocks frequency correctness

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
许立群 等: "《DSP技术与应用》", 31 March 2015, 北京航空航天大学出版社 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110529975A (en) * 2019-08-16 2019-12-03 特灵空调系统(中国)有限公司 Method for diagnosing faults, device, machine readable storage medium

Similar Documents

Publication Publication Date Title
US20190173899A1 (en) Network security assessment using a network traffic parameter
EP2988389B1 (en) Redundant high reliability power supply configuration and testing
US10250325B2 (en) Network switching system
CN110058972A (en) For realizing the electronic computer and related electronic device of at least one key function
CN105389525B (en) The management method and system of blade server
CN104636221A (en) Method and device for processing computer system fault
US11539203B2 (en) Systems and methods for input overcurrent protection
CN104156297A (en) Warning method and device
US20020194531A1 (en) System and method for the use of reset logic in high availability systems
JP6060264B2 (en) Safety control method, system and system for system having precharge circuit
CN109827288A (en) A kind of automatic error-correcting control method, device and electrical equipment
US10387234B2 (en) Apparatus and method for controlling a power supply to processing circuitry to avoid a potential temporary insufficiency in supply of power
EP2791925B1 (en) Line isolators for isolating multiple faults in emergency systems
US9722414B2 (en) Power distribution and information handling
CN107528705B (en) Fault processing method and device
CN113407391A (en) Fault processing method, computer system, substrate management controller and system
CN109033819A (en) Protect method, the computer readable storage medium of application process continuous service
US20030023887A1 (en) Computer system with backup management for handling embedded processor failure
CN115480884A (en) Chip, test monitoring method of chip and computer readable storage medium
CN104763576A (en) Distinguishing and correcting method for auxiliary signal anomaly for pumped storage group protection
CN108563530A (en) House dog and its implementation
CN113868001B (en) Method, system and computer storage medium for checking memory repair result
US10838794B2 (en) Rate based fault restart scheme
US11686757B2 (en) Systems and methods for circuit failure protection
CN112581715B (en) Battery high-temperature alarm method, device and system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20190531

RJ01 Rejection of invention patent application after publication