CN102856353B - Micro-punch IGBT device and preparation method thereof - Google Patents
Micro-punch IGBT device and preparation method thereof Download PDFInfo
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- CN102856353B CN102856353B CN201110175567.9A CN201110175567A CN102856353B CN 102856353 B CN102856353 B CN 102856353B CN 201110175567 A CN201110175567 A CN 201110175567A CN 102856353 B CN102856353 B CN 102856353B
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Abstract
The invention discloses a kind of micro-punch IGBT device, comprising: substrate, described substrate has the source region of the collector region of the first conduction type, the drift region of the second conduction type, the well region of the first conduction type and the second conduction type; Grid; Micro-reach through region of the second conduction type between collector region and drift region, the doping content of described micro-reach through region is higher than the doping content of drift region.By defining the doping content micro-reach through region higher than the concentration of drift region between drift region and collector region, make at blocking interval, the electric field strength of substrate substantially drops to zero in micro-reach through region, therefore substrate thickness can be obviously thinning, makes IGBT have lower conducting resistance, saturation voltage drop and lower on-state loss.
Description
Technical field
The present invention relates to semiconductor fabrication, more particularly, relate to a kind of igbt and manufacture method thereof.
Background technology
Igbt (IGBT, Insulated Gate Bipolar Transistor) be novel high power device, it integrates MOSFET grid voltage control characteristic and bipolar transistor low on-resistance characteristic, improve the situation that device withstand voltage and conducting resistance pin down mutually, the advantage such as there is high voltage, big current, high-frequency, power integration density is high, input impedance is large, conducting resistance is little, switching loss is low.Space is obtained a wide range of applications at frequency-conversion domestic electric appliances, Industry Control, the electronic and numerous areas such as hybrid vehicle, new forms of energy, intelligent grid.
For igbt, mainly comprise plane IGBT structure and groove-shaped IGBT structure.As shown in Figure 1, be the schematic diagram of plane IGBT in Fig. 1, for N-type raceway groove, mainly comprise: the P+ collector region 108 at substrate 100 back side; The gate dielectric layer 102 of substrate face and grid 101; The N+ source region 104 on the N-drift region 106 on collector region 108, the P well region 103 on drift region 106, P well region is positioned in substrate; Cover the emitter 109 in source region, normally, also in P trap 103 superficial layer contacted with emitter 109, be formed with P+ district 105, to form good ohmic contact with emitter.
For groove-shaped IGBT, as shown in Figure 2, for N-type raceway groove, mainly comprise: the P+ collector region 208 at substrate 200 back side; The drift region 206 on collector region 208 is positioned in substrate; Gate dielectric layer 202 and the grid 201 of the groove on drift region 206 is arranged in substrate face; P well region 203 on drift region, the N+ source region 204 on P well region; Cover the emitter 209 in source region, normally, in P trap 203 superficial layer contacted with emitter 209, be formed with P+ district 205, to form good ohmic contact with emitter.
But, the problem of above-mentioned IGBT device is, above-mentioned IGBT device is all formed based on thicker silicon chip,, at blocking interval, electric field strength declines at whole substrate neutral line, finally to zero, conducting resistance is quite large in the on-state to this means device, and the saturation voltage drop VCE of device is higher, and on-state loss is large.
Summary of the invention
The embodiment of the present invention provides a kind of micro-break-through (MPT, Micro Punch Through) type IGBT device, has lower conducting resistance.
For achieving the above object, following technical scheme is embodiments provided:
A kind of micro-punch IGBT device, comprising: substrate, and described substrate has the source region of the collector region of the first conduction type, the drift region of the second conduction type, the well region of the first conduction type and the second conduction type; Grid; Micro-reach through region of the second conduction type between collector region and drift region, the doping content of described micro-reach through region is higher than the doping content of drift region.
Alternatively, described grid is positioned at substrate.
Alternatively, described grid is the groove being arranged in substrate.
In addition, present invention also offers the manufacture method of above-mentioned micro-punch IGBT device, comprising:
There is provided substrate, described substrate has the source region of the drift region of the second conduction type, the well region of the first conduction type and the second conduction type, and grid;
From substrate back, drift region is thinning, and carry out ion implantation and annealing process, form micro-reach through region of the second conduction type, the doping content of described micro-reach through region is higher than the doping content of described drift region;
Carry out ion implantation from substrate back, form the collector region of the first conduction type.
Alternatively, described grid is positioned at substrate.
Alternatively, described grid is the groove being arranged in substrate.
Compared with prior art, technique scheme has the following advantages:
Micro-punch IGBT device of the embodiment of the present invention, between drift region and collector region, define micro-reach through region, its doping content is higher than the concentration of drift region, makes electric field distribution wherein be oblique angle trapezoidal profile, at blocking interval, the electric field strength of substrate substantially drops to zero in micro-reach through region.Therefore substrate thickness can obviously thinning (can thinning about 1/3), and this just makes IGBT have lower conducting resistance, saturation voltage drop and lower on-state loss.
Accompanying drawing explanation
Shown in accompanying drawing, above-mentioned and other object of the present invention, Characteristics and advantages will be more clear.Reference numeral identical in whole accompanying drawing indicates identical part.Deliberately do not draw accompanying drawing by actual size equal proportion convergent-divergent, focus on purport of the present invention is shown.
Fig. 1 is the structural representation of traditional plane IGBT;
Fig. 2 is traditional groove-shaped IGBT manufacture process schematic diagram;
Fig. 3 is the structural representation of the micro-punch IGBT according to the embodiment of the present invention one;
Fig. 4 is the structural representation of micro-punch IGBT of the embodiment of the present invention two.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
Set forth a lot of detail in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here to implement, those skilled in the art can when without prejudice to doing similar popularization when intension of the present invention, therefore the present invention is by the restriction of following public specific embodiment.
Secondly, the present invention is described in detail in conjunction with schematic diagram, when describing the embodiment of the present invention in detail; for ease of explanation; represent that the profile of device architecture can be disobeyed general ratio and be made partial enlargement, and described schematic diagram is example, it should not limit the scope of protection of the invention at this.In addition, the three-dimensional space of length, width and the degree of depth should be comprised in actual fabrication.
Just as described in the background section, for traditional IGBT device, all formed based on thicker silicon chip,, at blocking interval, electric field strength declines at whole substrate neutral line, finally to zero, conducting resistance is quite large in the on-state to this means device, and the saturation voltage drop VCE of device is higher, and on-state loss is large.
For this reason, the present invention proposes a kind of micro-punch IGBT device, by forming the micro-reach through region of doping content higher than drift region between collector region and drift region, at blocking interval, electric field strength declines in the substrate, substantially drops to zero to during micro-reach through region, and electric field is oblique angle trapezoidal profile, therefore substrate thickness can be obviously thinning, and this just makes IGBT have lower conducting resistance, saturation voltage drop and lower on-state loss.
Based on above-mentioned thought, the present invention proposes a kind of micro-punch IGBT device, comprising:
Substrate, described substrate has the source region of the collector region of the first conduction type, the drift region of the second conduction type, the well region of the first conduction type and the second conduction type; Grid; Micro-reach through region of the second conduction type between collector region and drift region, the doping content of described micro-reach through region is higher than the doping content of drift region.
Wherein, different I GBT device drift region thickness is different.
Above the technical scheme of the micro-punch IGBT device of the present invention is described, in order to understand the present invention better, below the different embodiment of invention is described in detail, in the examples below, be described for the IGBT device of N-type raceway groove, namely the first conduction type is p-type, and the second conduction type is N-shaped, be only example herein, be equally applicable to the embodiment of P type raceway groove.
Embodiment one
In the present embodiment, will describe in detail according to plane MPT type IGBT device of the present invention and manufacture method thereof.
Shown in figure 3, be the plane MPT type IGBT device in the embodiment of the present invention one, comprise:
Substrate 300;
The P+ collector region 308 of 300 substrate backs;
The gate dielectric layer 302 of substrate face and grid 301;
Be positioned at the N+ source region 304 on the N-drift region 106 on the micro-reach through region of N+ 307 on collector region 308, micro-reach through region, the P type trap zone 303 on drift region 306 and P well region in substrate, the doping content of micro-reach through region is higher than the doping content of drift region;
Cover the emitter 309 in source region.
Preferably, also in P trap 303 superficial layer contacted with emitter 309, be formed with P+ district 305, to form good ohmic contact with emitter.
Preferably, in the below in source region 304, be also formed with P+ district (scheming not shown), to suppress door bolt institute effect.
It is more than plane MPT IGBT device structure of the present invention, by forming the micro-reach through region of doping content higher than drift region between collector region and drift region, at blocking interval, electric field strength declines in the substrate, substantially zero is dropped to during micro-reach through region, electric field is oblique angle trapezoidal profile, and therefore substrate thickness can be obviously thinning, and this just makes IGBT have lower conducting resistance, saturation voltage drop and lower on-state loss.
In addition, the injection ratio of this emitter junction can also be reduced, to suppress " thyristor effect ", simultaneously, when hard switching is applied, the device with micro-reach through region can turn off faster than conventional I GBT, substantially do not have current tail, and the power consumption that current tail causes occupies many ratios in master switch loss, this reduces power loss.
It should be noted that, in the application, substrate face refers to the substrate surface being formed with grid, and substrate back refers to the face relative with the surface forming grid.
In order to understand the present invention better, below with reference to Fig. 3, the manufacture method of the present embodiment is described in detail.
In step S01, provide substrate, described substrate has the source region of the drift region of the second conduction type, the well region of the first conduction type and the second conduction type, and grid.
In one embodiment, particularly, first, provide substrate 300, substrate is for having the lightly doped N-silicon substrate of N, and in other embodiments, described substrate can also be the single or multiple lift substrate comprising other semiconductor element or semiconducting compound.
Then, on substrate 300 front, the gate dielectric layer 302 of silicon dioxide is formed by the method for thermal oxidation.In other embodiments, the gate dielectric layer of high K medium material or other materials can also be formed by other suitable methods.
Then, the grid 301 of depositing polysilicon on 302 on described gate dielectric layer, in other embodiments, described grid can also be one or more layers structure of the combination comprising metal material or metal material and polysilicon.
Then, by impurity and the processing step such as thermal diffusion, deposit of repeatedly type needed for mask, etching, doping, P well region 303, N+ source region 304 is formed in the substrate of grid 301 side, prevent the passivation layer on the P+ district of latch-up (scheming not shown) and grid 301 and emitter 309, wherein, the N-silicon substrate not carrying out other doping is drift region 306.
In step S02, from substrate back, drift region is thinning, and carry out ion implantation and corresponding annealing process, form micro-reach through region of the second conduction type, the doping content of described micro-reach through region is higher than the doping content of described drift region.
In one embodiment, particularly, first, can carry out thinning to substrate from the N-silicon substrate back side (drift region), make the thickness of substrate be reduced to required thickness, required thickness can be determined according to different voltage.
Then, the substrate back after thinning carries out N-type ion implantation, and by forming the micro-reach through region 307 of doping content higher than drift region 306 doping content after thermal diffusion.
In step S03, carry out ion implantation from substrate back, form the collector region of the first conduction type.
In one embodiment, by carrying out P type ion implantation from substrate back, form P+ collector region 308 by thermal diffusion.
So far, define the plane MPT type IGBT device of the embodiment of the present invention, the material in above each step and formation method are only example, and the present invention is not limited to this.
Embodiment two
In the present embodiment, will describe in detail according to groove-shaped MPT type IGBT device of the present invention and manufacture method thereof.
Shown in figure 4, be the groove-shaped MPT type IGBT device in the embodiment of the present invention two, comprise:
Substrate 400;
The P+ collector region 408 at substrate 400 back side;
Be positioned at the micro-reach through region of N+ 407 on collector region 408, the drift region 406 on micro-reach through region 407 in substrate 400, the doping content of micro-reach through region is higher than the doping content of drift region;
Gate dielectric layer 402 and the grid 401 of the groove on drift region 406 is arranged in substrate 400 front;
Be positioned at the P well region 403 on drift region, the N+ source region 404 on P well region; Cover the emitter 409 in source region.
Preferably, also in P trap 403 superficial layer contacted with emitter 409, be formed with P+ district 405, to form good ohmic contact with emitter.
Preferably, in the below in source region 404, be also formed with P+ district (scheming not shown), to suppress door bolt institute effect.
It is more than groove-shaped MPT IGBT device structure of the present invention, by forming the micro-reach through region of doping content higher than drift region between collector region and drift region, at blocking interval, electric field strength declines in the substrate, substantially zero is dropped to during micro-reach through region, electric field is oblique angle trapezoidal profile, and therefore substrate thickness can be obviously thinning, and this just makes IGBT have lower conducting resistance, saturation voltage drop and lower on-state loss.
In addition, the injection ratio of this emitter junction can also be reduced, to suppress " thyristor effect ", simultaneously, when hard switching is applied, the device with micro-reach through region can turn off faster than conventional I GBT, substantially do not have current tail, and the power consumption that current tail causes occupies many ratios in master switch loss, this reduces power loss.
In order to understand the present invention better, below with reference to Fig. 4, the manufacture method of the present embodiment is described in detail.
In step S01, provide substrate, described substrate has the source region of the drift region of the second conduction type, the well region of the first conduction type and the second conduction type, and grid.
In one embodiment, particularly, first, provide substrate 400, substrate is for having the lightly doped N-silicon substrate of N, and in other embodiments, described substrate can also be the single or multiple lift substrate comprising other semiconductor element or semiconducting compound.
Then, form groove in the substrate, and in the groove of substrate, form the gate dielectric layer 402 of silicon dioxide by the method for thermal oxidation, in other embodiments, the gate dielectric layer of high K medium material or other materials can also be formed by other suitable methods.
Then, depositing polysilicon is to fill up the grid 401 that groove forms polysilicon, and in other embodiments, described grid can also be one or more layers structure of the combination comprising metal material or metal material and polysilicon.
Then, by impurity, the processing step such as thermal diffusion and deposit of repeatedly type needed for mask, etching, doping, P well region 403, N+ source region 404 is formed in the substrate of grid 401 side, and prevent the P+ district of latch-up (scheming not shown), and passivation layer on grid 401 and emitter 409, wherein, the N-silicon substrate not carrying out other doping is drift region 406.
In step S02, from substrate back, drift region is thinning, and carry out ion implantation and corresponding annealing process, form micro-reach through region of the second conduction type, the doping content of described micro-reach through region is higher than the doping content of described drift region.
In one embodiment, particularly, first, can carry out thinning to substrate from the N-silicon substrate back side (drift region), make the thickness of substrate be reduced to required thickness, required thickness can be determined according to different voltage.
Then, the substrate back after thinning carries out N-type ion implantation, and by forming the micro-reach through region 407 of doping content higher than drift region 406 doping content after thermal diffusion.
In step S03, carry out ion implantation from substrate back, form the collector region of the first conduction type.
In one embodiment, by carrying out P type ion implantation from substrate back, form P+ collector region 408 by thermal diffusion.
So far, define the groove-shaped MPT type IGBT device of the embodiment of the present invention, the material in above each step and formation method are only example, and the present invention is not limited to this.
The above is only preferred embodiment of the present invention, not does any pro forma restriction to the present invention.
Although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention.Any those of ordinary skill in the art, do not departing under technical solution of the present invention ambit, the Method and Technology content of above-mentioned announcement all can be utilized to make many possible variations and modification to technical solution of the present invention, or be revised as the Equivalent embodiments of equivalent variations.Therefore, every content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belongs in the scope of technical solution of the present invention protection.
Claims (2)
1. an igbt, comprising: substrate, and described substrate has the source region of the collector region of the first conduction type, the drift region of the second conduction type, the well region of the first conduction type and the second conduction type, and grid; It is characterized in that, also comprise: micro-reach through region of the second conduction type between collector region and drift region, the doping content of described micro-reach through region is higher than the doping content of drift region; Be positioned at the P+ district below described source region;
Wherein, micro-reach through region of described second conduction type by drift region is thinning from substrate back, and carries out ion implantation and corresponding annealing process formation;
Described grid is positioned at substrate;
Or described grid is the groove being arranged in substrate.
2. a manufacture method for igbt, is characterized in that, comprising:
There is provided substrate, described substrate has the source region of the drift region of the second conduction type, the well region of the first conduction type and the second conduction type, and grid; Be positioned at the P+ district below described source region;
From substrate back, drift region is thinning, and carry out ion implantation and annealing process, form micro-reach through region of the second conduction type, the doping content of described micro-reach through region is higher than the doping content of described drift region;
Carry out ion implantation from substrate back, form the collector region of the first conduction type;
Described grid is positioned at substrate;
Or described grid is the groove being arranged in substrate.
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| US5998833A (en) * | 1998-10-26 | 1999-12-07 | North Carolina State University | Power semiconductor devices having improved high frequency switching and breakdown characteristics |
| US6303410B1 (en) * | 1998-06-01 | 2001-10-16 | North Carolina State University | Methods of forming power semiconductor devices having T-shaped gate electrodes |
| CN101976683A (en) * | 2010-09-25 | 2011-02-16 | 浙江大学 | Insulated gate bipolar transistor and manufacturing method thereof |
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| KR0149705B1 (en) * | 1994-05-28 | 1998-10-01 | 한민구 | A structure of the insulated gate bipolar transistor and manufacturing method of the same |
| DE19710731B4 (en) * | 1996-03-15 | 2006-02-16 | Fairchild Korea Semiconductor Ltd., Puchon | Power semiconductor device and method for its production |
| KR100256109B1 (en) * | 1997-05-07 | 2000-05-01 | 김덕중 | Power semiconductor device |
| KR100902848B1 (en) * | 2007-09-04 | 2009-06-16 | 고려대학교 산학협력단 | High voltage insulated gate bipolar transistor and Method for manufacturing the same |
| KR20100033791A (en) * | 2008-09-22 | 2010-03-31 | 고려대학교 산학협력단 | Insulated-gate bipolar transistor(igbt) and method for configuring thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6303410B1 (en) * | 1998-06-01 | 2001-10-16 | North Carolina State University | Methods of forming power semiconductor devices having T-shaped gate electrodes |
| US5998833A (en) * | 1998-10-26 | 1999-12-07 | North Carolina State University | Power semiconductor devices having improved high frequency switching and breakdown characteristics |
| CN101976683A (en) * | 2010-09-25 | 2011-02-16 | 浙江大学 | Insulated gate bipolar transistor and manufacturing method thereof |
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Inventor after: Tian Xiaoli Inventor after: Zhu Yangjun Inventor after: Sun Baogang Inventor after: Lu Shuojin Inventor after: Tan Ji Inventor before: Zhu Yangjun Inventor before: Tian Xiaoli Inventor before: Sun Baogang Inventor before: Lu Shuojin |
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Free format text: CORRECT: INVENTOR; FROM: ZHU YANGJUN TIAN XIAOLI SUN BAOGANG LU SHUOJIN TO: TIAN XIAOLI ZHU YANGJUNSUN BAOGANG LU SHUOJIN TAN JI |