CN102818637A

CN102818637A - CTIA (Capacitive Transimpedance Amplifier) structure input stage applicable to readout circuit of IRFPA (Infrared Focus Plane Arrray)

Info

Publication number: CN102818637A
Application number: CN2012102739803A
Authority: CN
Inventors: 王攀; 陈国强; 高磊; 丁瑞军; 叶振华; 周杰
Original assignee: Shanghai Institute of Technical Physics of CAS
Current assignee: Shanghai Institute of Technical Physics of CAS
Priority date: 2012-08-03
Filing date: 2012-08-03
Publication date: 2012-12-12
Anticipated expiration: 2032-08-03
Also published as: CN102818637B

Abstract

The invention discloses a CTIA (Capacitive Transimpedance Amplifier) structure input stage for collecting and processing weak signals of an IRFPA (Infrared Focus Plane Arrray), relating to an input stage of the CTIA structure operationally amplified by a current source-loaded cascode structure. Operational amplification of the CTIA structure is composed of M1, M2 and M3 CMOS (Complementary Metal Oxide Semiconductors) transistors; three transistors are of current source-loaded cascode structures; the M1 transistor is a current source load; the M2 transistor and the M3 transistor are of cascode structures. An Auxiliary voltage offset module is composed of 6 CMOS transistors (M4-M9) and is used for providing an offset voltage for the operational amplification. M4, M7, M8 and M9 CMOS transistors form a current mirror; M5 and M6 CMOS transistors are of diode connection structures; a reference current flows from an IBIA end; the offset voltage is given to M1 and M2 CMOS transistors by the current mirror. The CTIA structure achieve compromise of area, performance and power consumption, and provides a solution of a readout circuit for the IRFPA with a large area array, a small pixel and a weak signal.

Description

The CTIA structure input stage that short-wave infrared detector array row reading circuit is suitable for

Technical field

The present invention relates to mixed-Signal integrate Circuit technology; Be specifically related to the CTIA structure input stage that a kind of short-wave infrared detector array row reading circuit is suitable for; It is used for the high frame frequency with photoelectricity weak signal function of short-wave infrared detector array (Infrared Focus Plane Array-IRFPA) system and reads integrated circuit, can realize integration, sampling, amplification and the output of the low light level response signal of short-wave infrared detector.

Background technology

Infrared detector array is the core devices in the infrared imaging system.Infrared detector array generally is made up of two parts: infrared detector array and sensing circuit.Infrared eye produces a photocurrent relevant with the incident infrared radiation property after receiving the infrared radiation of incident, be transferred to corresponding sensing circuit unit.The tradition sensing circuit will carry out integration, amplification, sampling and maintenance to these electric signal, finally read with analog signal form through output buffering and multiplex system again, form image by the rear end electronic system.

High performance short-wave infrared detector has characteristics such as pixel face battle array is big, cellar area is little, photo-signal is faint, output frame frequency height.Big face battle array is responsive to the loss that signal transmits on concentric line; The less complexity that limits cellular construction of cellar area; Detector photo-signal less (0.1-1pA magnitude), the integration of itself is gathered difficulty; High frame frequency is used integral time limitedly makes the saturation charge on the sampling capacitance less than normal; Because signal is little, the nonlinearity that noise is introduced can be very big; Under high frame frequency duty, the data that small-signal obtains loss meeting in transmission course is relatively very big.

Conventional infrared eye sensing circuit generally is divided into unit, three parts of public, the public output stage of row.There are input stage structures commonly used such as CTIA, BDI, DI available in the cellular construction.Be listed as public generally be the one-level sample circuit by a column unit structure sharing, public output stage generally adopt the source class follower as output driving be that a ranks common structure is shared.Conventional CTIA structure input stage is all fine in the performance of injection efficiency, noise, but existing complex structure is difficult to realize in limited area.General row common structure is difficult to reach the requirement aspect dynamic range, squelch.The output stage of common source class follower can not satisfy frame frequency.

Summary of the invention

The CTIA structure input stage that the present invention provides a kind of short-wave infrared detector array row reading circuit to be suitable for; It is that the high frame frequency of gathering the weak signal function that has in a kind of short-wave infrared detector array system is read integrated circuit; It is exported after to the low light level electric signal integration of short-wave infrared detector, sampling, amplification; Further strengthen the signal handling capacity of short-wave infrared detector sensing circuit, to promote its development in big face battle array, high resolving power, multispectral direction.The problem that the present invention solves mainly is: the high-level efficiency collection of weak signal; The inhibition of low-frequency noise; Out-put dynamic range enlarges; The raising of sensing circuit working frame frequency.

The objective of the invention is to realize through following technological approaches:

The present invention adopts standard C SMC-6S05DPTM0.5um CMOS integrated circuit technology; In EDA (Electronic Design Automation electric design automation) design platform, build circuit; The main integration of realizing the detector photosignal; Correlated-double-sampling, the electric charge amplitude of oscillation amplify and output.Every grade of node of model configuration is all considered common wire's stray capacitance, has done enough buffer stages and has guaranteed to drive.In the row utility module, adopt the CDS correlated-double-sampling to eliminate more serious low-frequency noise in the sensing circuit.In the row utility module, adopt charge amplifier, can be with giving final output behind the signal linear amplification behind the integration.Adopt the loss of suitable buffering buffer structure in reducing to transmit.Push away and pull-down capability on when output stage adopts the symmetrical amplifier structure of complementary type to improve output.

The present invention has 2 innovations: 1. improved CTIA structure commonly used, the cascodes amplifier that has designed current source load has substituted the excessive telescopic amplifier of area commonly used.Critical nature such as injection efficiency of input stage but also can overcome the excessive shortcoming of original structure area in not only can the bonding meta structure.2. the signal link to sensing circuit designs; In cellular construction, adopt the CTIA structure input stage described in 1; In the row utility module, disposed the correlated-double-sampling structure and row electric charge structure for amplifying solves noise and dynamic respectively, public output stage structure adopts the complementary type export structure to improve the output frame frequency.

Technical scheme:

1) the sensing circuit pre-amplification circuit adopts electric capacity transimpedance amplifier (CTIA), this circuit module to be responsible for the detector photo-signal is read in circuit and integration is enlarged into voltage signal.Cushion then, amplify, the logical circuit in the engagement tabs is read the voltage signal that the pixel integration obtains to offer analog to digital conversion circuit through multiplexing emulation bus according to a certain order.The CTIA structure has very high injection efficiency, and integrating capacitor is very big electric capacity of input end by the Miller effect equivalence, obtains most marking currents thereby can shunt, and injection efficiency is higher than 90%.Because the restriction of area, the CTIA structure in this design can not be adopted telescopic or collapsible so complicated multitube structure, the cascodes amplifier of current source load can provide enough gains relatively to save area again.Well satisfied designing requirement.

Synoptic diagram and cellular construction figure that the CTIA structure is arranged in the accompanying drawing 3, wherein the middle M1 of figure (a), M2, three metal-oxide-semiconductors of M3 have constituted the amplifier of CTIA structure, place integrating capacitor between Vin and the Vout.Three pipes are the cascodes of current source load, and the M1 pipe is current source load, and M2, M3 are cascodes.This amplifier is the FAMP module of the CTIA structure among the figure (b).M4～M9 pipe provides the bias voltage of work for this amplifier.M4, M7, M8, M9 constitute current mirror respectively, and M5, M6 are the diode syndeton, and reference current is flowed into by the IBIA end, gives M1, M2 through current mirror with bias voltage.M4, M7 have identical breadth length ratio with M1, and M5 has identical breadth length ratio with M2, and M6, M8, M9 have identical breadth length ratio with M3.For saving area, M4～M9 is placed in the row utility module.TG is a transfer tube among the right figure, and SF is the source class follower, all is common structures.

2) sensing circuit has very serious low-frequency noise influence, like KTC noise, 1/f noise and array noise.For the correlated-double-sampling CDS among the present invention, can well reduce the influence of low-frequency noise in the accompanying drawing 4, the CDS has here selected relatively rational structure, to satisfy the requirement of high frame frequency, does not influence work schedule simultaneously basically.In a signals transmission, just can accomplish double sampling and subtract each other direct output.And can regulate the range of signal that reference voltage Vcds changes output.S1, S2 closure when signal is effective on the sampling capacitance, S3 breaks off, and A, 2 of B are clamped to Vin1 and Vcds respectively.S2 broke off after clamper was accomplished, and the electric charge of the right pole plate of B point C1 does not have path to shift, and is fixed on the B point, has just kept the voltage difference delta V=V of C1 electric capacity yet _B1-V _A1=V _CDS-V _In1S3 is closed afterwards, the C2 electric capacity that resets, and the A point is pulled down to the initial Vin0 on the sampling capacitance, and the B point voltage can be followed and dropped to V this moment _B2=V _A2+ Δ V=V _CDS+ (V _In0-V _In1), this signal is the value behind the signal subtraction twice.

3) major function of charge amplifier is to improve dynamic range, offers output stage after the amplification that the signal of prime is linear.This grade be main considers the linearity, to the driving force and the power consumption of back level.Concrete structure is in accompanying drawing 5, and S1 when the prime signal is effective, S3 are closed, and S2 breaks off, the C1 sampling, and C2 resets.S1, S3 broke off after sampling was accomplished, and S2 is closed, and the last electric charge of C1 is transferred on the C2, and signal is amplified in the output of Vout end.The amplitude of oscillation is with V _BlasBe threshold voltage of each loss of center bound, threshold value 1.1V～4V, input threshold also are 1.1V～4V.The ratio that designs C1, C2 is come the ratio of control signal amplitude amplification.Its operating voltage range also can be through regulating reference voltage Vbias control.

4) public output stage is the buffer stage of the public last Pad of driving of multichannel.Its serviceability directly has influence on the output frame frequency of circuit.Consider the unity gain amplifier pull-down capability that NMOS pipe forms more weak, on draw ability more intense, otherwise PMOS manage, formed the output stage structure of complementary type in conjunction with both advantages.At high signal is the work of NMOS amplifier, and the work of PMOS amplifier so just can provide good driving force during low signal.

5) be transferred to back level common structure after signal is accomplished integration and sampled in the CTIA construction module.Adopt CDS correlated-double-sampling structure in the row utility module, more serious low frequency is made an uproar in the elimination sensing circuit

The workflow of whole signal chains is such, and beginning was in the sensing circuit upper integral after the detector array of short-wave infrared detector was converted into faint current signal to the short-wave infrared signal.The CTIA structure is with the photo-signal integration, and integration is accomplished post-sampling in sampling capacitance, passes to the correlated-double-sampling structure in the row common structure afterwards.The correlated-double-sampling structure is the result that double sampling subtracts each other to signal and is passed to same charge amplifier in the row common structure.Charge amplifier outputs to the back level after with prime signal voltage linear amplification.The signal that complementary type output stage in the public output stage is come charge amplifier outputs on the last bus successively.

The invention has the advantages that:

1) the CTIA structure of unit has well realized the compromise of area, performance, power consumption, for the short-wave infrared detector device of big face battle array, little pixel, weak signal provides a kind of solution route of sensing circuit.Area 20um * 20um～200um * 200um, power consumption 0.5uW～2uW, injection efficiency is more than 95%.

2) integrated CDS correlated-double-sampling structure in the analog signal link, the low-frequency noise that elimination infrared eye sensing circuit is more serious.For short-wave infrared detector device provides technical support in application such as high resolving power.

3) doing good design aspect the output voltage swing improving, charge amplifier is to the linear amplification of signal swing and the coordination of signal working ranges at different levels, can significantly improve the dynamic range (2V～4V) of short-wave infrared detector device.

Description of drawings

Fig. 1 is an entire circuit functional module workflow diagram.UGA is the unity gain amplifier, and TG is a transmission gate, and SF is that the source is with structure.

Fig. 2 is 5 general in a link pipe unity gain amplifier structures (UGA).In correlated-double-sampling, charge amplifier and signal path, all use.

Fig. 3 is the CTIA structure pre-amplification circuit figure of cascodes (M1, M2, the M3) amplifier of employing current source load.M4～M9 is that amplifier provides bias voltage, is placed in the row common structure.Figure a is the amplifier and the additional bias structure of CTIA structure, and figure b is the CTIA structural entity synoptic diagram in the unit.

Fig. 4 is the correlated-double-sampling structure, and the CDS structure can effectively suppress low-frequency noise, so particularly the noise of cellular construction is placed on the row common level greatly.

Fig. 5 is the charge amplifier structure.

Embodiment

1) the sensing circuit pre-amplification circuit adopts the CTIA structure, and inside comprises M1, M2, M3 and integrating capacitor, sampling capacitance.Size confirms voluntarily that as required recommending breadth length ratio is 1/10,1/5,1/10.

2) the unity gain amplifier comprise M1～M5, recommend to be of a size of 10/1,10/1,20/1,20/1,20/1.

3) clamp voltage V in the correlated-double-sampling structure _CDSGet 4～5V, C1 gets 1～2p.

4) C1 is 1pF in the structure of charge amplifier, and C2 can get 0.4～2pF by magnification ratio.

5) the complementary output level structure N-UGA all adopt the structure of unity gain amplifier among Fig. 2, recommending breadth length ratio is 200/1,200/1,400/1,400/1,400/1.

The Application Design scheme of the amplifier CTIA structure of the analog signal link in this invention and the cascodes of current source load in infrared shortwave detector sensing circuit is rational, feasible.

Claims

1. CTIA structure input stage that is used to gather and handle short-wave infrared detector array weak signal; It is made up of the CTIA structure and the boosting voltage biasing module of the cascodes amplifier of current source load; It is characterized in that: described CTIA structure has been made up of the amplifier of CTIA structure M1, M2, three CMOS pipes of M3; Described three cascodes that the CMOS pipe is a current source load, the M1 pipe is current source load, M2 and M3 are cascodes; Described boosting voltage biasing module is made up of 6 CMOS pipe M4～M9, and the bias voltage of work is provided for the amplifier of CTIA structure; M4, M7, M8, M9 constitute current mirror respectively, and M5 and M6 are the diode syndeton, and reference current is flowed into by the IBIA end, gives M1, M2 through current mirror with bias voltage.