CN102769403B - Carrier wave stacked PWM (pulse-width modulation) modulating method based on selective cyclic virtual mapping - Google Patents
Carrier wave stacked PWM (pulse-width modulation) modulating method based on selective cyclic virtual mapping Download PDFInfo
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Abstract
The invention discloses a carrier wave stacked PWM (Pulse-Width Modulation) modulating method based on selective cyclic virtual mapping, and relates to a carrier wave stacked PWM modulating method based on selective cyclic virtual mapping for an MMC (modular multilevel converter). The carrier wave stacked PWM modulating method reaches a purpose of dynamic balance of capacitor voltage of submodules by constructing a virtual submodules and selectively changing circular mapping relation of driving signals of the virtual submodules and the practical submodules according to a bridge arm current direction fed back by a control system and mutual difference of the capacitor voltage of the practical submodules based on the traditional carrier wave stacked cyclic mapping balance control. The carrier wave stacked PWM modulating method provided by the invention can be used for modulating PWM signals of the MMC under middle-high voltage and high power and controlling the dynamic balance of the capacitor voltage.
Description
Technical field
The invention belongs to microelectronics technology, relate to PWM modulation, for the modulation output of modular multilevel and the dynamic equilibrium control of capacitance voltage of mesohigh, large-power occasions, is a kind of stacked PWM modulator approach of carrier wave of selectivity circulation virtual map.
Background technology
Modular multilevel converter, as a kind of modular multilevel structure being typically based upon on half-bridge submodule basis, its topological bridge arm (three-phase or single-phase) is mainly in series by submodule unit (SM:Sub-Module).Inside, each submodule unit can comprise at least one electric capacity, is equivalent to 1 independently DC source.By switching device in SM unit open or turn-off to control SM output level, the stack by level with subtract each other the actual output of construction system, reach and modulate the object of exporting.
For the modulator approach of this modular multilevel, mainly contain nearest level approximatioss NLM at present, phase-shifting carrier wave method CPSPWM, the stacked modulation method PDPWM of carrier wave, eliminates specific subharmonic modulation method SHEPWM, SVPWM method SVPWM etc.
Level approximatioss is used in the occasion that number of modules is higher recently, but it exists Optimal scheduling and the frequent selection problem of module; Phase-shifting carrier wave modulation method is a kind of relatively ripe modulator approach, in practical study, apply more, but phase-shifting carrier wave often need to realize the dynamic equilibrium of capacitance voltage in modulation signal by stack balance control signal, so not only bring the distortion of output signal, and have the possibility that causes system unstability, its controller conventionally adopting designs as shown in Figure 1; Eliminate specific subharmonic modulation method, in compute switch point, need to separate non-linear transcendental equation, calculation of complex, generally completes control by off-line look-up table, poor dynamic; Space vector modulation method, its level number becomes cube relation with space vector of voltage number, and along with the increase of level number, the complexity that vector is selected will significantly improve.The present invention is on the basis of the stacked PWM modulator approach of carrier wave, by adopting the method for selectivity circulation virtual map, solves the dynamic equalization of the insurmountable capacitance voltage of the stacked PWM modulator approach of traditional carrier wave; Control method is simple, can suppress well the mutual deviation of submodule capacitance voltage, and can not have situation out of control.
Summary of the invention
The problem to be solved in the present invention is: existing to the well dynamic equilibrium of control capacitance voltage of the modulator approach of modular multilevel converter, control method complexity, need a kind of control method simple, can suppress well the modulator approach of the mutual deviation of the capacitance voltage of submodule of converter.
Technical scheme of the present invention is: a kind of stacked PWM modulator approach of carrier wave of selectivity circulation virtual map, for modular multilevel converter, the brachium pontis of modular multilevel converter is in series at interior half-bridge or full-bridge submodule by comprising switching device and electric capacity, by software programming, modulated process is controlled, is comprised the following steps:
1) set up the virtual subnet module identical with actual submodule quantity, utilize the stacked PWM modulator approach of carrier wave to carry out PWM modulation to virtual subnet module, produce the corresponding virtual modulation signal of each virtual subnet module;
2) for the converter of system balancing symmetry, adopt indifference cyclic mapping to set up the cyclic mapping corresponding relation of virtual subnet module and actual submodule, between each submodule, realize the rotation of pwm signal indifference by cyclic mapping, realize the capacitance voltage balance control of actual submodule under system balancing symmetric condition, utilize cycle counter pointer that a value is 1～N to control between virtual subnet module and actual submodule and shine upon order, N is the submodule quantity in brachium pontis, and virtual modulation signal is transferred to actual submodule according to mapping order, realize the driver output to actual submodule,
3) when changer system disequilibrium symmetry, in step 2) basis on obtain the capacitance voltage feedback quantity of the actual submodule of converter, described feedback quantity is sorted, obtain wherein maximum voltage and the corresponding actual submodule numbering of minimum voltage, then according to the brachium pontis sense of current, carry out selectivity cyclic mapping: the 1～N that is numbered that establishes actual submodule, what virtual subnet module was corresponding is numbered 1 '～N ', be mapped to respectively in the corresponding actual submodule of maximum/minimum voltage and go with the virtual modulation signal of the virtual subnet module of N ' numbering 1 ', remove the corresponding actual submodule of capacitance voltage maximum/minimum value, the driving signal of remaining actual submodule is still by step 2) described in indifference loop mapping, according to the capacitance voltage dynamic equilibrium of the actual submodule of described selectivity cyclic mapping control, virtual modulation signal is given actual submodule according to described selectivity map transmission, realize the driver output to actual submodule,
4) actual submodule completes modulation under the driving of virtual modulation signal, the signal after output modulation.
Compared with existing conventional several modulation algorithms, of the present invention have a following characteristics:
1, by set up cyclic mapping relation between virtual subnet module and actual submodule, thereby the system that guaranteed does not change under the prerequisite of modulation signal, make modular multilevel converter possess dynamic electric voltage regulating power, avoid similar phase-shifting carrier wave to modulate by superposeing in reference signal after balance control signal, because parameter is selected the improper stability of a system problem that may cause, thereby there is very strong robustness;
2, control method is simple, does not need as phase-shifting carrier wave PSPWM for balanced voltage will add independently controller, only need modulator approach of the present invention be set in original DSP or FPGA and control;
3, realize dynamic equilibrium control, only need optionally change the correspondence mappings relation between virtual subnet module and actual submodule, do not have the improper and situation of unstability of system parameter selection, can be not out of control.
Accompanying drawing explanation
Fig. 1 modular multilevel converter phase-shifting carrier wave modulation balance control functional block diagram.
Fig. 2 is modular multilevel converter topology structure.
Fig. 3 is that embodiment of the present invention brachium pontis submodule forms and numbering, (a) is upper brachium pontis, is (b) lower brachium pontis.
Fig. 4 is the modulation signal that modulation signal of the present invention and carrier signal produce virtual subnet module more afterwards, (a) be the modulation signal of upper brachium pontis virtual subnet module, (b) being the modulation signal of lower brachium pontis virtual subnet module, is (c) corresponding (a) circuit theory diagrams (b).
Fig. 5 is that indifference cyclic mapping of the present invention is related to schematic diagram.
Fig. 6 is that selectivity cyclic mapping of the present invention is related to schematic diagram, is (a) the selectivity mapping relations in the time of i>0, is (b) the selectivity mapping relations in the time of i<0.
Fig. 7 is brachium pontis capacitance voltage minimum and maximum determination methods schematic diagram in the present invention, (a) is the schematic diagram of capacitance voltage minimum value determination methods, is (b) schematic diagram of capacitance voltage maximum determination methods.
Fig. 8 is in the embodiment of the present invention of the present invention, the Y array pointer content after capacitance voltage minimum and maximum are judged.
Fig. 9 is the virtual cyclic mapping cell schematics of selectivity of the present invention.
Figure 10 is embodiment of the present invention upper and lower bridge arm capacitance voltage simulation waveform.
Figure 11 is embodiment of the present invention dynamic equilibrium performance test experiments waveform.
Embodiment
The present invention proposes a kind of stacked modulator approach of carrier wave based on selectivity circulation virtual map, do not changing under the condition of hardware, set up the virtual subnet module identical with actual submodule quantity, utilize the stacked PWM modulator approach of carrier wave to carry out PWM modulation to virtual subnet module, produce the corresponding virtual modulation signal of each virtual subnet module, by the signal map relation of virtual subnet module in selectively changing converter brachium pontis (three-phase or single-phase) and actual submodule, drive actual submodule to modulate by virtual modulation signal, can carry out balance control to capacitance voltage in submodule well, and can there is not situation out of control.
Fig. 2 has shown the circuit topological structure of MMC converter, every by a series of submodule (submodule, SM) series connection obtains, upper brachium pontis and lower brachium pontis respectively have N submodule, the structure of each submodule is identical, the middle point voltage of upper and lower bridge arm is as output voltage, and upper and lower bridge arm all has an inductance in exit, can limit the effect of alternate circulation.Each SM is single armed half-bridge circuit and Capacitance parallel connection, is equivalent to 1 independently DC source.Open or turn-off to control SM output level by SM unit switch device, when steady operation there are 2 kinds of level output states in SM: in the time of the IGBT1 conducting of each SM unit, SM is output as UC, represents its place in circuit, is access state; In the time of IGBT2 conducting, SM is output as 0, is short-circuit condition.Therefore, each SM can export UC and 0 these 2 kinds of level.Therefore, by adjusting access number and the mode of upper and lower bridge arm submodule, can change the level of output voltage, realize Multilevel modulation output.
Convenient for setting forth principle, if brachium pontis is made up of four modules respectively, as shown in Figure 3, upper brachium pontis numbering is respectively #1 ~ #4, and the numbering of virtual subnet module is respectively 1 ' ~ 4 ', and lower brachium pontis numbering is respectively #5 ~ #8, the numbering of virtual subnet module is respectively 5 ' ~ 8 ', the reference signal of upper and lower bridge arm and carrier signal produce more afterwards and will drive the pwm signal of virtual subnet module, and schematic diagram, as Fig. 4, can produce the truth table as table 1 thus.
Table 1 virtual subnet module modulation signal truth table
" region " described in table is voltage range corresponding while representing that normalized reference voltage Umu and Umd are in region, need not carry out subregion processing here, as Fig. 4 (a) (b) as shown in, automatically relatively completed by reference voltage and triangular carrier.
Pass through the modulator approach of carrier wave rotation in conjunction with the stacked PWM of traditional carrier wave, virtual subnet module is carried out to PWM modulation, produce the corresponding virtual modulation signal of each virtual subnet module, and set up mapping relations between virtual subnet module and actual submodule, between each submodule, realize the rotation of pwm signal indifference by cyclic mapping, thereby realize the capacitance voltage balance control under system balancing condition.
The present invention utilizes selectivity cyclic mapping on the basis of first 2, solves converter and loses in symmetrical situation, the dynamic equilibrium problem of capacitance voltage.Through observing, in table 1, it is special having two modulation signals corresponding to virtual subnet module, 1 ' and 4 ', wherein 1 ' driving signal is only exported PWM in the time of the I of signal area, the driving signal in other three territories is 1, and 4 ' driving signal is only PWM in the time of the IV of region, and other three regions drive signal to be 0.Like this, only need to detect capacitance voltage maximum and the corresponding numbering of minimum value of actual submodule # 1 ~ #4, then in Fig. 6, when current i >0, be electric current to electric capacity when the charged state, by the driving signal-selectivity of virtual subnet module 1 ' be mapped to actual submodule corresponding to minimum value numbering, realize many chargings, and the driving signal-selectivity of virtual subnet module 4 ' is mapped to actual submodule corresponding to maximum numbering, realize few charging.When current i <0, corresponding mapping relations change, the driving signal-selectivity of virtual subnet module 1 ' is mapped to actual submodule corresponding to maximum numbering, realize many electric discharges, and by the driving signal-selectivity of virtual subnet module 4 ' be mapped to actual submodule corresponding to minimum value numbering, realize few electric discharge.Still loop mapping by indifference for the submodule except maximum/minimum voltage value.By above selectivity cyclic mapping, can guarantee the dynamic equilibrium of submodule capacitance voltage.
Below by the modulator approach that illustrates embodiment.
Specific embodiment is take upper and lower bridge arm respectively as four modules are as example, and numbering is respectively #1 ~ #8 from top to bottom, as Fig. 3.The numbering of virtual upper brachium pontis submodule is respectively 1 ' ~ 4 ', the numbering of virtual lower brachium pontis submodule is respectively 5 ' ~ 8 ', reference voltage signal and carrier signal produce more afterwards and will drive the modulation signal of virtual subnet module, and schematic diagram 4 is visible, produces as the truth table of table 1 thus.In Fig. 4, Umu and Umd are respectively the reference voltage signal of upper and lower bridge arm, U
1~ U
8be respectively the carrier signal of virtual subnet module separately.
By the stacked PWM modulator approach of traditional carrier wave, virtual subnet module is carried out to PWM modulation, produce the corresponding virtual modulation signal of each virtual subnet module, and set up mapping relations between virtual subnet module and actual submodule, between each submodule, realize the rotation of pwm signal indifference by cyclic mapping, thereby realize the capacitance voltage balance control under system balancing condition.As shown in Figure 5, specific implementation method is by setting up a cycle count pointer C
m, at different C
mtime, the output of virtual subnet module is mapped to corresponding actual submodule, each four modules of the present embodiment upper and lower bridge arm, cycle count pointer C
mcount value be 4, Fig. 5 (a)～(d) shown respectively C
m=1～4 mapping situation.
The present invention utilizes selectivity cyclic mapping on aforementioned basis, solves converter and loses in symmetrical situation, the dynamic equilibrium problem of capacitance voltage.As shown in Figure 6, only above brachium pontis is example in concrete manifestation, supposes now submodule 1 capacitance voltage maximum, submodule 2 capacitance voltage minimums.Wherein capacitance voltage minimum value and maximum determination methods are as shown in Figure 7, Udc1 ~ Udc8 is actual submodule capacitance voltage value, the result of judgement is delivered to an array pointer Y, wherein in Y (1), deposit actual submodule numbering corresponding to capacitance voltage minimum value, in Y (2), deposit actual submodule numbering corresponding to capacitance voltage maximum, the numbering of actual submodule remaining after minimum and maximum value judgement is directly delivered to Y array pointer in order, and the array pointer obtaining thus can be as shown in Figure 8.
Set up the virtual cyclic mapping of selectivity unit, as Fig. 9, like this, in the time of the electric current I >0 of upper brachium pontis, virtual subnet module 1 ' is mapped to the actual submodule that Y (1) points to, and virtual subnet module 4 ' is mapped to the actual submodule that Y (2) points to, specific as follows:
N[Y(1)]=N[3]=1
N[Y(2)]=N[2]=4
In the time of upper brachium pontis I<0, virtual subnet module 1 ' is mapped to the actual submodule that Y (2) points to, and virtual subnet module 4 ' is mapped to the actual submodule that Y (1) points to:
N[Y(1)]=N[3]=4
N[Y(2)]=N[2]=1
Remaining submodule still carries out cyclic mapping by the method for indifference rotation circulation, as C
m=1 o'clock,
N[Y(3)]=N[1]=2
N[Y(4)]=N[4]=3
Work as C
m=2 o'clock
N[Y(3)]=N[1]=3
N[Y(4)]=N[4]=2
The voltage dynamic equilibrium control effect of emulation is as Figure 10, and wherein (a) (b) represents respectively to occur the waveform of the upper and lower bridge arm capacitance voltage when uneven, and (c) (d) represents the upper and lower bridge arm capacitance voltage waveform after selectivity circulation virtual map function drops into.The voltage dynamic equilibrium control effect of experiment is as Figure 11, and the waveform before and after alternative circulation virtual map function drops into, can find out, the voltage current waveform after input is greatly improved.
Claims (1)
1. the stacked PWM modulator approach of the carrier wave of a selectivity circulation virtual map, for modular multilevel converter, the brachium pontis of modular multilevel converter and Cascade H bridge multi-level converter is in series at interior half-bridge by comprising switching device and electric capacity, it is characterized in that by software programming, modulated process being controlled, comprise the following steps:
1) set up the virtual subnet module identical with actual submodule quantity, utilize the stacked PWM modulator approach of carrier wave to carry out PWM modulation to virtual subnet module, produce the corresponding virtual modulation signal of each virtual subnet module;
2) for the converter of system balancing symmetry, adopt indifference cyclic mapping to set up the cyclic mapping corresponding relation of virtual subnet module and actual submodule, between each submodule, realize the rotation of pwm signal indifference by cyclic mapping, realize the capacitance voltage balance control of actual submodule under system balancing symmetric condition, utilize cycle counter pointer that a value is 1～N to control between virtual subnet module and actual submodule and shine upon order, N is the submodule quantity in brachium pontis, and virtual modulation signal is transferred to actual submodule according to mapping order, realize the driver output to actual submodule,
3) when changer system disequilibrium symmetry, in step 2) basis on obtain the capacitance voltage feedback quantity of the actual submodule of converter, described feedback quantity is sorted, obtain wherein maximum voltage and the corresponding actual submodule numbering of minimum voltage, then according to the brachium pontis sense of current, carry out selectivity cyclic mapping: the 1～N that is numbered that establishes actual submodule, what virtual subnet module was corresponding is numbered 1 '～N ', is mapped to respectively in the corresponding actual submodule of maximum/minimum voltage and goes with the virtual modulation signal of the virtual subnet module of N ' numbering 1 ':
When current i >0, be electric current to electric capacity when the charged state, by the driving signal-selectivity of virtual subnet module 1 ' be mapped to actual submodule corresponding to voltage minimum numbering, realize many chargings, and the driving signal-selectivity of virtual subnet module N ' is mapped to actual submodule corresponding to voltage max numbering, realize few charging; When current i <0, corresponding mapping relations change, the driving signal-selectivity of virtual subnet module 1 ' is mapped to actual submodule corresponding to voltage max numbering, realize many electric discharges, and by the driving signal-selectivity of virtual subnet module N ' be mapped to actual submodule corresponding to voltage minimum numbering, realize few electric discharge;
Remove the corresponding actual submodule of voltage maximum/minimum value, the driving signal of remaining actual submodule is still by step 2) described in indifference cyclic mapping set up the cyclic mapping corresponding relation of virtual subnet module and actual submodule, according to the capacitance voltage dynamic equilibrium of the actual submodule of described selectivity cyclic mapping control, virtual modulation signal is transferred to actual submodule according to described selectivity cyclic mapping, realizes the driver output to actual submodule;
4) actual submodule completes modulation under the driving of virtual modulation signal, the signal after output modulation.
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