CN102723293A - Etching-first and packaging-later manufacturing method for chip inversion single-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit - Google Patents

Etching-first and packaging-later manufacturing method for chip inversion single-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit Download PDF

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Publication number
CN102723293A
CN102723293A CN2012101898944A CN201210189894A CN102723293A CN 102723293 A CN102723293 A CN 102723293A CN 2012101898944 A CN2012101898944 A CN 2012101898944A CN 201210189894 A CN201210189894 A CN 201210189894A CN 102723293 A CN102723293 A CN 102723293A
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China
Prior art keywords
metal substrate
metal
back side
chip
green lacquer
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CN2012101898944A
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CN102723293B (en
Inventor
王新潮
梁志忠
李维平
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Stats Chippac Semiconductor Jiangyin Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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Priority to CN201210189894.4A priority Critical patent/CN102723293B/en
Publication of CN102723293A publication Critical patent/CN102723293A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

The invention relates to an etching-first and packaging-later manufacturing method for a chip inversion single-surface three-dimensional circuit and a packaging structure of the chip inversion single-surface three-dimensional circuit. The method comprises the following steps of taking a metal substrate; pre-plating copper on the surface of the metal substrate; coating the surface of the metal substrate with green paint; removing a part of the green paint from the back surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the back surface of the metal substrate; electro-plating the metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the back surface of the metal substrate; coating a circuit screen board; pre-processing of metallization; removing the circuit screen board; electro-plating the metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the front surface of the metal substrate; chemical-etching; electro-plating the metal circuit layer; installing a chip and filling the bottom part of the chip; packaging; tapping at the back surface of the metal substrate; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.

Description

The three-dimensional circuit of flip-chip single face loses earlier and afterwards seals manufacturing approach and encapsulating structure thereof
Technical field
The present invention relates to first erosion of the three-dimensional circuit of a kind of flip-chip single face and afterwards seal manufacturing approach and encapsulating structure thereof.Belong to the semiconductor packaging field.
Background technology
The manufacturing process flow of traditional high-density base board encapsulating structure is as follows:
Step 1, referring to Figure 53, get the substrate that a glass fiber material is processed,
Step 2, referring to Figure 54, perforate on desired position on the glass fiber substrate,
Step 3, referring to Figure 55, at the back side of glass fiber substrate coating one deck Copper Foil,
Step 4, referring to Figure 56, insert conductive materials in the position of glass fiber substrate punching,
Step 5, referring to Figure 57, at positive coating one deck Copper Foil of glass fiber substrate,
Step 6, referring to Figure 58, the coating photoresistance film on glass fiber substrate surface,
Step 7, referring to Figure 59, the photoresistance film is carried out exposure imaging in the position of needs windows,
Step 8, referring to Figure 60, the part that completion is windowed is carried out etching,
Step 9, referring to Figure 61, the photoresistance film of substrate surface is divested,
Step 10, referring to Figure 62, carry out the coating of anti-welding lacquer (being commonly called as green lacquer) on the surface of copper foil circuit layer,
Step 11, referring to Figure 63, need carry out load and the zone of routing bonding of back operation at anti-welding lacquer and window,
Step 12, referring to Figure 64, electroplate in the zone that step 11 is windowed, form Ji Dao and pin relatively,
Step 13, accomplish follow-up load, routing, seal, concerned process steps such as cutting.
Above-mentioned traditional high-density base board encapsulating structure exists following deficiency and defective:
1, many glass fiber materials of one deck, same also many costs of layer of glass;
2, because must use glass fiber, so with regard to many thickness space of about 100 ~ 150 μ m of layer of glass thickness;
3, glass fiber itself is exactly a kind of foaming substance, so easily because time of placing and environment suck moisture and moisture, directly have influence on the security capabilities or the reliability step of reliability;
4, the fiberglass surfacing Copper Foil metal layer thickness of about 50 ~ 100 μ m of one deck that has been covered; And the etching of metal level circuit and circuit distance is also because the characteristic of etching factor can only accomplish that (etching factor: the ability of preferably manufacturing is that etched gap is equal to the thickness that is etched object approximately for the etched gap of 50 ~ 100 μ m; Referring to Figure 65), so the design of accomplishing high-density line and manufacturing that can't be real;
5, because must use the Copper Foil metal level, and the Copper Foil metal level is the mode that the employing high pressure is pasted, so the thickness of Copper Foil is difficult to be lower than the thickness of 50 μ m, otherwise just is difficult to operation like out-of-flatness or Copper Foil breakage or Copper Foil extension displacement or the like;
6, also because the whole base plate material is to adopt glass fiber material, thus significantly increased thickness 100 ~ 150 μ m of glass layer, can't be real accomplish ultra-thin encapsulation;
7, the traditional glass fiber stick on Copper Foil technology because material property difference very big (coefficient of expansion) causes stress deformation easily in the operation of adverse circumstances, directly have influence on precision and element and substrate adherence and reliability that element loads.
Summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, provide the three-dimensional circuit of a kind of flip-chip single face to lose earlier and afterwards seal manufacturing approach and encapsulating structure thereof, its technology is simple; Need not use glass layer; Reduce cost of manufacture, improved the fail safe and the reliability of packaging body, reduced the environmental pollution that glass fiber material brings; And the metal substrate line layer adopts is electro-plating method, can really accomplish the design and the manufacturing of high-density line.
The objective of the invention is to realize like this: the three-dimensional circuit of a kind of flip-chip single face loses earlier and afterwards seals manufacturing approach, said method comprising the steps of:
Step 1, get metal substrate
Step 2, metallic substrate surfaces preplating copper
At metallic substrate surfaces plating one deck copper material film;
Step 3, the lining of green lacquer
The lining of green lacquer is carried out at the metal substrate front and the back side accomplishing preplating copper material film respectively;
The green lacquer of part is removed at step 4, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 3 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 5, plating inert metal line layer
In step 4, electroplate the inert metal line layer in the zone of the green lacquer of metal substrate back side removal part;
Step 6, plated metal line layer
Inert metal line layer surface in step 5 plates multilayer or single-layer metal line layer;
Step 7, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
The green lacquer of part is removed at step 8, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 4 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 9, plated metal line layer
Metallic circuit laminar surface in step 6 plates multilayer or single-layer metal line layer;
Step 10, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
The green lacquer of part is removed at step 11, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 10 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 12, be covered with the circuit web plate
Be covered with the circuit web plate at the metal substrate back side;
Step 13, metallization pre-treatment
Carry out the metallization pre-treatment of plated metal line layer at substrate back;
Step 14, remove the circuit web plate
The circuit web plate of step 12 is removed;
Step 15, plated metal line layer
Plate multilayer or single-layer metal line layer at the metal substrate back side;
Step 10 six, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
Step 10 seven, metal substrate front face are removed the green lacquer of part
Utilize exposure imaging equipment that the metal substrate front is carried out graph exposure, develops and removed the green lacquer of part figure;
Step 10 eight, chemical etching
Chemical etching is carried out in the zone of accomplishing exposure imaging in the step 10 seven;
Step 10 nine, plated metal line layer
Plate the metallic circuit layer of individual layer or multilayer on inert metal line layer surface, promptly on metal substrate, form corresponding pin or Ji Dao and pin or Ji Dao, pin and static release ring after metal plating is accomplished;
Step 2 ten, load and chip bottom are filled
Positive and pin front flip-chip and chip bottom filling epoxy resin on the positive or basic island of the pin of step 10 nine;
Step 2 11, seal
Plastic packaging material is carried out in metal substrate front behind the completion load routing seal operation;
Step 2 12, the perforate of the metal substrate back side
At the metal substrate back side perforate operation is carried out in the follow-up zone that will plant metal ball;
Step 2 13, cleaning
Tapping carries out the cleaning of oxidation material, organic substance at the metal substrate back side;
Step 2 14, plant ball
Green lacquer tapping is implanted into metal ball at the metal substrate back side;
Step 2 15, cutting finished product
Step 2 14 is accomplished the semi-finished product of planting ball carry out cutting operation; Make and originally integrate and to contain more than cuttings of plastic-sealed body module of chip independent with array aggregate mode; Encapsulate base island embedded encapsulating structure after making the etching of single-chip upside-down mounting elder generation, can adopt conventional diamond blade and conventional cutting equipment to get final product.
The present invention also provides the three-dimensional circuit of a kind of flip-chip single face to lose earlier and afterwards seals encapsulating structure; It comprises pin; Said pin front is provided with chip through conduction or non-conductive bonding material, is connected with metal wire between said chip front side and the pin front, and the zone on the zone between said pin and the pin, pin top, the zone of pin bottom and chip and metal wire all are encapsulated with plastic packaging material and green lacquer outward; Green the painting at the said pin back side offers aperture; Said aperture is connected with the pin back side, is provided with metal ball in the said aperture, and said metal ball contacts with the pin back side.
The green lacquer tapping in 13 pairs of metal substrate back sides of said step 2 cleans and carries out the coat of metal lining simultaneously.
Said encapsulating structure comprises Ji Dao, and the positive upside-down mounting of said chip is positive and pin front in basic island, is provided with underfill between said chip bottom and front, basic island and the pin front.
Compared with prior art, the present invention has following beneficial effect:
1, the present invention need not use glass layer, so can reduce the cost that glass layer brings;
2, the present invention does not use the foaming substance of glass layer, so the grade of reliability can improve again, the fail safe to packaging body will improve relatively;
3, the present invention need not use the glass layer material, so just can reduce the environmental pollution that glass fiber material brings;
4, the present invention is a three-dimensional metal substrate circuit layer plating method is used, and the total thickness of the plating layer is about 10 ~ 15μm, and the gap between the line and the line can easily reach 25μm below the gap, it can be really done within the pin high-density tiling line technical capacity;
5,3-dimensional metal substrate of the present invention is the metal level galvanoplastic because of what adopt; So the technology than glass fiber high pressure Copper Foil metal level is come simply, and do not have metal level because high pressure produces bad or puzzled that metal level out-of-flatness, metal level breakage and metal level extend and be shifted;
6,3-dimensional metal substrate circuit layer of the present invention is to carry out metal plating on the surface of metal base; So the material characteristic is basic identical; So the internal stress of coating circuit and metal base is basic identical, can carries out the back engineering (like the surface mount work of high temperature eutectic load, high temperature tin material scolder load and high temperature passive device) of adverse circumstances easily and be not easy to produce stress deformation.
Description of drawings
Fig. 1 ~ Figure 25 loses earlier each the operation sketch map that afterwards seals manufacture method embodiment 1 for the three-dimensional circuit of flip-chip single face of the present invention.
Figure 26 loses earlier the structural representation that afterwards seals encapsulating structure embodiment 1 for the three-dimensional circuit of flip-chip single face of the present invention.
Figure 27 ~ Figure 51 loses earlier each the operation sketch map that afterwards seals manufacture method embodiment 2 for the three-dimensional circuit of flip-chip single face of the present invention.
Figure 52 loses earlier the structural representation that afterwards seals encapsulating structure embodiment 2 for the three-dimensional circuit of flip-chip single face of the present invention.
Figure 53 ~ Figure 64 is the manufacturing process flow diagram of traditional high-density base board encapsulating structure.
Figure 65 is the etching situation sketch map of fiberglass surfacing Copper Foil metal level.
Wherein:
Metal substrate 1
Copper material film 2
Green lacquer 3
Inert metal line layer 4
Metallic circuit layer 5
Circuit web plate 6
Metallization preprocessing layer 7
Underfill 8
Chip 9
Plastic packaging material 10
Aperture 11
Coat of metal 12
Metal ball 13
Base island 14
Pin 15.
Embodiment
The three-dimensional circuit of a kind of flip-chip single face of the present invention loses earlier and afterwards seals manufacturing approach and encapsulating structure is following:
Embodiment one, no Ji Dao
Step 1, get metal substrate
Referring to Fig. 1, get the suitable metal substrate of a slice thickness, the material of metal substrate can be carried out conversion according to the function and the characteristic of chip, for example: copper material, iron material, ferronickel material, zinc-iron material etc.
Step 2, metallic substrate surfaces preplating copper
Referring to Fig. 2, at metallic substrate surfaces plating one deck copper material film, purpose is to do the basis for follow-up plating.(mode of plating can adopt chemical plating or metallide).
Step 3, the lining of green lacquer
Referring to Fig. 3, carry out the lining of green lacquer respectively at the front and the back side of the metal substrate of accomplishing preplating copper material film, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 4, the metal substrate back side
Referring to Fig. 4, the metal substrate back side that utilizes exposure imaging equipment that step 3 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 5, plating inert metal line layer
Referring to Fig. 5; In step 4, electroplate the inert metal line layer in the zone of the green lacquer of metal substrate back side removal part; As the barrier layer of subsequent etch work, inert metal can adopt nickel or titanium or copper, and plating mode can be electroless plating or metallide mode.
Step 6, plated metal line layer
Referring to Fig. 6; Inert metal line layer surface in step 5 plates multilayer or single-layer metal line layer; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 7, the lining of green lacquer
Referring to Fig. 7, carry out the lining of green lacquer at the back side of metal substrate, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 8, the metal substrate back side
Referring to Fig. 8, the metal substrate back side that utilizes exposure imaging equipment that step 4 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 9, plated metal line layer
Referring to Fig. 9; Metallic circuit laminar surface in step 6 plates multilayer or single-layer metal line layer; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 10, the lining of green lacquer
Referring to Figure 10, carry out the lining of green lacquer at the back side of metal substrate, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 11, the metal substrate back side
Referring to Figure 11, the metal substrate back side that utilizes exposure imaging equipment that step 10 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 12, be covered with the circuit web plate
Referring to Figure 12, be covered with the circuit web plate at the metal substrate back side.
Step 13, metallization pre-treatment
Referring to Figure 13, carry out the metallization pre-treatment of plated metal line layer at substrate back, the metallization pre-treatment can be used coating process (mode of spray pattern, mode of printing, showering mode, immersion etc.).
Step 14, remove the circuit web plate
Referring to Figure 14, the circuit web plate of step 12 is removed.
Step 15, plated metal line layer
Referring to Figure 15; Plate multilayer or single-layer metal line layer at the metal substrate back side; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 10 six, the lining of green lacquer
Referring to Figure 16, carry out the lining of green lacquer at the back side of metal substrate, so that the metallic circuit layer is sealed.
Step 10 seven, metal substrate front face are removed the green lacquer of part
Referring to Figure 11, utilize exposure imaging equipment that the green lacquer of part figure is carried out graph exposure, develops and removes in the metal substrate front, to expose the regional graphics that the positive follow-up needs of metal substrate are electroplated.
Step 10 eight, chemical etching
Referring to Figure 18, chemical etching is carried out in the zone of accomplishing exposure imaging in the step 10 seven, chemical etching is till the inert metal line layer, and etching liquid medicine can adopt copper chloride or iron chloride.
Step 10 nine, plated metal line layer
Referring to Figure 19; Plate the metallic circuit layer of individual layer or multilayer on inert metal line layer surface; After accomplishing, metal plating promptly on metal substrate, forms corresponding pin; The coating kind can be copper nickel gold, copper nickeline, porpezite, gold or copper etc., and electro-plating method can be electroless plating or metallide.
Step 2 ten, load and chip bottom are filled
Referring to Figure 20, at the pin front flip-chip and the chip bottom filling epoxy resin of step 10 nine.
Step 2 11, seal
Referring to Figure 21; Plastic packaging material is carried out in metal substrate front behind the completion load routing seal operation; Purpose is to utilize epoxy resin that chip and metal wire are fixed and protection; Encapsulating method adopts mould encapsulating, spraying method or brush coating mode to carry out, and plastic packaging material can adopt filler or packless epoxy resin.
Step 2 12, the perforate of the metal substrate back side
Referring to Figure 22, carry out the follow-up zone that will plant metal ball at the metal substrate back side and carry out the perforate operation, can adopt dry laser sintering or wet chemistry corroding method to carry out perforate.
Step 2 13, cleaning
Referring to Figure 23, green lacquer tapping carries out the cleaning of oxidation material, organic substance at the metal substrate back side, can carry out the lining of coat of metal simultaneously, and coat of metal adopts oxidation-resistant material.
Step 2 14, plant ball
Referring to Figure 24; Tapping is implanted into metal ball at the metal substrate back side; Metal ball is contacted with the pin back side, can adopt conventional ball attachment machine or adopt the paste printing after high-temperature digestion, can form orbicule again, the material of metal ball can be pure tin or ashbury metal.
Step 2 15, cutting finished product
Referring to Figure 25; Step 2 14 is accomplished the semi-finished product of planting ball carry out cutting operation; Make and originally integrate and to contain more than cuttings of plastic-sealed body module of chip independent with array aggregate mode; Encapsulate base island embedded encapsulating structure after making the etching of single-chip upside-down mounting elder generation, can adopt conventional diamond blade and conventional cutting equipment to get final product.
Shown in figure 26; The present invention also provides the three-dimensional circuit of a kind of flip-chip single face to lose earlier the encapsulating structure that afterwards seals; Said encapsulating structure comprises pin 15, and the positive upside-down mounting of said chip 9 is provided with underfill 8 in pin 15 fronts between said chip 9 bottoms and pin 15 fronts; The zone of the zone on the zone between said pin 15 and the pin 15, pin 15 tops, pin 15 bottoms and chip 9 outer green lacquer 3 and the plastic packaging materials 10 of all being encapsulated with; Offer aperture 11 on the green lacquer 3 at said pin 15 back sides, said aperture 11 is connected with pin 15 back sides, is provided with metal ball 13 in the said aperture 11; Be provided with coat of metal 12 between the said metal ball 13 and pin 15 back sides, said metal ball 13 adopts tin or tin alloy material.
Embodiment two, Ji Dao is arranged
Step 1, get metal substrate
Referring to Figure 27, get the suitable metal substrate of a slice thickness, the material of metal substrate can be carried out conversion according to the function and the characteristic of chip, for example: copper material, iron material, ferronickel material, zinc-iron material etc.
Step 2, metallic substrate surfaces preplating copper
Referring to Figure 28, at metallic substrate surfaces plating one deck copper material film, purpose is to do the basis for follow-up plating.(mode of plating can adopt electroless plating or metallide).
Step 3, the lining of green lacquer
Referring to Figure 29, carry out the lining of green lacquer respectively at the front and the back side of the metal substrate of accomplishing preplating copper material film, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 4, the metal substrate back side
Referring to Figure 30, the metal substrate back side that utilizes exposure imaging equipment that step 3 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 5, plating inert metal line layer
Referring to Figure 31; In step 4, electroplate the inert metal line layer in the zone of the green lacquer of metal substrate back side removal part; As the barrier layer of subsequent etch work, inert metal can adopt nickel or titanium or copper, and plating mode can be electroless plating or metallide mode.
Step 6, plated metal line layer
Referring to Figure 32; Inert metal line layer surface in step 5 plates multilayer or single-layer metal line layer; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 7, the lining of green lacquer
Referring to Figure 33, carry out the lining of green lacquer at the back side of metal substrate, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 8, the metal substrate back side
Referring to Figure 34, the metal substrate back side that utilizes exposure imaging equipment that step 4 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 9, plated metal line layer
Referring to Figure 35; Metallic circuit laminar surface in step 6 plates multilayer or single-layer metal line layer; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 10, the lining of green lacquer
Referring to Figure 36, carry out the lining of green lacquer at the back side of metal substrate, to protect follow-up electroplated metal layer process operation.
The green lacquer of part is removed at step 11, the metal substrate back side
Referring to Figure 37, the metal substrate back side that utilizes exposure imaging equipment that step 10 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure, to expose the regional graphics that the follow-up needs in the metal substrate back side are electroplated.
Step 12, be covered with the circuit web plate
Referring to Figure 38, be covered with the circuit web plate at the metal substrate back side.
Step 13, metallization pre-treatment
Referring to Figure 39, carry out the metallization pre-treatment of plated metal line layer at substrate back, the metallization pre-treatment can be used coating process (mode of spray pattern, mode of printing, showering mode, immersion etc.).
Step 14, remove the circuit web plate
Referring to Figure 40, the circuit web plate of step 12 is removed.
Step 15, plated metal line layer
Referring to Figure 41; Plate multilayer or single-layer metal line layer at the metal substrate back side; Said metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, the copper material, and plating mode can be that electroless plating also can be the mode of metallide.
Step 10 six, the lining of green lacquer
Referring to Figure 42, carry out the lining of green lacquer at the back side of metal substrate, so that the metallic circuit layer is sealed.
Step 10 seven, metal substrate front face are removed the green lacquer of part
Referring to Figure 43, utilize exposure imaging equipment that the green lacquer of part figure is carried out graph exposure, develops and removes in the metal substrate front, to expose the regional graphics that the positive follow-up needs of metal substrate are electroplated.
Step 10 eight, chemical etching
Referring to Figure 44, chemical etching is carried out in the zone of accomplishing exposure imaging in the step 10 seven, chemical etching is till the inert metal line layer, and etching liquid medicine can adopt copper chloride or iron chloride.
Step 10 nine, plated metal line layer
Referring to Figure 45; Plate the metallic circuit layer of individual layer or multilayer on inert metal line layer surface; After accomplishing, metal plating promptly on metal substrate, forms corresponding Ji Dao and pin; The coating kind can be copper nickel gold, copper nickeline, porpezite, gold or copper etc., and electro-plating method can be electroless plating or metallide.
Step 2 ten, load and chip bottom are filled
Referring to Figure 46, positive and pin front flip-chip and chip bottom filling glue on the basic island of step 10 nine.
Step 2 11, seal
Referring to Figure 47; Plastic packaging material is carried out in metal substrate front after the completion load seal operation; Purpose is to utilize epoxy resin that chip and metal wire are fixed and protection; Encapsulating method adopts mould encapsulating, spraying method or brush coating mode to carry out, and plastic packaging material can adopt filler or packless epoxy resin.
Step 2 12, the perforate of the metal substrate back side
Referring to Figure 48, carry out the follow-up zone that will plant metal ball at the metal substrate back side and carry out the perforate operation, can adopt dry laser sintering or wet chemistry corroding method to carry out perforate.
Step 2 13, cleaning
Referring to Figure 49, green lacquer tapping carries out the cleaning of oxidation material, organic substance at the metal substrate back side, can carry out the lining of coat of metal simultaneously, and coat of metal adopts oxidation-resistant material.
Step 2 14, plant ball
Referring to Figure 50; Tapping is implanted into metal ball at the metal substrate back side; Metal ball is contacted with the pin back side, can adopt conventional ball attachment machine or adopt the paste printing after high-temperature digestion, can form orbicule again, the material of metal ball can be pure tin or ashbury metal.
Step 2 15, cutting finished product
Referring to Figure 51; Step 2 14 is accomplished the semi-finished product of planting ball carry out cutting operation; Make and originally integrate and to contain more than cuttings of plastic-sealed body module of chip independent with array aggregate mode; Encapsulate base island embedded encapsulating structure after making the etching of single-chip upside-down mounting elder generation, can adopt conventional diamond blade and conventional cutting equipment to get final product.
Shown in Figure 52; The present invention also provides the three-dimensional circuit of a kind of flip-chip single face to lose earlier the encapsulating structure that afterwards seals; Said encapsulating structure comprises basic island 14 and pin 15; The positive upside-down mounting of said chip 9 is in 14 positive and pin 15 fronts, basic island; Be provided with underfill 8 between said chip 9 bottoms and 14 fronts, basic island and pin 15 fronts, be encapsulated with green lacquer 3 and plastic packaging material 10 outside the zone of zone, basic island 14 and pin 15 bottoms on zone, basic island 14 and pin 15 tops between zone, pin 15 and the pin 15 between zone, basic island 14 and the pin 15 of 14 peripheries, said basic island and the chip 9, offer aperture 11 on the green lacquer 3 at said pin 15 back sides; Said aperture 11 is connected with pin 15 back sides; Be provided with metal ball 13 in the said aperture 11, be provided with coat of metal 12 between the said metal ball 13 and pin 15 back sides, said metal ball 13 adopts tin or tin alloy material.

Claims (4)

1. the three-dimensional circuit of flip-chip single face loses earlier and afterwards seals manufacturing approach, said method comprising the steps of:
Step 1, get metal substrate
Step 2, metallic substrate surfaces preplating copper
At metallic substrate surfaces plating one deck copper material film;
Step 3, the lining of green lacquer
The lining of green lacquer is carried out at the metal substrate front and the back side accomplishing preplating copper material film respectively;
The green lacquer of part is removed at step 4, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 3 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 5, plating inert metal line layer
In step 4, electroplate the inert metal line layer in the zone of the green lacquer of metal substrate back side removal part;
Step 6, plated metal line layer
Inert metal line layer surface in step 5 plates multilayer or single-layer metal line layer;
Step 7, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
The green lacquer of part is removed at step 8, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 4 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 9, plated metal line layer
Metallic circuit laminar surface in step 6 plates multilayer or single-layer metal line layer;
Step 10, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
The green lacquer of part is removed at step 11, the metal substrate back side
The metal substrate back side that utilizes exposure imaging equipment that step 10 is accomplished green lacquer lining is carried out graph exposure, develops and is removed the green lacquer of part figure;
Step 12, be covered with the circuit web plate
Be covered with the circuit web plate at the metal substrate back side;
Step 13, metallization pre-treatment
Carry out the metallization pre-treatment of plated metal line layer at substrate back;
Step 14, remove the circuit web plate
The circuit web plate of step 12 is removed;
Step 15, plated metal line layer
Plate multilayer or single-layer metal line layer at the metal substrate back side;
Step 10 six, the lining of green lacquer
Carry out the lining of green lacquer at the back side of metal substrate;
Step 10 seven, metal substrate front face are removed the green lacquer of part
Utilize exposure imaging equipment that the metal substrate front is carried out graph exposure, develops and removed the green lacquer of part figure;
Step 10 eight, chemical etching
Chemical etching is carried out in the zone of accomplishing exposure imaging in the step 10 seven;
Step 10 nine, plated metal line layer
Plate the metallic circuit layer of individual layer or multilayer on inert metal line layer surface, promptly on metal substrate, form corresponding pin or Ji Dao and pin after metal plating is accomplished;
Step 2 ten, load and chip bottom are filled
Positive and pin front flip-chip and chip bottom filling epoxy resin on the positive or basic island of the pin of step 10 nine;
Step 2 11, seal
Plastic packaging material is carried out in metal substrate front behind the completion load routing seal operation;
Step 2 12, the perforate of the metal substrate back side
At the metal substrate back side perforate operation is carried out in the follow-up zone that will plant metal ball;
Step 2 13, cleaning
Tapping carries out the cleaning of oxidation material, organic substance at the metal substrate back side;
Step 2 14, plant ball
Green lacquer tapping is implanted into metal ball at the metal substrate back side;
Step 2 15, cutting finished product
Step 2 14 is accomplished the semi-finished product of planting ball carry out cutting operation; Make and originally integrate and to contain more than cuttings of plastic-sealed body module of chip independent with array aggregate mode; Encapsulate base island embedded encapsulating structure after making the etching of single-chip upside-down mounting elder generation, can adopt conventional diamond blade and conventional cutting equipment to get final product.
2. the three-dimensional circuit of flip-chip single face as claimed in claim 1 loses earlier and afterwards seals encapsulating structure; It is characterized in that it comprises pin (16); The positive upside-down mounting of said chip (9) is in pin (5) front; Be provided with underfill (8) between said chip (9) bottom and pin (15) front; The zone of the zone on the zone between said pin (15) and the pin (15), pin (15) top, pin (15) bottom and chip (9) are outer to be encapsulated with green lacquer (3) and plastic packaging material (10), offers aperture (11) on the green lacquer (3) at said pin (15) back side, and said aperture (11) is connected with pin (15) back side; Be provided with metal ball (13) in the said aperture (11), said metal ball (13) contacts with pin (15) back side.
3. the three-dimensional circuit of a kind of flip-chip single face according to claim 1 loses the manufacture method of afterwards sealing earlier, it is characterized in that: the 13 pairs of metal substrate back side of said step 2 tapping cleans and carries out the coat of metal lining simultaneously.
4. the three-dimensional circuit of a kind of flip-chip single face according to claim 2 loses earlier the encapsulating structure that afterwards seals; It is characterized in that: said encapsulating structure comprises Ji Dao (14); The positive upside-down mounting of said chip (9) is positive and pin (15) front in Ji Dao (14), is provided with underfill (8) between said chip (9) bottom and Ji Dao (14) front and pin (15) front.
CN201210189894.4A 2012-06-09 2012-06-09 Etching-first and packaging-later manufacturing method for chip inversion single-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit Active CN102723293B (en)

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