CN102723280B - Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit - Google Patents
Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit Download PDFInfo
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- CN102723280B CN102723280B CN201210188447.7A CN201210188447A CN102723280B CN 102723280 B CN102723280 B CN 102723280B CN 201210188447 A CN201210188447 A CN 201210188447A CN 102723280 B CN102723280 B CN 102723280B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
The invention relates to a flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and a packaging structure of a flip-chip single-face three-dimensional circuit. The method includes following steps: picking a metal substrate, pre-coppering the surface of the metal substrate, sticking photo-resistant films, removing part of the photo-resistant films on the back of the metal substrate, electroplating an inert metal circuit layer, electroplating a metal circuit layer, removing the photo-resistant films, packaging, processing a hole on the surface of plastic-packaged materials, grooving, electroplating conductive metal, pretreating before metallization, electroplating a metal circuit layer, chemically etching, electroplating a metal circuit layer, mounting a chip and filling at the bottom of the chip, cleaning, balling and cutting to obtain a finished product. The flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and the packaging structure of the flip-chip single-face three-dimensional circuit have the advantages that fabrication cost is lowered, safety and reliability of a packaged body is improved, environmental pollution is reduced, and design and fabrication of high-density circuits can be truly realized.
Description
Technical field
The present invention relates to the three-dimensional circuit flip-chip of a kind of one side and first lose rear envelope manufacture method and encapsulating structure thereof.Belong to semiconductor packaging field.
Background technology
The manufacturing process flow of traditional high-density base board encapsulating structure is as follows:
Step 1, referring to Figure 57, get the substrate that a glass fiber material is made,
Step 7, referring to Figure 63, photoresistance film is carried out to exposure imaging in the position of needs and windows,
Step 8, referring to Figure 64, carry out etching by completing the part of windowing,
Above-mentioned traditional high-density base board encapsulating structure has the following disadvantages and defect:
1, many glass fiber materials of one deck, same also many costs of layer of glass;
2, because must use glass fibre, so with regard to many thickness space of layer of glass thickness approximately 100 ~ 150 μ m;
3, glass fibre itself is exactly a kind of foaming substance, so easily because the time of placing and environment suck moisture and moisture, directly have influence on security capabilities or the reliability step of reliability;
4, fiberglass surfacing coating the Copper Foil metal layer thickness of one deck approximately 50 ~ 100 μ m, and the etching of metal level circuit and circuit distance is also because the characteristic of etching factor can only be accomplished the etched gap (etching factor: the ability of preferably manufacturing is the thickness that etched gap is approximately equal to etched object of 50 ~ 100 μ m, referring to Figure 69), so the design of accomplishing high-density line and manufacture that cannot be real;
5, because must use Copper Foil metal level, and Copper Foil metal level is the mode that adopts high pressure stickup, so the thickness of Copper Foil is difficult to the thickness lower than 50 μ m, otherwise is just difficult to operation as out-of-flatness or Copper Foil breakage or Copper Foil extension displacement etc.;
6, also because whole baseplate material is to adopt glass fiber material, thus significantly increased thickness 100 ~ 150 μ m of glass layer, cannot be real accomplish ultra-thin encapsulation;
7, the technology that traditional glass fiber is sticked on Copper Foil, because very large (coefficient of expansion) of material property difference easily causes stress deformation in the operation of adverse circumstances, directly has influence on precision and element and substrate adherence and reliability that element loads.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide the three-dimensional circuit flip-chip of a kind of one side first to lose rear envelope manufacture method and encapsulating structure thereof, its technique is simple, do not need to use glass layer, reduce cost of manufacture, improved the safety and reliability of packaging body, reduced the environmental pollution that glass fiber material brings, and metal substrate line layer adopt be electro-plating method, can really accomplish the Design and manufacture of high-density line.
The object of the present invention is achieved like this: the three-dimensional circuit flip-chip of a kind of one side is first lost rear envelope manufacture method, said method comprising the steps of:
Step 1, get metal substrate
At metallic substrate surfaces plating one deck copper material film;
Stick respectively the photoresistance film that can carry out exposure imaging at the metal substrate front and the back side that complete preplating copper material film;
Part photoresistance film is removed at step 4, the metal substrate back side
Part figure photoresistance film is carried out graph exposure, develops and removes at the metal substrate back side that utilizes exposure imaging equipment that step 3 is completed to the operation of subsides photoresistance film;
In step 4, in the region of metal substrate back side removal part photoresistance film, electroplate inert metal line layer;
Multilayer or single-layer metal line layer on inert metal line layer plated surface in step 5;
Step 7, removal photoresistance film
Step 8, seal
Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 7;
The photoresistance film that can carry out exposure imaging is sticked respectively at metal substrate front and the back side in step 8;
Seal in advance the surface of plastic packaging material at the metal substrate back side and carry out perforate operation;
Carry out the digging groove action of subsequent conditioning circuit line on plastic packaging material surface;
Electroplate one deck conducting metal at the metal substrate back side;
Carry out the metallization pre-treatment of plated metal line layer at substrate back;
The metal substrate back side in step 13 plates multilayer or single-layer metal line layer;
By the plastic packaging one deck plastic packaging material again of the metal substrate back side in step 15;
The photoresistance film that can carry out exposure imaging is sticked respectively at front and the back side at metal substrate;
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 10 seven is completed to the operation of subsides photoresistance film;
Chemical etching is carried out in the region that completes exposure imaging in step 10 eight;
Individual layer or the metallic circuit layer of multilayer on inert metal line layer plated surface form corresponding pin Huo Ji island and pin Huo Ji island, pin and static release ring on metal substrate after metal plating completes;
At front, the positive Huo Ji of pin island and pin front flip-chip and the chip bottom filling epoxy resin of step 2 ten;
Carry out plastic packaging material and seal operation completing metal substrate front after load;
The surface of sealing in advance plastic packaging material at the metal substrate back side is carried out the follow-up region that will plant Metal Ball and is carried out perforate operation;
At the metal substrate back side, plastic packaging material tapping carries out the cleaning of oxidation material, organic substance;
At the metal substrate back side, plastic-sealed body tapping is implanted into Metal Ball;
The present invention also provides the three-dimensional circuit flip-chip of a kind of one side first to lose rear envelope encapsulating structure, it comprises chip and pin, the positive upside-down mounting of described chip is in pin front, between described chip bottom and pin front, be provided with underfill, region between described pin and pin, the region on pin top, the region of pin bottom and chip and metal wire are all encapsulated with plastic packaging material outward, on the plastic packaging material at the described pin back side, offer second orifice, described second orifice is connected with the pin back side, in described second orifice, be provided with Metal Ball, described Metal Ball contacts with the pin back side.
15 pairs of metal substrate back side plastic packaging material tappings of described step 2 clean and carry out coat of metal coating simultaneously.
Described encapsulating structure comprises Ji Dao, and front, positive upside-down mounting Yu Ji island and the pin front of described chip, be provided with underfill between front, described chip bottom Yu Ji island and pin front.
Compared with prior art, the present invention has following beneficial effect:
1, the present invention does not need to use glass layer, so can reduce the cost that glass layer brings;
2, the present invention does not use the foaming substance of glass layer, so the grade of reliability can improve again, relatively will improve the fail safe of packaging body;
3, the present invention does not need to use glass layer material, so just can reduce the environmental pollution that glass fiber material brings;
What 4,3-dimensional metal substrate circuit layer of the present invention adopted is electro-plating method, and every one deck gross thickness of electrodeposited coating is about 10 ~ 15 μ m, and gap between circuit and circuit can reach the gap below 25 μ m easily, so can accomplish veritably the technical capability of high density Inner Yin Legs Line road tiling;
5,3-dimensional metal substrate of the present invention is metal level galvanoplastic because of what adopt, so the technique than glass fibre high pressure Copper Foil metal level is come simply, and do not have metal level because high pressure produces bad or puzzled that metal level out-of-flatness, metal level breakage and metal level extend and be shifted.
Accompanying drawing explanation
Fig. 1 ~ Figure 27 is each operation schematic diagram that the three-dimensional circuit flip-chip of one side of the present invention is first lost rear envelope manufacture method embodiment 1.
Figure 28 is the structural representation that the three-dimensional circuit flip-chip of one side of the present invention is first lost rear envelope encapsulating structure embodiment 1.
Figure 29 ~ Figure 55 is each operation schematic diagram that the three-dimensional circuit flip-chip of one side of the present invention is first lost rear envelope manufacture method embodiment 2.
Figure 56 is the structural representation that the three-dimensional circuit flip-chip of one side of the present invention is first lost rear envelope encapsulating structure embodiment 2.
Figure 57 ~ Figure 68 is the manufacturing process flow diagram of traditional high-density base board encapsulating structure.
Figure 69 is the etching situation schematic diagram of fiberglass surfacing Copper Foil metal level.
Wherein:
Metal substrate 1
Inert metal line layer 4
The first aperture 7
Groove 8
Coat of metal 13
Embodiment
The three-dimensional circuit flip-chip of a kind of one side of the present invention first lose rear envelope manufacture method and encapsulating structure as follows:
Embodiment mono-, Wu Ji island
Step 1, get metal substrate
Referring to Fig. 1, get the metal substrate that a slice thickness is suitable, the material of metal substrate can convert according to the function of chip and characteristic, for example: copper material, iron material, ferronickel material, zinc-iron material etc.
Referring to Fig. 2, at metallic substrate surfaces plating one deck copper material film, object is to do basis for follow-up plating.(mode of plating can adopt electroless plating or metallide).
Referring to Fig. 3, stick respectively the photoresistance film that can carry out exposure imaging at the metal substrate front and the back side that complete preplating copper material film, to protect follow-up electroplated metal layer process operation, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Part photoresistance film is removed at step 4, the metal substrate back side
Referring to Fig. 4, graph exposure is carried out, develops and removes part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side in the metal substrate back side that utilizes exposure imaging equipment that step 3 is completed to the operation of subsides photoresistance film.
Referring to Fig. 5, in step 4, in the region of metal substrate back side removal part photoresistance film, electroplate inert metal line layer, as the barrier layer of subsequent etch work, inert metal can adopt nickel or titanium or copper, and plating mode can make electroless plating or metallide mode.
Referring to Fig. 6, multilayer or single-layer metal line layer on inert metal line layer plated surface in step 5, described metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, copper material, and plating mode can be that electroless plating can be also the mode of metallide.
Step 7, removal photoresistance film
Referring to Fig. 7, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Step 8, seal
Referring to Fig. 8, adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 7, plastic packaging mode can adopt mould encapsulating mode, spraying method or use pad pasting mode.Described plastic packaging material can adopt packing material or the epoxy resin without packing material.
Referring to Fig. 9, stick respectively the photoresistance film that can carry out exposure imaging at metal substrate front and the back side of step 8, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Referring to Figure 10, seal in advance the surface of plastic packaging material at the metal substrate back side and carry out perforate operation, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out perforate.
Referring to Figure 11, carry out the digging groove action of subsequent conditioning circuit line on plastic packaging material surface, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out digging groove action.
Referring to Figure 12, electroplate one deck conducting metal at the metal substrate back side, plating mode can be that electroless plating can be also the mode of metallide.
Referring to Figure 13, carry out the metallization pre-treatment of plated metal line layer at substrate back, metallization pre-treatment can be used coating process (mode of spray pattern, mode of printing, showering mode, immersion etc.).
Referring to Figure 14, the metal substrate back side in step 13 plates multilayer or single-layer metal line layer, described metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, copper material, and plating mode can be that electroless plating can be also the mode of metallide.
Referring to Figure 15, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Referring to Figure 16, by the plastic packaging one deck plastic packaging material again of the metal substrate back side in step 15, plastic packaging mode can adopt mould encapsulating mode, spraying method or use pad pasting mode.Described plastic packaging material can adopt packing material or the epoxy resin without packing material.
Referring to Figure 17, stick respectively the photoresistance film that can carry out exposure imaging at front and the back side of metal substrate, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Referring to Figure 18, part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 10 seven is completed to the operation of subsides photoresistance film, to expose the positive follow-up regional graphics that need to carry out chemical etching of metal substrate.
Referring to Figure 19, chemical etching is carried out in the region that completes exposure imaging in step 10 eight, chemical etching is until inert metal line layer, and etching solution can adopt copper chloride or iron chloride.
Referring to Figure 20, individual layer or the metallic circuit layer of multilayer on inert metal line layer plated surface, after completing, metal plating on metal substrate, forms corresponding pin, coating kind can be copper nickel gold, copper nickeline, porpezite, gold or copper etc., and electro-plating method can be electroless plating or metallide.
Referring to Figure 21, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Referring to Figure 22, at pin front flip-chip and the chip bottom filling epoxy resin of step 2 ten.
Referring to Figure 23; carry out plastic packaging material and seal operation completing metal substrate front after load; object is to utilize epoxy resin that chip and metal wire are fixed and are protected; encapsulating method adopts mould encapsulating, spraying method Huo Shua Rubber mode to carry out, and plastic packaging material can adopt filler or packless epoxy resin.
Referring to Figure 24, the surface of sealing in advance plastic packaging material at the metal substrate back side is carried out the follow-up region that will plant Metal Ball and is carried out perforate operation, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out perforate.
Referring to Figure 25, at the metal substrate back side, plastic packaging material tapping carries out the cleaning of oxidation material, organic substance, can carry out the coating of coat of metal simultaneously, and coat of metal adopts oxidation-resistant material.
Referring to Figure 26, at the metal substrate back side, plastic-sealed body tapping is implanted into Metal Ball, Metal Ball is contacted with the pin back side, can adopt conventional ball attachment machine or adopt metal paste printing after high-temperature digestion, can form orbicule again, the material of Metal Ball can be pure tin or ashbury metal.
Referring to Figure 27, step 2 16 is completed to the semi-finished product of planting ball and carry out cutting operation, more than cuttings of plastic-sealed body module that script integrated and contain chip in array aggregate mode are independent, after making the first etching of single-chip upside-down mounting, encapsulate base island embedded encapsulating structure, can adopt conventional diamond blade and conventional cutting equipment.
As shown in figure 28, the present invention also provides the three-dimensional circuit flip-chip of a kind of one side first to lose the encapsulating structure of rear envelope, described encapsulating structure comprises chip 11 and pin 16, the positive upside-down mounting of described chip 11 is in pin 16 fronts, between described chip 11 bottoms and pin 16 fronts, be provided with underfill 10, region between described pin 16 and pin 16, the region on pin 16 tops, the outer plastic packaging material 6 that is all encapsulated with of the region of pin 16 bottoms and chip 11, on the plastic packaging material 6 at described pin 16 back sides, offer second orifice 12, described second orifice 12 is connected with pin 16 back sides, in described second orifice 12, be provided with Metal Ball 14, between described Metal Ball 14 and pin 16 back sides, be provided with coat of metal 13, described Metal Ball 14 adopts tin or tin alloy material.
Embodiment bis-, You Ji island
Step 1, get metal substrate
Referring to Figure 29, get the metal substrate that a slice thickness is suitable, the material of metal substrate can convert according to the function of chip and characteristic, for example: copper material, iron material, ferronickel material, zinc-iron material etc.
Referring to Figure 30, at metallic substrate surfaces plating one deck copper material film, object is to do basis for follow-up plating.(mode of plating can adopt electroless plating or metallide).
Referring to Figure 31, stick respectively the photoresistance film that can carry out exposure imaging at front and the back side of the metal substrate that completes preplating copper material film, to protect follow-up electroplated metal layer process operation, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Part photoresistance film is removed at step 4, the metal substrate back side
Referring to Figure 32, graph exposure is carried out, develops and removes part figure photoresistance film, the regional graphics of electroplating to expose the follow-up needs in the metal substrate back side in the metal substrate back side that utilizes exposure imaging equipment that step 3 is completed to the operation of subsides photoresistance film.
Referring to Figure 33, in step 4, in the region of metal substrate back side removal part photoresistance film, electroplate inert metal line layer, as the barrier layer of subsequent etch work, inert metal can adopt nickel or titanium or copper, and plating mode can make electroless plating or metallide mode.
Referring to Figure 34, multilayer or single-layer metal line layer on inert metal line layer plated surface in step 5, described metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, copper material, and plating mode can be that electroless plating can be also the mode of metallide.
Step 7, removal photoresistance film
Referring to Figure 35, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Step 8, seal
Referring to Figure 36, adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 7, plastic packaging mode can adopt mould encapsulating mode, spraying method or use pad pasting mode.Described plastic packaging material can adopt packing material or the epoxy resin without packing material.
Referring to Figure 37, stick respectively the photoresistance film that can carry out exposure imaging at metal substrate front and the back side of step 8, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Referring to Figure 38, seal in advance the surface of plastic packaging material at the metal substrate back side and carry out perforate operation, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out perforate.
Referring to Figure 39, carry out the digging groove action of subsequent conditioning circuit line on plastic packaging material surface, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out digging groove action.
Referring to Figure 40, electroplate one deck conducting metal at the metal substrate back side, plating mode can be that electroless plating can be also the mode of metallide.
Referring to Figure 41, carry out the metallization pre-treatment of plated metal line layer at substrate back, metallization pre-treatment can be used coating process (mode of spray pattern, mode of printing, showering mode, immersion etc.).
Referring to Figure 42, the metal substrate back side in step 13 plates multilayer or single-layer metal line layer, described metallic circuit layer can adopt one or more in golden nickel, copper nickel gold, copper NiPdAu, porpezite, copper material, and plating mode can be that electroless plating can be also the mode of metallide.
Referring to Figure 43, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Referring to Figure 44, by the plastic packaging one deck plastic packaging material again of the metal substrate back side in step 15, plastic packaging mode can adopt mould encapsulating mode, spraying method or use pad pasting mode.Described plastic packaging material can adopt packing material or the epoxy resin without packing material.
Referring to Figure 45, stick respectively the photoresistance film that can carry out exposure imaging at front and the back side of metal substrate, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film.
Referring to Figure 46, part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 10 seven is completed to the operation of subsides photoresistance film, to expose the positive follow-up regional graphics that need to carry out chemical etching of metal substrate.
Referring to Figure 47, chemical etching is carried out in the region that completes exposure imaging in step 10 eight, chemical etching is until inert metal line layer, and etching solution can adopt copper chloride or iron chloride.
Referring to Figure 48, individual layer or the metallic circuit layer of multilayer on inert metal line layer plated surface, after completing, metal plating on metal substrate, forms corresponding Ji Dao and pin, coating kind can be copper nickel gold, copper nickeline, porpezite, gold or copper etc., and electro-plating method can be electroless plating or metallide.
Referring to Figure 49, remove the photoresistance film of metallic substrate surfaces, adopt chemical medicinal liquid soften and adopt the mode that high pressure water jets is removed to remove photoresistance film.
Referring to Figure 50, positive and pin front flip-chip and chip bottom filling epoxy resin on step 2 Shi Ji island.
Referring to Figure 51; carry out plastic packaging material and seal operation completing metal substrate front after load; object is to utilize epoxy resin that chip and metal wire are fixed and are protected; encapsulating method adopts mould encapsulating, spraying method Huo Shua Rubber mode to carry out, and plastic packaging material can adopt filler or packless epoxy resin.
Referring to Figure 52, the surface of sealing in advance plastic packaging material at the metal substrate back side is carried out the follow-up region that will plant Metal Ball and is carried out perforate operation, can adopt dry laser sintering or the method for wet chemistry corrosion to carry out perforate.
Referring to Figure 53, at the metal substrate back side, plastic packaging material tapping carries out the cleaning of oxidation material, organic substance, can carry out the coating of coat of metal simultaneously, and coat of metal adopts oxidation-resistant material.
Referring to Figure 54, at the metal substrate back side, plastic-sealed body tapping is implanted into Metal Ball, Metal Ball is contacted with the pin back side, can adopt conventional ball attachment machine or adopt metal paste printing after high-temperature digestion, can form orbicule again, the material of Metal Ball can be pure tin or ashbury metal.
Referring to Figure 55, step 2 16 is completed to the semi-finished product of planting ball and carry out cutting operation, more than cuttings of plastic-sealed body module that script integrated and contain chip in array aggregate mode are independent, after making the first etching of single-chip upside-down mounting, encapsulate base island embedded encapsulating structure, can adopt conventional diamond blade and conventional cutting equipment.
As shown in Figure 56, the present invention also provides the three-dimensional circuit flip-chip of a kind of one side first to lose the encapsulating structure of rear envelope, described encapsulating structure comprises chip 11, base island 15 and pin 16, 15 front and pin 16 fronts, positive upside-down mounting Yu Ji island of described chip 11, between described chip 11 15 fronts, Yu Ji island, bottom and pin 16 fronts, be provided with underfill 10, the region of 15 peripheries, described base island, region between base island 15 and pin 16, region between pin 16 and pin 16, the region on base island 15 and pin 16 tops, the outer plastic packaging material 6 that is all encapsulated with of the region of base island 15 and pin 16 bottoms and chip 11, on the plastic packaging material 6 at described pin 16 back sides, offer second orifice 12, described second orifice 12 is connected with pin 16 back sides, in described second orifice 12, be provided with Metal Ball 14, between described Metal Ball 14 and pin 16 back sides, be provided with coat of metal 13, described Metal Ball 14 adopts tin or tin alloy material.
Claims (2)
1. the three-dimensional circuit flip-chip of one side is first lost a rear envelope manufacture method, said method comprising the steps of:
Step 1, get metal substrate
Step 2, the pre-copper facing of metallic substrate surfaces
At metallic substrate surfaces plating one deck copper material film;
Step 3, the operation of subsides photoresistance film
Stick respectively the photoresistance film that can carry out exposure imaging at the metal substrate front and the back side that complete preplating copper material film;
Part photoresistance film is removed at step 4, the metal substrate back side
Part figure photoresistance film is carried out graph exposure, develops and removes at the metal substrate back side that utilizes exposure imaging equipment that step 3 is completed to the operation of subsides photoresistance film;
Step 5, plating inert metal line layer
In step 4, in the region of metal substrate back side removal part photoresistance film, electroplate inert metal line layer;
Step 6, plated metal line layer
Multilayer or single-layer metal line layer on inert metal line layer plated surface in step 5;
Step 7, removal photoresistance film
Step 8, seal
Adopt plastic packaging material to carry out plastic packaging at the metal substrate back side in step 7;
Step 9, the operation of subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked respectively at metal substrate front and the back side in step 8;
Step 10, plastic packaging material surface perforate
Seal in advance the surface of plastic packaging material at the metal substrate back side and carry out perforate operation;
Step 11, digging groove
Carry out the digging groove action of subsequent conditioning circuit line on plastic packaging material surface;
Step 12, plated conductive metal
Electroplate one deck conducting metal at the metal substrate back side;
Step 13, metallization pre-treatment
Carry out the metallization pre-treatment of plated metal line layer at substrate back;
Step 14, plated metal line layer
The metal substrate back side in step 13 plates multilayer or single-layer metal line layer;
Step 15, removal photoresistance film
Step 10 six, seal
By the plastic packaging one deck plastic packaging material again of the metal substrate back side in step 15;
Step 10 seven, the operation of subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked respectively at front and the back side at metal substrate;
Step 10 eight, the positive part photoresistance film of removing of metal substrate
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 10 seven is completed to the operation of subsides photoresistance film;
Step 10 nine, chemical etching
Chemical etching is carried out in the region that completes exposure imaging in step 10 eight;
Step 2 ten, plated metal line layer
Individual layer or the metallic circuit layer of multilayer on inert metal line layer plated surface form corresponding pin Huo Ji island and pin Huo Ji island, pin and static release ring on metal substrate after metal plating completes;
Step 2 11, removal photoresistance film
Step 2 12, load and chip bottom are filled
At front, the positive Huo Ji of pin island and pin front flip-chip and the chip bottom filling epoxy resin of step 2 ten;
Step 2 13, seal
Carry out plastic packaging material and seal operation completing metal substrate front after load;
Step 2 14, plastic packaging material surface perforate
The surface of sealing in advance plastic packaging material at the metal substrate back side is carried out the follow-up region that will plant Metal Ball and is carried out perforate operation;
Step 2 15, cleaning
At the metal substrate back side, plastic packaging material tapping carries out the cleaning of oxidation material, organic substance;
Step 2 16, plant ball
At the metal substrate back side, plastic-sealed body tapping is implanted into Metal Ball;
Step 2 17, cutting finished product
Step 2 16 is completed to the semi-finished product of planting ball and carry out cutting operation, make more than cuttings of plastic-sealed body module of originally integrating in array aggregate mode and containing chip independent, encapsulate base island embedded encapsulating structure after making the etching of single-chip upside-down mounting elder generation.
2. the three-dimensional circuit flip-chip of a kind of one side according to claim 1 is first lost the manufacture method of rear envelope, it is characterized in that: 15 pairs of metal substrate back side plastic packaging material tappings of described step 2 clean and carry out coat of metal coating simultaneously.
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| CN201210188447.7A CN102723280B (en) | 2012-06-09 | 2012-06-09 | Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit |
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| CN103298275B (en) * | 2013-05-20 | 2015-08-26 | 江苏长电科技股份有限公司 | Metal frame multilayer wiring board first plates rear erosion metallic circuit subtractive processes method |
| CN103325691A (en) * | 2013-05-20 | 2013-09-25 | 江苏长电科技股份有限公司 | Technological method for plating and etching multilayer circuit substrate of metal frame |
| CN103311132B (en) * | 2013-05-20 | 2015-08-26 | 江苏长电科技股份有限公司 | Plating-then-etchingtechnical technical method for multi-layer circuit substrate with metal frame |
| CN103400769B (en) * | 2013-08-06 | 2016-08-17 | 江阴芯智联电子科技有限公司 | First lose and seal three-dimensional systematic flip-chip bump packaging structure and process afterwards |
| CN103400768B (en) * | 2013-08-06 | 2015-11-18 | 江苏长电科技股份有限公司 | First lose and seal three-dimensional systematic chip formal dress encapsulating structure and process afterwards |
| CN103400778B (en) * | 2013-08-06 | 2016-03-30 | 江苏长电科技股份有限公司 | First lose and seal passive device three-dimensional systematic metal circuit board structure &processes method afterwards |
| CN104576406B (en) * | 2014-12-29 | 2017-12-22 | 华进半导体封装先导技术研发中心有限公司 | A kind of preparation method of package substrate and corresponding package substrate |
| CN110364444A (en) * | 2019-08-01 | 2019-10-22 | 合肥矽迈微电子科技有限公司 | Attached metal wrapping encapsulating structure in three faces and preparation method thereof |
| CN113192898A (en) * | 2021-04-02 | 2021-07-30 | 江阴苏阳电子股份有限公司 | Packaging process of back pre-etched bump type packaging structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1691314A (en) * | 2004-04-21 | 2005-11-02 | 美龙翔微电子科技（深圳）有限公司 | Flip ball grid array packaging base plate and making technique thereof |
| CN101840901A (en) * | 2010-04-30 | 2010-09-22 | 江苏长电科技股份有限公司 | Lead frame structure of static release ring without paddle and production method thereof |
| CN102005432A (en) * | 2010-09-30 | 2011-04-06 | 江苏长电科技股份有限公司 | Packaging structure with four pin-less sides and packaging method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4373122B2 (en) * | 2003-04-28 | 2009-11-25 | 大日本印刷株式会社 | Resin-sealed semiconductor device and manufacturing method thereof |
-
2012
- 2012-06-09 CN CN201210188447.7A patent/CN102723280B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1691314A (en) * | 2004-04-21 | 2005-11-02 | 美龙翔微电子科技（深圳）有限公司 | Flip ball grid array packaging base plate and making technique thereof |
| CN101840901A (en) * | 2010-04-30 | 2010-09-22 | 江苏长电科技股份有限公司 | Lead frame structure of static release ring without paddle and production method thereof |
| CN102005432A (en) * | 2010-09-30 | 2011-04-06 | 江苏长电科技股份有限公司 | Packaging structure with four pin-less sides and packaging method thereof |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2004-327903A 2004.11.18 |
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