CN102709257A - 半导体塑封料及其制造方法和半导体封装件 - Google Patents

半导体塑封料及其制造方法和半导体封装件 Download PDF

Info

Publication number
CN102709257A
CN102709257A CN201210142532XA CN201210142532A CN102709257A CN 102709257 A CN102709257 A CN 102709257A CN 201210142532X A CN201210142532X A CN 201210142532XA CN 201210142532 A CN201210142532 A CN 201210142532A CN 102709257 A CN102709257 A CN 102709257A
Authority
CN
China
Prior art keywords
plastic packaging
packaging material
semiconductor package
package part
inserts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201210142532XA
Other languages
English (en)
Other versions
CN102709257B (zh
Inventor
杜茂华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
Original Assignee
Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Semiconductor China R&D Co Ltd, Samsung Electronics Co Ltd filed Critical Samsung Semiconductor China R&D Co Ltd
Priority to CN201210142532.XA priority Critical patent/CN102709257B/zh
Publication of CN102709257A publication Critical patent/CN102709257A/zh
Priority to KR1020130033092A priority patent/KR20130126464A/ko
Priority to US13/890,735 priority patent/US20130299981A1/en
Application granted granted Critical
Publication of CN102709257B publication Critical patent/CN102709257B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08LCOMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L101/00Compositions of unspecified macromolecular compounds
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K9/00Use of pretreated ingredients
    • C08K9/04Ingredients treated with organic substances
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08LCOMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L63/00Compositions of epoxy resins; Compositions of derivatives of epoxy resins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/26Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device including materials for absorbing or reacting with moisture or other undesired substances, e.g. getters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Medicinal Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Health & Medical Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Compositions Of Macromolecular Compounds (AREA)

Abstract

本发明公开了一种用于半导体封装件的塑封料及其制造方法以及半导体封装件。所述塑封料包括:塑封料树脂;填充料,填充在塑封料树脂中;吸水材料,覆盖在填充料的外表面上。根据本发明的塑封料可以吸附半导体封装件中的潮气,从而提高半导体封装件的可靠性。

Description

半导体塑封料及其制造方法和半导体封装件
技术领域
本发明涉及一种半导体塑封料及其制造方法以及使用该半导体塑封料的半导体封装件。更具体地讲,本发明涉及一种具有高可靠性的半导体塑封料及其制造方法以及使用该半导体塑封料的半导体封装件。
背景技术
随着信息技术的发展,人们对半导体封装件的需求越来越多。图1是示出了根据现有技术的半导体封装件的示意性剖视图。参照图1,半导体封装件包括:基板5;贴片胶4,位于基板5上方;芯片3,位于基板5上方,通过贴片胶4与基板5粘合在一起;键合引线6,将芯片3与基板5电连接;塑封料树脂1,用于包封芯片,并且在塑封料树脂1中填充有大量填充料2;焊球7,半导体封装件通过焊球7与外部电路连接。
在图1示出的半导体封装件中,由于基板5和塑封料树脂1通常由有机材料制成,所以存在水汽吸附和扩散的问题。当芯片区存在缺陷,特别是存在孔洞缺陷时,随着水汽的聚集,在高温情况下,会造成芯片功能失效。
因此,需要一种提高了防水性能的半导体封装件。
发明内容
为了克服现有技术中的上述问题,本发明提供了一种用于半导体封装件的塑封料。所述塑封料包括:塑封料树脂;填充料,填充在塑封料树脂中;吸水材料,覆盖在填充料的外表面上。
优选地,所述吸水材料为高分子吸水树脂。更优选地,所述吸水材料为聚丙烯酸盐类聚合物、聚乙烯醇类聚合物、醋酸乙烯酯共聚物或聚丙烯腈水解物。
根据本发明,所述填充料可以为二氧化硅颗粒,所述塑封料树脂可以为环氧树脂。
优选地,所述吸水材料的厚度小于5μm。
此外,本发明提供了一种制造用于半导体封装件的塑封料的方法,所述方法包括以下步骤:将填充料浸入液态的吸水材料中;待填充料表面吸附有吸水材料后取出;通过离心机换转来控制吸水材料的厚度;对吸附有吸水材料的填充料进行干燥。
另外,本发明还提供了一种半导体封装件,所述半导体封装件包括:基板;贴片胶,位于基板上方;芯片,位于基板上方,通过贴片胶与基板粘合在一起;键合引线,将芯片与基板电连接;塑封料,包封芯片;焊球,将半导体封装件与外部电路连接,其中,所述塑封料包括塑封料树脂、填充在塑封料树脂中的填充料以及覆盖在填充料的外表面上的吸水材料。
根据本发明的塑封料可以吸附半导体封装件中的潮气,从而提高半导体封装件的可靠性。
附图说明
通过结合附图对示例性实施例进行详细地描述,本发明的特点和优点将会变得更加清楚。在附图中:
图1是示出根据现有技术的半导体封装件的示意性剖视图;
图2是示出根据本发明示例性实施例的半导体封装件的示意性剖视图。
具体实施方式
在下文中,将参照附图详细描述根据本发明的示例性实施例。
本发明的半导体塑封料包括塑封料树脂和填充在塑封料树脂中的填充料。此外,在填充料的外表面上覆盖有具有高吸水性的吸水材料。
图2是示出根据本发明示例性实施例的半导体封装件的示意性剖视图。参照图2,根据本发明示例性实施例的半导体封装件包括:基板5;贴片胶4,位于基板5上方;芯片3,位于基板5上方,通过贴片胶4与基板5粘合在一起;键合引线6,将芯片3与基板5电连接;塑封料,包封并保护上述元件;焊球7,半导体封装件通过焊球7与外部电路连接。
根据本发明,塑封料包括塑封料树脂1,在塑封料树脂1中填充有大量填充料2,并且在填充料2的外表面上涂覆有吸水材料8。
根据本发明的示例性实施例,通过在填充料2的外表面上涂覆吸水材料8,在水汽进入半导体封装件之后,水汽迅速被覆盖于填充料2外表面的吸水材料8吸收,使得水汽无法到达芯片区域,从而保障了芯片区域的安全。
根据本发明的示例性实施例,吸水材料8可以为各种吸水材料,例如可以为高分子吸水树脂。为了获得良好的吸水效果,吸水材料8可以为具有高吸水性能的聚丙烯酸盐类聚合物、聚乙烯醇类聚合物、醋酸乙烯酯共聚物或聚丙烯腈水解物。
下面,将详细描述根据本发明示例性实施例的半导体封装件的塑封料的制造方法。首先,将填充料浸入液态的吸水材料中,待填充料表面吸附有吸水材料后取出。然后,通过离心机旋转来调节所覆盖的吸水材料的厚度,优选地,吸水材料的厚度小于5μm,更加优选地,吸水材料的厚度为1~2μm。接下来,对覆盖有吸水材料的填充料进行干燥,将干燥后的覆盖有合适厚度的吸水材料的填充料与塑封料树脂混合,加热,固化,成型,从而得到适合用于半导体封装件的塑封料。
根据本发明的示例性实施例,填充料可以为二氧化硅颗粒,但本发明不限于此。
根据本发明的示例性实施例,塑封料树脂可以为环氧树脂,但本发明不限于此。
根据本发明的塑封料可以保护芯片区域不受水汽的影响,从而提高半导体封装件的可靠性,特别是可以提高半导体封装件在潮湿环境下的可靠性。
以上参照附图详细描述了本发明,但是在不脱离本发明范围的情况下,可以进行各种变形和修改。

Claims (8)

1.一种用于半导体封装件的塑封料,其特征在于所述塑封料包括:
塑封料树脂;
填充料,填充在塑封料树脂中;
吸水材料,覆盖在填充料的外表面上。
2.根据权利要求1所述的用于半导体封装件的塑封料,其特征在于,所述吸水材料为高分子吸水树脂。
3.根据权利要求2所述的用于半导体封装件的塑封料,其特征在于,所述吸水材料为聚丙烯酸盐类聚合物、聚乙烯醇类聚合物、醋酸乙烯酯共聚物或聚丙烯腈水解物。
4.根据权利要求1所述的用于半导体封装件的塑封料,其特征在于,所述填充料为二氧化硅颗粒。
5.根据权利要求1所述的用于半导体封装件的塑封料,其特征在于,所述塑封料树脂是环氧树脂。
6.根据权利要求1所述的用于半导体封装件的塑封料,其特征在于,所述吸水材料的厚度小于5μm。
7.一种制造用于半导体封装件的塑封料的方法,其特征在于,所述方法包括以下步骤:
将填充料浸入液态的吸水材料中;
待填充料表面吸附有吸水材料后取出;
通过离心机换转来控制吸水材料的厚度;
对吸附有吸水材料的填充料进行干燥。
8.一种半导体封装件,其特征在于所述半导体封装件包括:
基板;
贴片胶,位于基板上方;
芯片,位于基板上方,通过贴片胶与基板粘合在一起;
键合引线,将芯片与基板电连接;
塑封料,包封芯片;
焊球,将半导体封装件与外部电路连接,
其中,所述塑封料包括塑封料树脂、填充在塑封料树脂中的填充料以及覆盖在填充料的外表面上的吸水材料。
CN201210142532.XA 2012-05-10 2012-05-10 半导体塑封料及其制造方法和半导体封装件 Active CN102709257B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201210142532.XA CN102709257B (zh) 2012-05-10 2012-05-10 半导体塑封料及其制造方法和半导体封装件
KR1020130033092A KR20130126464A (ko) 2012-05-10 2013-03-27 몰딩 조성물 및 이를 포함하는 반도체 패키지
US13/890,735 US20130299981A1 (en) 2012-05-10 2013-05-09 Molding material, method of fabricating the same, and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210142532.XA CN102709257B (zh) 2012-05-10 2012-05-10 半导体塑封料及其制造方法和半导体封装件

Publications (2)

Publication Number Publication Date
CN102709257A true CN102709257A (zh) 2012-10-03
CN102709257B CN102709257B (zh) 2015-08-19

Family

ID=46901916

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210142532.XA Active CN102709257B (zh) 2012-05-10 2012-05-10 半导体塑封料及其制造方法和半导体封装件

Country Status (2)

Country Link
KR (1) KR20130126464A (zh)
CN (1) CN102709257B (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016026203A1 (zh) * 2014-08-20 2016-02-25 京东方科技集团股份有限公司 电子封装器件及其制备方法、封装效果检测方法
US9882133B2 (en) 2014-08-20 2018-01-30 Boe Technology Group Co., Ltd. Electronic package device for testing a package effect of the device, fabrication method thereof and method for testing electronic package device
CN110914374A (zh) * 2017-07-04 2020-03-24 阿科玛法国公司 用于电子器件的保护的吸收性材料

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1155250A (zh) * 1994-08-01 1997-07-23 伦纳德·珀尔斯坦恩 高效超吸水剂和具有吸水剂的吸水装置
US5939792A (en) * 1996-10-09 1999-08-17 Kabushiki Kaisha Toshiba Resin-mold type semiconductor device
US20080121725A1 (en) * 2006-11-28 2008-05-29 Semiconductor Energy Laboratory Co., Ltd. Memory device and semiconductor device
CN101828434A (zh) * 2007-10-18 2010-09-08 日立化成工业株式会社 粘接剂组合物和使用其的电路连接材料、以及电路部件的连接方法和电路连接体

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1155250A (zh) * 1994-08-01 1997-07-23 伦纳德·珀尔斯坦恩 高效超吸水剂和具有吸水剂的吸水装置
US5939792A (en) * 1996-10-09 1999-08-17 Kabushiki Kaisha Toshiba Resin-mold type semiconductor device
US20080121725A1 (en) * 2006-11-28 2008-05-29 Semiconductor Energy Laboratory Co., Ltd. Memory device and semiconductor device
CN101828434A (zh) * 2007-10-18 2010-09-08 日立化成工业株式会社 粘接剂组合物和使用其的电路连接材料、以及电路部件的连接方法和电路连接体

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016026203A1 (zh) * 2014-08-20 2016-02-25 京东方科技集团股份有限公司 电子封装器件及其制备方法、封装效果检测方法
US9882133B2 (en) 2014-08-20 2018-01-30 Boe Technology Group Co., Ltd. Electronic package device for testing a package effect of the device, fabrication method thereof and method for testing electronic package device
CN110914374A (zh) * 2017-07-04 2020-03-24 阿科玛法国公司 用于电子器件的保护的吸收性材料

Also Published As

Publication number Publication date
KR20130126464A (ko) 2013-11-20
CN102709257B (zh) 2015-08-19

Similar Documents

Publication Publication Date Title
CN101989555B (zh) 模造成型的影像传感器封装结构制造方法及封装结构
CN104458101B (zh) 侧通气压力传感器装置
CN100424845C (zh) 半导体器件及其制造方法
CN203238029U (zh) 具有降低封装应力结构的mems元件
CN102709257A (zh) 半导体塑封料及其制造方法和半导体封装件
JP6902857B2 (ja) 封止材を備えた電気的装置
CN106571345A (zh) 一种封装结构、其制备方法与包含其的光电设备
CN103794576A (zh) 一种封装结构及封装方法
KR20150059068A (ko) 반도체 패키지
CN101471307B (zh) 半导体封装体及其制造方法
EP3234997A1 (en) Exposed-die mold package for a sensor and method for encapsulating a sensor that interacts with the environment
CN104752189A (zh) 一种wlcsp晶圆背面减薄工艺
US8299587B2 (en) Lead frame package structure for side-by-side disposed chips
CN103515333A (zh) 半导体封装结构
CN111128918B (zh) 一种芯片封装方法及芯片
CN104465790A (zh) Mems压力传感器及其封装方法
CN101295697A (zh) 半导体封装构造
KR100400028B1 (ko) 칩-온-칩 구조의 전력용 반도체소자
JP2009224742A (ja) 半導体のパッケージング方法
CN201134426Y (zh) 芯片封装结构
CN104576414A (zh) 一种倒装焊耐潮湿防护工艺方法
CN218371756U (zh) 半导体封装结构
CN219286420U (zh) 一种3d传感芯片及其封装结构
CN103489835A (zh) 安全芯片及封装方法
CN203312297U (zh) 一种板载芯片模组

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant