CN102694557A - Multi-channel demodulation signal processing platform based on CPCI (compact programmable communication interface) - Google Patents
Multi-channel demodulation signal processing platform based on CPCI (compact programmable communication interface) Download PDFInfo
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Abstract
The invention discloses a multi-channel demodulation signal processing platform based on a CPCI (compact programmable communication interface). The demodulation signal processing platform comprises a multi-channel intermediate-frequency signal receiving module; the multi-channel intermediate-frequency signal receiving module can be connected with at least one A/D (analog/digital) conversion module and at least one DDC (direct digital control) digital down converter module; the DDC digital down converter module is connected with an FPGA (field programmable gate array) module; and the FPGA module is connected with a DSP (digital signal processor) module and a CPCI module. By using the multi-channel demodulation signal processing platform based on the CPCI, which is provided by the invention, the analog signal reception and the digital signal sending are integrated into a whole; the parallel and independent A/D conversion module and a DDC digital down converter passage are adopted; at least one intermediate-frequency signal of satellite mobile communication can be received; the multi-channel demodulation signal processing is realized; and the signal processing platform is compatible with signal processing techniques with different modes, different systems and different speed rates, and has stronger practicability.
Description
Technical field
The present invention relates to the signal processing field, particularly a kind of multichannel demodulation signal processing platform based on the CPCI interface.
Background technology
Satellite mobile communication is exactly to utilize the communication of carrying out then in the satellite conduct between the radio communication station that (comprises in ground and the lower atmosphere layer) on the earth.The frequency of suitable satellite communication is 1---10GHz frequency range, i.e. microwave frequency band.In order to satisfy increasing demand, begun one's study and used new frequency range, like 12GHz, 14GHz, 20GHz and 30GHz.At microwave band, the working band width of whole communication satellite is about 50OMHz, for the ease of amplifying, launch and reducing to modify tone and disturb, several transponders is set on satellite generally, and the working band width of each transponder is 36MHz or 72MHz.
The frequency division multiple access technology is adopted in present satellite communication more, and different earth stations takies different frequencies, promptly adopts different carrier waves, point-to-point, jumbo communication system that frequency division multiple access is suitable for.In recent years; Because time division multiple access has series of advantages than frequency division multiple access; As can not produce Intermodulation Interference, need not utilize down-conversion each earth station signal separately, be fit to digital communication, can be according to the variation distribution according to need of traffic carrying capacity, can adopt digital speech interpolation that capacity is increased by 500 etc.; Gradually adopted tdma, promptly each earth station takies identical frequency band, but takies different time slots.Another kind of multiple access technology is code division multiple access (CDMA), and promptly different earth stations takies same frequency and same time, but has different random codes to distinguish different address.Code division multiple access has adopted spread spectrum communication technology, but have antijamming capability strong, advantage such as the flexible dispatching of secure communication ability preferably speech channel arranged; Its shortcoming is that the availability of frequency spectrum is lower.Code division multiple access is suitable for the system that capacity is little, distribute extensively, have certain security requirements.
To the characteristics of above-mentioned satellite-signal, existing satellite-signal processing platform is the specific requirement according to satellite communication system, adopts wherein a kind of suitable multiple access technology to design, and can not realize that multiple technologies are compatible simultaneously to satisfy higher demand; On the other hand, existing satellite-signal processing platform does not carry out the bandwidth signal filtering extraction, can not realize the multi channel signals processing.
Software radio is to be support with general a, standard, modular hardware platform, realizes the various functional modules of radio station through software programming, and various functional modules are combined into radio system on demand.Software radio from traditional based on hardware, towards the Radio Design method of purposes, free.Adopting software and radio technique to carry out the design of satellite-signal processing platform is the communication technology of satellite Development Trend.
Summary of the invention
The objective of the invention is to overcome existing above-mentioned deficiency in the prior art; A kind of multichannel demodulation signal processing platform based on the CPCI interface is provided; This demodulation signal processing platform can compatible previous generation, emission and satellite-signal of future generation now; The signal processing technology of compatible different systems, different system, different rates realizes the multichannel demodulation signal processing.
In order to realize the foregoing invention purpose, the invention provides following technical scheme:
Multichannel demodulation signal processing platform based on the CPCI interface; This demodulation signal processing platform comprises multichannel intermediate-freuqncy signal receiver module; Be used to receive the multichannel analog intermediate frequency signal; Said multichannel intermediate-freuqncy signal receiver module comprises the difference radio frequency receiver, and said difference radio frequency receiver is used for the different IF analog signal that receives is exported with the intermediate frequency analog difference signal;
At least one A/D modular converter, said A/D modular converter comprises four A/D converters, the A/D modular converter is used to accomplish the digital translation of analog intermediate frequency signal;
At least one DDC digital down converter module; Said DDC digital down converter module comprises digital controlled oscillator; Said digital controlled oscillator connects cascade integral comb filter; Said cascade integral comb filter connects half-band filter, and said half-band filter connecting channel multiphase filter group, said DDC digital down converter module are used for filtering, signal adjustment and down-converted;
With the FPGA module that said at least one DDC digital down converter module is connected, said FPGA module is used to accomplish format conversion, semi-band filtering, demodulation, the decoding function of digital signal;
DSP module that is connected with the FPGA module respectively and CPCI interface module, said DSP module is used to accomplish computing, the analysis of digital signal, and signal is configured computing, digital demodulation processing, and the CPCI interface module is used for output information;
Said A/D modular converter is connected with DDC digital down converter module with the direct-current coupling mode; Said DDC digital down converter module is connected through input control, output signal, control signal with the FPGA module, and said FPGA module is connected with the DSP module with multi-channel synchronous serial ports form through the direct-current coupling mode.
Further, the input clock of said A/D modular converter is provided through connector by external clock.
Further, said FPGA module also is connected with FIFO, and said FIFO is used for data cached.
Compared with prior art, beneficial effect of the present invention:
1, the multichannel demodulation signal processing platform based on the CPCI interface of the present invention; Be that an integrated analog signal receives the integrated treatment platform that is sent as one with digital signal; That this demodulation signal processing platform has adopted is parallel, independently A/D modular converter and digital down converter passage; Can receive the intermediate-freuqncy signal of at least one road satellite mobile communication, realize the multichannel demodulation signal processing.
2, this signal processing platform adopts software and radio technique; Through to FPGA module and DSP module programming, software upgrading; Realize the expansion of signal processing platform function, make signal processing platform can compatible previous generation, emission and satellite-signal of future generation now, the signal processing technology of compatible different systems, different system, different rates; Have stronger practicality, can satisfy higher demand.
Description of drawings:
The transmission of Fig. 1 satellite communication system signal, process flow block diagram;
Fig. 2 signal processing platform block diagram of the present invention;
Fig. 3 multichannel intermediate-freuqncy signal receiver module theory diagram;
Fig. 4 DDC digital down converter module principle block diagram;
Fig. 5 DDC digital down converter module and FPGA module catenation principle block diagram;
Fig. 6 FPGA module and DSP module catenation principle block diagram;
Fig. 7 A/D modular converter and FPGA module catenation principle block diagram;
Fig. 8 FPGA module and CPCI interface catenation principle block diagram.
Embodiment
Below in conjunction with Test Example and embodiment the present invention is made further detailed description.But should this be interpreted as that the scope of the above-mentioned theme of the present invention only limits to following embodiment, allly all belong to scope of the present invention based on the technology that content of the present invention realized.
With reference to figure 1, different satellites sends the intermediate-freuqncy signal in difference (path), the different IF signal receiving antenna with the intermediate-freuqncy signal in different (paths) through downlink transmission to earth station; The faint intermediate-freuqncy signal of the difference that earth station will receive (path) transfers to different low noise amplifier modules, to guarantee to receive quality of signals; The intermediate-freuqncy signal of the difference (path) that warp amplifies is carried out frequency translation through the low-converter corresponding with low noise amplifier module again, signal is amplified once more the intermediate-freuqncy signal of output 70MHz or 140MHz; Difference (path) intermediate-freuqncy signal of further amplifying carries out obtaining corresponding information behind demodulation, the coding through the demodulator signal processing platform, and exports this information.
With reference to figure 2; The multichannel demodulation signal processing platform based on the CPCI interface that present embodiment is enumerated comprises multichannel intermediate-freuqncy signal receiver module, at least one A/D modular converter, at least one DDC digital down converter module, FPGA module, DSP module, reaches the CPCI interface module; Said multichannel intermediate-freuqncy signal receiver module can receive the different IF analog signal; An A/D modular converter comprises four A/D converters; An A/D modular converter is connected with a DDC digital down converter module, and DDC digital down converter module connects FPGA.Wherein, Said A/D modular converter is connected with DDC digital down converter module with the direct-current coupling mode; Said DDC digital down converter module is connected with the FPGA module through signal; Said FPGA module is connected with the DSP module with multi-channel synchronous serial ports form through the direct-current coupling mode, and the FPGA module is connected with the CPCI interface through interface circuit.
In the present embodiment; The A/D modular converter adopts the A/D6645 of ADI company as the analog sampling chip; The DDC digital down converter adopts the ISL5416 of InterSil company, and the FPGA module adopts the integrated programmable logic chip XC5VLX330T of XILINX company, and the DSP module is selected the TMS320C6455 of TI company for use; Switching network through FPGA module and DSP module makes data-signal and global network carry out synchronous exchange, and the CPCI interface adopts the PCI9054 device that uses programmable logic device.CPCI (Compact Peripheral Component Interconnect) has high opening, high reliability, hot-swappable, has higher bandwidth, has favorable compatibility.
The workflow that the present invention is based on the multichannel demodulation signal processing platform of CPCI interface is: multichannel intermediate-freuqncy signal receiver module with the different IF analog signal transmission that receives to the A/D modular converter; The A/D modular converter is to transfer to DDC digital down converter module after the digital signal with the different IF analog signal conversion; DDC digital down converter module is carried out filtering, signal adjustment and down-converted to this digital signal, transfers to the FPGA module then, and the FPGA module is carried out format conversion, semi-band filtering, demodulation, decoding to the digital signal through down-converted; Transfer to the DSP module then; The DSP module is accomplished computing, the analysis of this digital signal, is configured computing, digital demodulation processing, and the signal after the processing is back to the FPGA module again; Signal after this is handled is exported through the CPCI interface after the FPGA module filtered; The CPCI interface is connected to computer and disk array, and this information is stored in the computer disk array through the RAID RAID card, makes things convenient for researcher's research.
Respectively form module and each the module annexation that the present invention is based on the multichannel demodulation signal processing platform of CPCI interface specifically describe as follows:
With reference to figure 3; Multichannel intermediate-freuqncy signal receiver module comprises tuner and difference radio frequency receiver; Analog intermediate frequency signal is received by tuner; The difference radio frequency receiver should be with the output of intermediate frequency analog difference signal with analog intermediate frequency signal, and this intermediate frequency analog difference signal transfers to the A/D modular converter through after the impedance conversion.The input clock of A/D modular converter is provided by external clock; In the present embodiment, the input clock of A/D modular converter is provided through connector by outside 10MHz clock, and A/D modular converter sampling clock requires quality high; And phase noise is low; If the clock signal shake is bigger, signal to noise ratio worsens easily, is difficult to guarantee the precision of efficiently sampling figure place.In order to optimize performance, the clock input of difference low jitter is adopted in the clock input of A/D modular converter, input clock is treated to PECL (Positive Emitter Coupled Logic) signal, through being ac-coupled to the A/D modular converter.
With reference to figure 4, said DDC digital down converter module comprises digital controlled oscillator, cascade integral comb filter (CIC), and said cascade integral comb filter connects half-band filter (HB), said half-band filter connecting channel multiphase filter group.Multiply each other from the digital intermediate frequency signal of A/D modular converter output and the local oscillation signal of digital controlled oscillator generation; This digital intermediate frequency signal is down-converted to zero intermediate frequency signals; This zero intermediate frequency signals is passed through cascade integral comb filter, half-band filter and channelizing multiphase filter group more successively; Carry out filtering extraction, evenly be divided into the output of plurality of sub band signal to broadband signal simultaneously, accomplish DDC digital down converter module down-conversion, filtering, the signal adjustment of intermediate-freuqncy signal are handled.This DDC digital down converter module combines traditional filtering with the channelizing multiphase filtering, realize the multi channel signals processing.
A DDC digital down converter module has A, B, C, four passage input ports of D; An A/D modular converter comprises A, B, C, four A/D converters of D; Wherein A sheet A/D converter is connected to the A channel input port of DDC digital down converter module; B sheet A/D converter is connected to the B passage input port of DDC digital down converter module; C sheet A/D converter is connected to the C-channel input port of DDC digital down converter module, and D sheet A/D converter is connected to the D passage input port of DDC digital down converter module.
The output level of A/D modular converter, DDC digital down converter module is 3.3V, adopts the direct-current coupling mode to connect.A/D modular converter dateout bit width is 14, and DDC digital down converter module data input bit width is 17.The A/D modular converter is output as TWOS complement code form, because data bit width is to uneven, so the A/D modular converter is alignd according to highest order with the data of DDC digital down converter module, the unnecessary low level of DDC digital down converter module is drop-down.
With reference to figure 5, the interconnection of DDC digital down converter module and FPGA module comprises input control interconnection, output signal interconnection, the control signal interconnection of DDC digital down converter module.
DDC digital down converter module comprises that four inputs enable and FPGA modules import control and interconnect, and every DDC digital down converter module takies 4 3.3V I/O pins of FPGA module altogether.
In the present embodiment, the output signal of DDC digital down converter module comprises A, B, C, four dateout passages of D, and each dateout passage divided data enables, frame synchronization enables, three types of output enables.The output signal of DDC digital down converter module also provides one road VGA/ decay control output channel and two output clock pins, and the signal that DDC digital down converter module is connected on the FPGA module comprises A, B, C, four dateout passages of D and two output clock pins.
The interconnection of the control signal of DDC digital down converter module and FPGA module comprises that hardware controls and MPI control two types.Hardware controls has synchronous input, the three kinds of signals of exporting synchronously, reset, and takies 4 3.3V I/O pins of FPGA module altogether.MPI control takies 23 3.3V I/O pins of FPGA module altogether.
With reference to figure 6, the DSP module externally has 2 EMIF EBIs, is respectively the EMIFA of 64 bit and the EMIFB of 16 bit.The EMIFA interface possesses the function with 8bit, 16bit, 32bit, 64 bit system interfaces, and in the present embodiment, the EMIFA of the data channel of FPGA module and DSP module through the DSP module interconnects the realization seamless link with the mode of direct-current coupling.
DSP module controls and status signal have (RESET) signal that resets, non-maskable interrupts (NMI) signal, reset mode output (RESETSTAT) signal, electrification reset (POR) signal, GPIO [3:0] signal, TIMER1 signal, TIMER2 signal, IIC signal.The AECLKIN signal pins of DSP module and AECLKOUT signal pins are connected to the clock pin of FPGA module.
The two-way McBSP of DSP module is with the form and the FPGA module interconnects of multi-channel synchronous serial ports.
With reference to figure 7, the interconnection between A/D modular converter and the FPGA module need be passed the backboard connector, and the A/D modular converter is connected through two pins of OVR and RDY with condition line with control between the FPGA module.
With reference to figure 8, PCI9054 interface chip completion capture card is communicated by letter with host computer, local bus is transformed on the cpci bus fast, and supports the DMA transmission mode.For satisfying the real-time collection requirement of great amount of images; FPGA introduces FIFO (first in first out data buffer); Big Capacity FIFO realizes data buffering; Realize the continuous acquisition transmission of high flow capacity, high-speed data, also to different forms and different transmission means to data collection adjust, the programming conversion of picture format realized in Application V erilogHDL hardware programming language.FPGA has realized the logic coupling of bus clock and external timing signal, and the sequential logic control of FIFO operation.
The present invention is based on the multichannel demodulation signal processing platform of CPCI interface; Integrated analog signal receives with digital signal and is sent as one; Adopt parallel, independently A/D modular converter and digital down converter passage; DDC digital down converter module combines traditional filtering with the channelizing multiphase filtering, can handle the intermediate-freuqncy signal of at least one road satellite mobile communication, realizes Viterbi sign indicating number decoding process; This signal processing platform adopts software and radio technique; Through to FPGA module and DSP module programming, software upgrading; Realize the expansion of signal processing platform function; Make this signal processing platform can compatible different systems, the signal processing technology of different system, different rates, have stronger practicality, satisfy higher demand.
Claims (3)
1. based on the multichannel demodulation signal processing platform of CPCI interface, it is characterized in that this demodulation signal processing platform comprises:
Multichannel intermediate-freuqncy signal receiver module; Be used to receive the multichannel analog intermediate frequency signal; Said multichannel intermediate-freuqncy signal receiver module comprises the difference radio frequency receiver, and said difference radio frequency receiver is used for the different IF analog signal that receives is exported with the intermediate frequency analog difference signal;
At least one A/D modular converter, said A/D modular converter comprises four A/D converters, the A/D modular converter is used to accomplish the digital translation of analog intermediate frequency signal;
At least one DDC digital down converter module; Said DDC digital down converter module comprises digital controlled oscillator; Said digital controlled oscillator connects cascade integral comb filter; Said cascade integral comb filter connects half-band filter, and said half-band filter connecting channel multiphase filter group, said DDC digital down converter module are used for filtering, signal adjustment and down-converted;
With the FPGA module that said at least one DDC digital down converter module is connected, said FPGA module is used to accomplish format conversion, semi-band filtering, demodulation, the decoding function of digital signal;
DSP module that is connected with the FPGA module respectively and CPCI interface module, said DSP module is used to accomplish computing, the analysis of digital signal, and signal is configured computing, digital demodulation processing, and the CPCI interface module is used for output information;
Said A/D modular converter is connected with DDC digital down converter module with the direct-current coupling mode; Said DDC digital down converter module is connected through input control, output signal, control signal with the FPGA module, and said FPGA module is connected with the DSP module with multi-channel synchronous serial ports form through the direct-current coupling mode.
2. the multichannel demodulation signal processing platform based on the CPCI interface according to claim 1 is characterized in that the input clock of said A/D modular converter is provided through connector by external clock.
3. the multichannel demodulation signal processing platform based on the CPCI interface according to claim 2 is characterized in that said FPGA module also is connected with FIFO, and said FIFO is used for data cached.
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| CN108809458A (en) * | 2018-03-26 | 2018-11-13 | 上海聚星仪器有限公司 | A kind of channel simulator and its analogy method based on FPGA |
| CN109962731A (en) * | 2019-03-24 | 2019-07-02 | 西安电子科技大学 | A kind of non-homogeneous bandwidth digital channelizer of approximation spaceborne low complex degree of Perfect Reconstruction |
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| CN110365361A (en) * | 2019-07-09 | 2019-10-22 | 上海金卓网络科技有限公司 | Radio frequency interface controller, communication means, baseband chip and communication system |
| CN110365361B (en) * | 2019-07-09 | 2021-07-09 | 上海金卓网络科技有限公司 | Radio frequency interface controller, communication method, baseband chip and communication system |
| CN111711457A (en) * | 2020-05-28 | 2020-09-25 | 电子科技大学 | Method for improving demodulation broadband through multi-channel parallel segmented demodulation mode |
| CN112782694A (en) * | 2021-01-22 | 2021-05-11 | 重庆秦嵩科技有限公司 | Radar signal processing method and system based on multi-core DSP |
| CN112782694B (en) * | 2021-01-22 | 2023-06-30 | 重庆秦嵩科技有限公司 | Radar signal processing method and system based on multi-core DSP |
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Application publication date: 20120926 |