CN202976207U

CN202976207U - Four-route remote sensing image data processing system

Info

Publication number: CN202976207U
Application number: CN 201220644741
Authority: CN
Inventors: 吴伟林; 王维军; 何戎辽; 谭慧超; 宋慧
Original assignee: Chengdu Linhai Electronics Co Ltd
Current assignee: Chengdu Linhai Electronics Co Ltd
Priority date: 2013-04-09
Filing date: 2013-04-09
Publication date: 2013-06-05
Anticipated expiration: 2023-04-09

Abstract

The utility model discloses a four-route high-track remote sensing image data processing system. The system comprises an intermediate frequency signal receiver, four A/D converters, a digital down converter, a FPGA unit, a digital signal processor and a PCI bus interface, wherein the intermediate frequency signal receiver is connected with the four A/D converters, the four A/D converters are all connected with the digital down converters, the digital down converter is connected with the FPGA unit, and the FPGA unit is connected with the digital signal processor and the PCI interface. The high-track remote sensing image data processing system is provided with the four A/D converters, the four A/D converters are connected with the digital down converter, image data signals coming from four-route high-track remote sensing satellites can be simultaneously processed, and the image data signals are smaller than or equal to 100 Mbps, and requirement of the high-track remote sensing image data processing system is satisfied.

Description

A kind of four road remote sensing image data disposal systems

Technical field

The utility model relates to high rail low speed remote sensing images demodulation process technical field, particularly a kind of image data processing system that comes from 4 tunnel high rail low speed remote sensing satellites of processing.

Background technology

Remote sensing technology has been concentrated the latest technological achievements of the subjects such as space, electronics, optics, compunication and ground, has obtained the image document of a large amount of preciousnesses for human research's earth.Low rail high definition remote sensing images occupy an important position in carrying out national ecologic environment control, water resources management, mineral resources management, forest inventory control, Land Resources Management, military struggle, national defense safety and all kinds of scientific research.The development of many scientific domains more and more depends on the progress of remote sensing technology and the acquisition capability of remotely-sensed data.

High rail low speed remote sensing satellite refers to the satellite of satellite orbital altitude more than 20000km.The high rail low speed remote sensing satellite that is moving, the remote sensing image data transfer rate is at 60Mbps-100Mbps, message transmission rate at a high speed and remote sensing satellite quantity in orbit increase rapidly, require ground receiving demodulation system (or remote sensing image data disposal system) to have the remote sensing satellite image signal that can receive multiple speed, more modulation standard.And traditional remote sensing image data disposal system homonymy can only be processed one road remote sensing satellite image signal, can not meet the demands to receive the remote sensing image data disposal system requirement of multiple signals.

The utility model content

The purpose of this utility model is to provide a kind of can process the image data processing system that comes from 4 tunnel high rail low speed remote sensing satellites simultaneously.

In order to realize above-mentioned utility model purpose, the utility model provides following technical scheme:

A kind of four tunnel high rail remote sensing image data disposal systems, comprise intermediate-freuqncy signal receiver, 4 A/D converters, digital down converter (DDC), FPGA unit, digital signal processor, and pci bus interface, wherein, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, 4 A/D converters all are connected with digital down converter, described digital down converter is connected with the FPGA unit, FPGA unit linking number word signal processor and pci interface.

the utility model also provides four tunnel high rail remote sensing image data disposal systems of another kind of form, comprise the intermediate-freuqncy signal receiver, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, wherein 3 A/D converters all are connected with digital down converter, described digital down converter is connected with the FPGA unit, FPGA unit linking number word signal processor and pci bus interface, another A/D converter directly is connected with the FPGA unit, the FPGA unit comprises digital controlled oscillator, described digital controlled oscillator connects cascade integral comb filter, described cascade integral comb filter connects half-band filter, described half-band filter connecting channel multiphase filter group device.

Described A/D converter is used for completing the digital conversion of analog intermediate frequency signal; Described digital down converter is used for filtering, signal adjustment and down-converted; Described FPGA unit will carry out format conversion, semi-band filtering, demodulation code through the digital signal that digital down converter is processed on the one hand, directly will carry out down-converted through the digital signal after the A/D converter conversion on the other hand, then carry out filtering and demodulation; Described digital signal processor is configured computing to the signal that receives, and the information exchange after processing is crossed pci interface output.

Compared with prior art, the beneficial effects of the utility model: the high rail remote sensing image data of the utility model disposal system is provided with four A/D converters, (or wherein three A/D converters are connected with digital down converter respectively four A/D converters with digital down converter respectively, another A/D converter directly is connected with the FPGA unit) connection, can process simultaneously the viewdata signal less than or equal to 100Mbps from four tunnel high rail remote sensing satellites, satisfy the requirement of high rail remote sensing image data disposal system.In addition, one of them A/D converter directly is connected with the FPGA unit, utilize FPGA to realize DDC digital down converter function, realize the peak use rate of existing device, by forming the function element of DDC digital down converter in configuration FPGA unit, can realize that the view data of high-speed transfer speed is processed.

Description of drawings:

Fig. 1 is high rail remote sensing satellite system signal transmission, process flow block diagram;

Fig. 2 is four tunnel high rail remote sensing image data disposal system structured flowcharts in the utility model embodiment 1;

Fig. 3 is four tunnel high rail remote sensing image data disposal system structured flowcharts in the utility model embodiment 2;

Fig. 4 is the theory diagram of realizing in the FPGA unit that Digital Down Convert is processed;

Fig. 5 intermediate-freuqncy signal receiver and A/D converter catenation principle block diagram;

Fig. 6 is digital down converter and FPGA unit catenation principle block diagram;

Fig. 7 is A/D converter and FPGA unit catenation principle block diagram.

Embodiment

Below in conjunction with test example and embodiment, the utility model is described in further detail.But this should be interpreted as that the scope of the above-mentioned theme of the utility model only limits to following embodiment, all technology that realizes based on the utility model content all belong to scope of the present utility model.

As shown in Figure 1, the sensed image signal that remote sensing satellite sends, satellite antenna with this signal through downlink transmission to earth station; This feeble signal that earth station will receive transfers to the low noise amplifier unit, to guarantee to receive the quality of signal; This signal through amplifying carries out frequency transformation through low-converter again, signal is amplified again the intermediate-freuqncy signal of output different frequency; This intermediate-freuqncy signal of further amplifying carries out obtaining corresponding information after demodulation, coding through the detuner signal-processing board, and exports this information.

Embodiment 1

With reference to figure 2, the four tunnel high rail remote sensing image data disposal systems that the present embodiment is enumerated comprise intermediate-freuqncy signal receiver, 4 A/D converters, digital down converter (DDC), FPGA unit, digital signal processor (DSP), and pci bus interface, wherein, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, 4 A/D converters all are connected with digital down converter, described digital down converter is connected with the FPGA unit, FPGA unit linking number word signal processor and pci interface.

The workflow of the high rail remote sensing image data of the utility model four tunnel disposal system is: the intermediate-freuqncy signal receiving element transfers to A/D converter with the analog intermediate frequency signal that receives, an A/D converter is converted to digital signal with one road analog intermediate frequency signal, digital data transmission is to each digital down converter, each digital down converter carries out filtering, signal adjustment and down-converted to this digital signal, then transfer to the FPGA unit, FPGA carries out format conversion, semi-band filtering, demodulation, decoding to the digital signal through down-converted in the unit; Digital signal processor is configured computing, digital demodulation processing to the digital signal that receives, signal after processing is back to the FPGA unit again, signal after processing is exported by pci bus interface after the FPGA unit filtering, pci bus interface is connected to computing machine and disk array, this information exchange is crossed the RAID RAID card and is stored in the computer disk array, facilitates researchist's research.

Embodiment 2

with reference to figure 3, Fig. 4, the four tunnel high rail remote sensing image data disposal systems that the present embodiment is enumerated comprise the intermediate-freuqncy signal receiver, 4 A/D converters, digital down converter, the FPGA unit, digital signal processor, and pci bus interface, wherein, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, wherein 3 A/D converters are connected with digital down converter (DDC), described digital down converter is connected with the FPGA unit, another A/D converter directly is connected with the FPGA unit, FPGA unit linking number word signal processor and pci interface, the FPGA unit comprises digital controlled oscillator, described digital controlled oscillator connects cascade integral comb filter (CIC), described cascade integral comb filter connects half-band filter (HB), described half-band filter connecting channel multiphase filter group device.

digital controlled oscillator in the FPGA unit, cascade integral comb filter, half-band filter and channelizing multiphase filter group device are realized the down-converted function of digital down converter: the local oscillation signal of the digital controlled oscillator generation from the digital intermediate frequency signal of A/D converter output and FPGA unit multiplies each other, this digital intermediate frequency signal is down-converted to zero intermediate frequency signals, this zero intermediate frequency signals is passed through cascade integral comb filter more successively, half-band filter and channelizing multiphase filter group, carry out filtering extraction, simultaneously broadband signal evenly is divided into some sub-band signal outputs, complete the digital down converter device to the down coversion of intermediate-freuqncy signal, filtering, the signal adjustment is processed, then transfer to digital signal processor.Utilize FPGA to realize the Digital Down Convert function, reduced the use amount of digital down converter, reduce costs, also reduced the structure of disposal system simultaneously.

With reference to figure 5, the intermediate-freuqncy signal receiver comprises tuner, and analog intermediate frequency signal is received by tuner, then carries out the radio frequency transformation to the 10.7MHz differential input signal through radio frequency receiver ADT4-1WT, transfers to A/D converter.The input clock of A/D converter can be inputted by external clock.The A/D converter sampling clock requires quality high, and phase noise is low, if the clock signal shake is larger, signal to noise ratio (S/N ratio) easily worsens, and is difficult to guarantee the precision of effective sampling resolution.For Optimal performance, the clock input of difference low jitter is adopted in the input of the clock of A/D converter, input clock is treated to the LVPECL signal, by being ac-coupled to A/D converter.

The output level of A/D converter, digital down converter is 3.3V, adopts the DC coupling mode to connect.A/D converter outputs data bits width is 14, and digital down converter data input bit width is 17.A/D converter is output as TWOS complement code form, and due to the data bit width misalignment, so A/D converter is alignd according to most significant digit with the data of DDC digital down converter, the unnecessary low level of digital down converter is drop-down.

With reference to figure 6, the interconnection of digital down converter and FPGA unit comprises input control interconnection, output signal interconnection, the control signal interconnection of digital down converter.

Digital down converter comprises that four input enable pin carry out input control with the FPGA unit and interconnect, and every digital down converter takies 4 3.3V I/O pins of FPGA unit altogether.

In the present embodiment, the output data channel divided data of digital down converter enables, frame synchronization enables, output enable three classes.The output signal of digital down converter also provides one road VGA/ decay to control output channel and two output clock pins, and the signal that digital down converter is connected on the FPGA unit comprises A, B, three output data channel of C and two output clock pins.

The control signal interconnection of digital down converter and FPGA unit comprises that hardware controls and Microprocessor Interface control two classes.Hardware controls has synchronous input, the three kinds of signals of synchronously exporting, reset, and takies altogether 4 3.3V I/O pins of FPGA unit.Microprocessor Interface is controlled 23 3.3V I/O pins that take altogether the FPGA unit.

With reference to figure 7, the interconnection between A/D converter and FPGA unit need to be passed the backboard connector, and A/D converter and the control between the FPGA unit are connected a pin and are connected with RDY by OVR with condition line.

Claims

1. one kind four tunnel high rail remote sensing image data disposal system, it is characterized in that, this system comprises intermediate-freuqncy signal receiver, 4 A/D converters, digital down converter, FPGA unit, digital signal processor, and pci bus interface, wherein, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, 4 A/D converters all are connected with digital down converter, and described digital down converter is connected with the FPGA unit, FPGA unit linking number word signal processor and pci interface.

2. one kind four tunnel high rail remote sensing image data disposal system, it is characterized in that, comprise the intermediate-freuqncy signal receiver, described intermediate-freuqncy signal receiver is connected with 4 A/D converters, wherein 3 A/D converters all are connected with digital down converter, described digital down converter is connected with the FPGA unit, FPGA unit linking number word signal processor and pci bus interface, another A/D converter directly is connected with the FPGA unit, the FPGA unit comprises digital controlled oscillator, described digital controlled oscillator connects cascade integral comb filter, described cascade integral comb filter connects half-band filter, described half-band filter connecting channel multiphase filter group device.