CN205562813U - Satellite navigation signal testing system based on big dipper intermediate frequency signal gathers - Google Patents

Abstract

The utility model discloses a satellite navigation signal testing system based on big dipper intermediate frequency signal gathers, this system include big dipper intermediate frequency signal collector and the big dipper baseband signal treater that carries out data transmission each other, and wherein big dipper intermediate frequency signal collector is including the radio frequency front end module, radio frequency front end data processing module, AD sampling module and the data transmission module that connect gradually. According to the utility model discloses a miniature navigation test system can carry out signal acquisition to big dipper radiofrequency signal to convert the signal source that digital intermediate frequency data flow was tested as satellite navigation into, with the processing of resolving of here signal source input to subsequent big dipper baseband signal treater information of carrying on, the test who from this is the processing of realization beidou signal provides the support of hardware device.

Description

A kind of satellite navigation signals test system gathered based on Big Dipper intermediate-freuqncy signal

Technical field

This utility model belongs to field of satellite navigation, believes based on Big Dipper intermediate frequency more particularly, to one Number gather satellite navigation test system.

Background technology

Technical field of satellite navigation is applied increasingly extensive at present, and China also leads stepping up to carry out big-dipper satellite The building-up work of boat system, has formed the Big Dipper regional satellite of 5GEO+3IGSO+4MEO Navigation system constellation, will expand into the Satellite Global satellite navigation for having about 30 to the year two thousand twenty System.For market and all types of user, the terminal unit of the satellite navigation system such as GPS, the Big Dipper Application technology is one of key technology.

Satellite navigation receiver is mostly based on digital processing technology special chip (ASIC) and is used at present The fast microprocessor of computation and constitute, its shortcoming is that algorithm is fixed and is not easy to change hardware Framework, but the demand that interface applications is received machine in different occasions and different application platforms by user is the most different, It is changed it is thus desirable to receiver to be carried out functional structure thus meets navigation more flexibly sufficiently Signal testing demand.

Utility model content

For disadvantages described above or the Improvement requirement of prior art, this utility model provides a kind of based on north The satellite navigation signals test system that bucket intermediate-freuqncy signal gathers, its object is to propose one particularly suitable The test system of the Big Dipper intermediate-freuqncy signal of Yu Haiyang environment, thus for different types of north of ocean application Bucket receiver signal processes the system hardware platform providing test.

For achieving the above object, according to an aspect of the present utility model, it is provided that a kind of based on the Big Dipper The satellite navigation test system that intermediate-freuqncy signal gathers, it is characterised in that this system includes mutually counting According to Big Dipper intermediate-freuqncy signal harvester and the Big Dipper baseband signal processor of transmission, wherein Big Dipper intermediate frequency letter RF front-end module that number harvester includes being sequentially connected with, radio-frequency front-end data processing module, A/D sampling Module and data transmission module.

Further, described RF front-end module includes Beidou antenna, the two-stage low noise being sequentially connected with Amplifier and band filter.

Further, described radio-frequency front-end data processing module includes quadrature demodulator and coupled Combine for its RF local oscillator frequency providing oscillation source.

In general, by the contemplated above technical scheme of this utility model compared with prior art, It is possible to obtain following beneficial effect: Big Dipper radiofrequency signal can be carried out signals collecting, and change The signal source tested as satellite navigation for digital intermediate frequency data stream, by the input of this signal source to follow-up Big Dipper baseband signal processor carries out the resolving of information and processes, and is achieved in the test of Big Dipper signal processing Work.

Accompanying drawing explanation

Fig. 1 is the overall structure schematic diagram of the satellite navigation test system realized according to this utility model；

Fig. 2 is that the Big Dipper intermediate-freuqncy signal in the satellite navigation test system according to this utility model realization is adopted The modular structure schematic diagram of storage；

Fig. 3 is in the Big Dipper in the satellite navigation test system according to this utility model embodiment one realization Frequently the module details structural representation of signal picker；

Fig. 4 is the Big Dipper base in the satellite navigation test system according to this utility model embodiment one realization The modular structure schematic diagram of band signal processor.

Detailed description of the invention

In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with Drawings and Examples, are further elaborated to this utility model.Should be appreciated that this place is retouched The specific embodiment stated, only in order to explain this utility model, is not used to limit this utility model.This Outward, if technical characteristic involved in each embodiment of this utility model disclosed below that The conflict of not constituting between this just can be mutually combined.

The test system realized according to this utility model, mainly includes following two parts: such as Fig. 1 institute Showing, the navigation test system that this utility model relates to includes the Big Dipper intermediate frequency letter mutually carried out data transmission Number harvester and Big Dipper baseband signal processor.

As in figure 2 it is shown, be the system group of the Big Dipper intermediate-freuqncy signal harvester realized according to this utility model Becoming schematic diagram, wherein Big Dipper intermediate-freuqncy signal harvester mainly completes the high speed acquisition to Big Dipper radiofrequency signal With process, it specifically includes interconnective RF radio-frequency front-end, RF radio-frequency front-end data process, A/D Module and data transmission module, A/D module completes sampling and the quantization of data, data transmission module master The agreement of data to be provided transmission and interface.

Embodiment one

Part as shown in Figure 3, is the detailed schematic of concrete Big Dipper intermediate-freuqncy signal acquisition module, The Big Dipper intermediate-freuqncy signal harvester realized according to the present embodiment, this harvester mainly includes such as lower part:

1, RF front-end module

The design of RF front-end module mainly includes the Beidou II B1 antenna gathering signal, and coupled Two-stage front-end low-noise put LNA, wherein front-end low-noise put chip select model is the core of HMC476SC70 Sheet, accesses one-level radio frequency band filter (SAW filter SAW) after two-stage LNA exports, actual In test, every grade of LNA reaches the gain of 15dB, and two-stage LNA associating gain about 30dB is actual logical Road counts two-stage SAW Insertion Loss, final stage PI type matching attenuation, circuit and joint Insertion Loss etc., is total to Counting the loss of about 10dB, the cascade of actual two-stage LNA obtains the gain of 20dB.

2, RF front end data processes

Wherein this RF front end data processes and selects chip AD8347 as primary module, and AD8347 is a Single-chip, broadband 2.7GHz quadrature demodulator, and use concrete model to provide for it for SI4133 RF local oscillator frequency combines chip, and this RF local oscillator frequency is combined chip and comprised 3 road PLL phase-locked loops, every road PLL It is made up of PD phase detectors, LF loop filter, VCO voltage controlled oscillator and programmable frequency divider. Using 10MHz 1PPM temperature compensating crystal oscillator as reference frequency source, radio frequency output is connected pair net by LC Network matches load, and the scope of the external inductors of the first radio-frequency channel is 0～4.6nH, and the second radio frequency leads to The scope of the external inductors in road is 0.3nH～6.2nH.

3, A/D sampling module

Wherein A/D sampling module is arranged at after RF front end data processes and carries out data sampling, actual plate Upper AD uses the model of Analog Device company to be AD9233-125 chip, be a single-chip, 12,125MSPS analog-digital converter ADC, use 1.8V single supply to power, a built-in high property Can sample/hold amplifier SHA and sheet internal reference voltage source, high sampling rate up to 125MHz, 12 Resolution, analog bandwidth reaches as high as 650MHz, can do the direct bandpass sampling of radio frequency, uses difference to drive Time dynamic, AD9233 is capable of optimum performance.Analog if signal enters after electric capacity AC coupled and puts Big passage.

4, data transmission module

Wherein data transmission module includes that the front-end processing of data and interface process, wherein front-end processing It is that the data transmitted through A/D sampling module are transmitted to the FPGA as data transmission module, needs here It should be noted that the clock interface of FPGA, its internal PLL input needs special clock pin to input, Transmit after wherein the data of FPGA being processed and prepare data are processed to transmit it to USB2.0 interface Big Dipper baseband signal processor, wherein USB2.0 interface uses CY7C68013-56 interface chip.

The most as shown in Figure 4, the module group of the Big Dipper baseband signal processor for realizing according to the present invention Becoming structural representation, wherein, Big Dipper baseband signal processor passes through capture from intermediate frequency signal picker Module gathers corresponding data, and by the signal input tracking module of capture, this tracking module is main Including code tracking loop and carrier tracking loop, Big Dipper baseband signal processor is mainly used in the above-mentioned Big Dipper Frequently the signal that comes of signal picker conveying processes, wherein and this processor mainly completes data Process, the initialization of each passage (each passage refers to the multi-satellite signalling channel received), each logical Road is advanced, instant and the reading of lag correlation value and the loop of storage, carrier tracking loop and code tracking loop Controlling and performance test is so that it is guaranteed that the reliability that processes of data, the TIC moment observes the reading of data and deposits Storage, carrier phase auxiliary pseudorange smoothing processes, and follows the tracks of Doppler's kalman Filtering Processing, signal frame number According to reading and navigation message resolve, satellite fix resolve and speed solves, the framing of serial port protocol and Solve the various data receivers such as frame and process the various functions such as calculating, the most above-mentioned Big Dipper base band signal process The each module of device is integrated in a DSP or programmable logic chip, by with power supply, logic journey The cooperation of sequence completes above-mentioned process.

Wherein after Big Dipper intermediate-freuqncy signal harvester collection completes signal, use at Big Dipper baseband signal Reason device carries out the process of signal, and the procedure extraction that thus data process goes out the test data letter of satellite navigation Breath carries out testing information processing, and this data handling procedure uses the data mistake identical with prior art Journey and select data processing chip, does not repeats them here the detailed process of data.

As it will be easily appreciated by one skilled in the art that and the foregoing is only preferred embodiment of the present utility model , not in order to limit this utility model, all made within spirit of the present utility model and principle Any amendment, equivalent and improvement etc., within should be included in protection domain of the present utility model.

Claims (3)

1. the satellite navigation signals test system gathered based on Big Dipper intermediate-freuqncy signal, it is characterised in that This system includes Big Dipper intermediate-freuqncy signal harvester and the Big Dipper baseband signal processor being electrically connected to each other, At RF front-end module that wherein Big Dipper intermediate-freuqncy signal harvester includes being sequentially connected with, radio-frequency front-end data Reason module, A/D sampling module and data transmission module.

2. the satellite navigation signals test gathered based on Big Dipper intermediate-freuqncy signal as claimed in claim 1 is System, it is characterised in that described RF front-end module includes Beidou antenna, the two-stage low noise being sequentially connected with Acoustic amplifier and band filter.

3. the satellite navigation signals test gathered based on Big Dipper intermediate-freuqncy signal as claimed in claim 2 is System, it is characterised in that described radio-frequency front-end data processing module include quadrature demodulator and with its phase It is linked as its RF local oscillator that oscillation source is provided frequency to combine.