CN102637630B - 阵列基板及其制造方法 - Google Patents

阵列基板及其制造方法 Download PDF

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CN102637630B
CN102637630B CN201110132769.5A CN201110132769A CN102637630B CN 102637630 B CN102637630 B CN 102637630B CN 201110132769 A CN201110132769 A CN 201110132769A CN 102637630 B CN102637630 B CN 102637630B
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宋泳锡
崔承镇
刘圣烈
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BOE Technology Group Co Ltd
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Abstract

本发明提供一种阵列基板及其制造方法，属于阵列基板制造领域。该制造方法包括：在基板上形成无机材料凸起；形成分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从栅线分支出来的栅电极和公共电极；形成由半导体层构成的硅岛图案和由第二金属层构成的数据线图案，在硅岛图案上形成与数据线连接的源电极和漏电极、由半导体层构成的沟道；在基板上涂布无机材料，并对无机材料进行回火工艺后形成一平坦层，并在漏电极上形成过孔；在反射区域形成通过过孔与漏电极连接、由第二透明导电层构成的像素电极。本发明能够降低薄膜晶体管制作中的掩膜道次，减少制作时间，增加产能，进而降低制造成本。

Description

阵列基板及其制造方法
技术领域
本发明涉及液晶显示领域，特别涉及一种阵列基板及其制造方法。
背景技术
根据驱动液晶的电场方向，液晶显示装置分为垂直电场型液晶显示装置和水平电场型液晶显示装置。水平电场型液晶显示装置中进一步包括：高级超维场开关技术(Advanced-Super Dimensional Switching，AD-SDS)型显示装置。
AD-SDS通过同一平面内像素电极边缘所产生的平行电场以及像素电极层与公共电极层间产生的纵向电场形成多维电场，使液晶盒内像素电极间、电极正上方所有取向液晶分子都能够产生旋转转换，从而提高了平面取向系液晶工作效率并增大了透光效率。高级超维场开关技术可以提高TFT-LCD画面品质，具有高透过率、宽视角、高开口率、低色差、低响应时间、无挤压水波纹(push Mura)波纹等优点。
现有技术中的AD-SDS型显示装置大部分采用传统方式Staggered BackChannel Etch(交错反向通道刻蚀)法制造，但这是需要以6道掩膜工艺制造，由于目前在薄膜晶体管液晶显示面板的制造上，掩膜工艺耗时且非常昂贵，因此相对于采用5道掩膜工艺制造的宽视角竞争技术的IPS(横向电场效应显示技术)或VA mode，现有技术中的AD-SDS型显示装置的生产方式有着生产力不高的缺点。
发明内容
本发明要解决的技术问题是提供一种阵列基板及其制造方法，能够降低薄膜晶体管制作中的掩膜道次，减少制作时间，增加产能，进而降低制造成本。
为解决上述技术问题，本发明的实施例提供技术方案如下：
一方面，提供一种阵列基板的制造方法，包括：
第一次掩膜工艺，在基板上形成无机材料凸起；
第二次掩膜工艺，在经过所述第一次掩膜工艺的基板上形成分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从所述栅线分支出来的栅电极和公共电极；
第三次掩膜工艺，在经过所述第二次掩膜工艺的基板上形成由半导体层构成的硅岛图案和由第二金属层构成的数据线图案，在所述硅岛图案上形成与数据线连接的源电极和漏电极、由半导体层构成的沟道；
第四次掩膜工艺，在经过所述第三次掩膜工艺的基板上涂布无机材料，并对所述无机材料进行回火工艺后形成一平坦层，并在所述漏电极上形成过孔；
第五次掩膜工艺，在所述反射区域形成通过所述过孔与所述漏电极连接、由第二透明导电层构成的像素电极。
其中，在所述第一次掩膜工艺中，在基板上利用无机材料制作凸起，并对所述凸起进行回火工艺后使其成为角度为6～10度的凸起。
其中，所述回火工艺的温度为200-250℃，时间为20～60min。
其中，在所述第二次掩膜工艺中，所述公共电极的反射区域由所述第一透明导电层和所述第一金属层构成，所述公共电极的透射区域由所述第一透明导电层构成。
其中，在所述第四次掩膜工艺中，回火工艺后的所述平坦层的平坦率在95％以上。
其中，所述无机材料为采用氧化硅或氮化硅导电体的无机树脂。
其中，在所述第三次掩膜工艺中，所述绝缘层为氮氧化硅层或氮化硅层，所述半导体层为非晶硅层，所述第二金属层为采用钼、铝、钛或铜。
其中，所述第一透明导电层和第二透明导电层为IZO氧化铟锌层或ITO氧化铟锡层。
本发明实施例还提供了一种阵列基板，包括：
一基板；
分布在所述基板上的无机材料凸起；
分布在上述基板上的分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从所述栅线分支出来的栅电极和公共电极；
分布在上述基板上由半导体层构成的硅岛图案和由第二金属层构成的数据线图案、在所述硅岛图案上与数据线连接的源电极和漏电极、由半导体层构成的沟道；
沉积在上述基板上、以无机材料制成的平坦层，所述平坦层包括一与所述漏电极相连的过孔；
分布在上述基板上由第二透明导电层构成、通过所述过孔与所述漏电极连接的所述像素电极。
本发明的实施例具有以下有益效果：
上述方案中，仅需五道掩膜工艺，即可制作AD-SDS型显示装置用阵列基板，由于曝光工艺次数降低，故可以减少制造时间，进而降低制造成本，并且本发明中在反射区上部制作一平坦层，使像素电极平坦分布在基板上，而使液晶面板可正常的水平切换AD-SDS驱动。
附图说明
图1为现有技术中的AD-SDS型显示装置结构示意图；
图2为本发明实施例制造AD-SDS阵列基板的详细工艺流程图；
图3为本发明实施例的AD-SDS阵列基板结构示意图。
具体实施方式
为使本发明的实施例要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
现有技术中的AD-SDS型显示装置大部分采用6道掩膜工艺制造，并且结构如图1所示，反射部上方分布的像素电极是不平坦的，没有分布在一个平面上，因此具有液晶驱动不利的问题。
本发明的实施例针对现有技术中的上述问题，提供一种AD-SDS阵列基板的制造方法，采用5道掩膜工艺，降低了薄膜晶体管制作中的掩膜道次，减少制作时间，增加产能，进而降低制造成本；并且本发明在反射区上部制作一平坦层，使像素电极平坦分布在基板上，而使液晶面板可正常的水平切换AD-SDS驱动。
本发明实施例提供了一种AD-SDS阵列基板的制造方法，包括：
第一次掩膜工艺，在基板上形成无机材料凸起，掩膜工艺包括沉积薄膜、光刻胶涂覆、曝光、显影、刻蚀、剥离光刻胶等等工序，下面的步骤类推；
第二次掩膜工艺，在经过第一次掩膜工艺的基板上形成分别由第一透明导电层和第一金属层构成的反射区域图案、栅线和从栅线分支出来的栅电极和公共电极；
第三次掩膜工艺，在经过所述第二次掩膜工艺的基板上形成由半导体层构成的硅岛图案和由第二金属层构成的数据线图案，在所述硅岛图案上形成与数据线连接的源电极和漏电极、由半导体层构成的沟道；
硅岛图案是指用于形成薄膜晶体管起半导体作用的岛状图案，通常形成在栅极和源、漏电极之间；
第四次掩膜工艺，在经过所述第三次掩膜工艺的基板上涂布无机材料，并对所述无机材料进行回火工艺后形成一平坦层，并在所述漏电极上形成过孔；
第五次掩膜工艺，在所述反射区域形成通过所述过孔与所述漏电极连接、由第二透明导电层构成的像素电极。
本发明实施例的AD-SDS阵列基板的制造方法仅需五道掩膜工艺，即可制作AD-SDS型显示装置用阵列基板，由于曝光工艺次数降低，故可以减少制造时间，进而降低制造成本，并且本发明中在反射区上部制作一平坦层，使像素电极平坦分布在基板上，而使液晶面板可正常的水平切换AD-SDS驱动。
下面结合图2，对本发明实施例的AD-SDS阵列基板的制造方法进行详细说明。
如图2所示，本发明实施例的制造AD-SDS阵列基板的详细工艺包括：
步骤1：在基板上利用无机材料制作凸起21；其中，无机材料可以为采用氧化硅(SiO2)或氮化硅(SiNx)导电体的无机树脂；
步骤2：对该凸起进行回火工艺后使其成为角度为6～10度的凸起，使得凸起变得比较平缓；其中，回火工艺采用的温度为200-250℃，时间为20～60min；
步骤3：在上述基板上依次沉积第一透明导电层22和第一金属层23；
其中，第一金属层可以采用钼、铝、钛或铜等导电性能好的金属，以用来制作栅线和栅电极；第一透明导电层可以采用氧化铟锌(IZO)层或氧化铟锡(ITO)层；
步骤4：在经过上述步骤的基板上涂布光刻胶24，进行曝光显影工艺；
在该曝光显影工艺中是使用半色调或者灰色调掩膜。这样可以使得光刻胶层达成同一掩膜曝光显影即形成两个不同区域厚度的凹凸状光刻胶层的目的，本实施例的曝光光源可以为任何用于曝光的光源，较佳为照射紫外光；
步骤5：在进行曝光显影工艺之后进行刻蚀；
本实施例中的刻蚀可以为干刻蚀或湿刻蚀，较佳为干刻蚀；
步骤6：对光刻胶进行灰化工艺；
该步骤可以使得基板上的光刻胶层整体变薄；
步骤7：在对光刻胶进行灰化工艺之后再次进行刻蚀，形成分别由第一透明导电层和第一金属层构成的反射区域图案、栅线和从栅线分支出来的栅电极、公共电极；
步骤8：从基板上剥离光刻胶；
步骤9：在经过上述步骤的基板上顺序沉积绝缘层25、半导体层和第二金属层；
其中，绝缘层可以为氮氧化硅(SiON)层或氮化硅层，半导体层可以为非晶硅(a-Si)层，第二金属层可以采用钼、铝、钛或铜等导电性能好的金属，以用来制作源电极、漏电极；
步骤10：在经过上述步骤的基板上涂布光刻胶，进行曝光显影工艺；
步骤11：在进行曝光显影工艺之后进行刻蚀，形成由半导体层构成的硅岛图案和由第二金属层构成的数据线图案；
步骤12：对光刻胶进行灰化工艺；
步骤13-14：再次进行刻蚀，在硅岛图案上形成与数据线连接的源电极26和漏电极27、由半导体层构成的沟道28；
该步骤中，以源电极和漏电极为模板对半导体层进行刻蚀以形成沟道，其中公共电极的反射区域由第一透明导电层和第一金属层构成，公共电极的透射区域由第一透明导电层构成；
步骤15：剥离光刻胶；
步骤16：在经过上述步骤的基板上涂布无机材料；
其中，无机材料可以为采用氧化硅或氮化硅导电体的无机树脂；
步骤17：对无机材料进行回火工艺后形成一平坦层29，在上述基板上涂布光刻胶，进行曝光显影工艺之后进行刻蚀，在漏电极上形成过孔，对光刻胶进行剥离工艺；
本实施例中，经过回火工艺后的平坦层的平坦率在95％以上；
步骤18：在经过上述步骤的基板上沉积第二透明导电层；
第二透明导电层可以采用氧化铟锌层或氧化铟锡层；
步骤19：在第二透明导电层上涂布光刻胶，进行曝光显影工艺；
步骤20：进行刻蚀，之后在反射区域形成通过过孔与漏电极连接的像素电极30；
步骤21：剥离残留的光刻胶。
如图3所示为本发明实施例以上述工艺制造的AD-SDS阵列基板结构示意图，如图3所示，本实施例包括：
一基板1；
分布在基板1上的无机材料凸起2；
分布在上述基板上的分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从所述栅线分支出来的栅电极4和公共电极3；
分布在上述基板上由半导体层构成的硅岛图案5和由第二金属层构成的数据线图案、在硅岛图案上与数据线连接的源电极61和漏电极62、由半导体层构成的沟道7；
沉积在上述基板上、以无机材料制成的平坦层8，平坦层8包括一与漏电极62相连的过孔9；
分布在上述基板上由第二透明导电层构成、通过过孔9与漏电极62连接的像素电极10。
本发明实施例仅需五道掩膜工艺，即可制作AD-SDS型显示装置用阵列基板，由于曝光工艺次数降低，故可以减少制造时间，进而降低制造成本，并且如图3所示，本发明的AD-SDS阵列基板在反射区域上部采用无机树脂制作一平坦层，使像素电极平坦分布在基板上，而使液晶面板可正常的水平切换AD-SDS驱动。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (9)

1.一种阵列基板的制造方法，其特征在于，包括：
第一次掩膜工艺，在基板上形成无机材料凸起；
第二次掩膜工艺，在经过所述第一次掩膜工艺的基板上形成分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从所述栅线分支出来的栅电极和公共电极；
第三次掩膜工艺，在经过所述第二次掩膜工艺的基板上形成由半导体层构成的硅岛图案和由第二金属层构成的数据线图案，在所述硅岛图案上形成与数据线连接的源电极和漏电极、由半导体层构成的沟道；
第四次掩膜工艺，在经过所述第三次掩膜工艺的基板上涂布无机材料，并对所述无机材料进行回火工艺后形成一平坦层，并在所述漏电极上形成过孔；
第五次掩膜工艺，在所述反射区域形成通过所述过孔与所述漏电极连接、由第二透明导电层构成的像素电极。
2.根据权利要求1所述的阵列基板的制造方法，其特征在于，在所述第一次掩膜工艺中，在基板上利用无机材料制作凸起，并对所述凸起进行回火工艺后使其成为角度为6～10度的凸起。
3.根据权利要求2所述的阵列基板的制造方法，其特征在于，所述回火工艺采用的温度为200-250℃，时间为20～60min。
4.根据权利要求1所述的阵列基板的制造方法，其特征在于，在所述第二次掩膜工艺中，所述反射区域由所述第一透明导电层和所述第一金属层构成，所述反射区域以外的透射区域由所述第一透明导电层构成。
5.根据权利要求1所述的阵列基板的制造方法，其特征在于，在所述第四次掩膜工艺中，回火工艺后的所述平坦层的平坦率在95%以上。
6.根据权利要求1所述的阵列基板的制造方法，其特征在于，形成凸起的无机材料为采用氧化硅或氮化硅导电体的无机树脂；
所述第四次掩膜工艺涂布的无机材料为采用氧化硅或氮化硅导电体的无机树脂。
7.根据权利要求1所述的阵列基板的制造方法，其特征在于，在所述第三次掩膜工艺中，所述半导体层为非晶硅层，所述第二金属层为采用钼、铝、钛或铜。
8.根据权利要求1所述的阵列基板的制造方法，其特征在于，所述第一透明导电层和第二透明导电层为IZO氧化铟锌层或ITO氧化铟锡层。
9.一种阵列基板，其特征在于，包括：
一基板；
分布在所述基板上的无机材料凸起；
分布在上述基板上的分别由第一透明导电层和第一金属层构成的反射区域图案、栅线、从所述栅线分支出来的栅电极和公共电极；
分布在上述基板上由半导体层构成的硅岛图案和由第二金属层构成的数据线图案、在所述硅岛图案上与数据线连接的源电极和漏电极、由半导体层构成的沟道；
沉积在上述基板上、以无机材料制成的平坦层，所述平坦层包括一与所述漏电极相连的过孔；
分布在上述基板上由第二透明导电层构成、通过所述过孔与所述漏电极连接的像素电极。
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