CN102610523A - 在超级结mosfet中集成肖特基二极管的方法 - Google Patents

在超级结mosfet中集成肖特基二极管的方法 Download PDF

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CN102610523A
CN102610523A CN2011100215870A CN201110021587A CN102610523A CN 102610523 A CN102610523 A CN 102610523A CN 2011100215870 A CN2011100215870 A CN 2011100215870A CN 201110021587 A CN201110021587 A CN 201110021587A CN 102610523 A CN102610523 A CN 102610523A
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junction mosfet
schottky diode
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金勤海
王永成
陈正嵘
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

本发明公开了一种在超级结MOSFET中集成肖特基二极管的方法，为在超级结MOSFET中并联集成有由肖特基接触与衬底形成的肖特基二极管，肖特基二极管的阳极位于超级结MOSFET元胞区域的源端两个体区之间的漂移区上，肖特基二极管的阳极与超级结MOSFET的源端相连；阳极的漂移区上还设有多个掺杂区，掺杂区的导电类型与漂移区相反，杂质浓度大于漂移区的杂质浓度，掺杂区也与超级结MOSFET的源端相连；肖特基二极管的阴极共用位于衬底背面的所述超级结MOSFET的漏电极。本发明的方法，可降低肖特基二极管的反向漏电。

Description

在超级结MOSFET中集成肖特基二极管的方法
技术领域
本发明涉及一种超级结MOSFET的制备方法。
背景技术
功率金属氧化物半导体场效应晶体管(简称功率MOS)固有一个与其并联的寄生二极管，寄生二极管的阳极与MOS的体区以及源极相连，阴极与MOS的漏极相连，因此功率MOS常常被用来续流或者钳制电压。
在续流或者钳制电压时，寄生二极管正向导通，MOS也导通，MOS的源极(寄生二极管阳极)电压比漏极(寄生二极管阴极)电压稍高，电流从源极流向漏极；反向截至时MOS的漏极(寄生二极管阴极)电压比源极(寄生二极管阳极)电压高，器件只有很小的漏电。这样的应用由于MOS的导通电阻很小，正向电压降往往比寄生二极管小，因此导通时功耗更小。
这种寄生二极管与普通二极管一样，由少子参与导电，因此有反向恢复时间，从而降低开关速度、增加开关损耗。现有的超结金属氧化物半导体场效应晶体管(简称super junction MOS)因固有寄生二极管同样有上述优缺点(只是导通时电阻比一般MOS更低)。
发明内容
本发明要解决的技术问题是提供一种在超级结MOSFET中集成肖特基二极管的方法，其能增加器件的性能。
为解决上述技术问题，本发明的在超级结MOSFET中集成肖特基二极管的方法，为在所述超级结MOSFET中并联集成有由肖特基接触与衬底形成的肖特基二极管，所述肖特基二极管的阳极位于超级结MOSFET元胞区域的源端两个体区之间的漂移区上，所述肖特基二极管的阳极与所述超级结MOSFET的源端相连；所述阳极的漂移区上还设有多个掺杂区，所述掺杂区的导电类型与所述漂移区相反，杂质浓度大于所述漂移区的杂质浓度，所述掺杂区也与所述超级结MOSFET的源端相连；所述肖特基二极管的阴极共用位于衬底背面的所述超级结MOSFET的漏电极。
在本发明的超级结MOSFET中，并联的肖特基二极管由多子(电子)导电，它与MOS并联使用，在续流时，寄生二极管的少子摄入(扩散)大大减小，反向恢复时间大大降低。与肖特基接触相邻的掺杂区与漂移区形成PN结，在肖特基二极管电压反向偏置时，上述PN结也反向偏置，肖特基接触附近的电子被耗尽，从而降低肖特基二极管的反向漏电。
附图说明
下面结合附图与具体实施方式对本发明作进一步详细的说明：
图1为现有的超级结MOSFET结构示意图；
图2为本发明的超级结MOSFET的版图示意；
图3为本发明的超级结MOSFET结构截面示意图，其中a为沿图2中AA’线的截面示意图，b为沿图2中BB’线的截面示意图，c为沿图2中CC’线的截面示意图；
图4为本发明的超级结MOSFET制备中栅极形成后的截面示意图；
图5为本发明的超级结MOSFET制备中定义出肖特基二极管阳极后的截面示意图；
图6为本发明的超级结MOSFET制备中刻蚀掉肖特基二极管阳极位置处的多晶硅后的截面示意图；
图7为本发明的超级结MOSFET制备中刻蚀形成接触孔后的截面示意图；
图8为本发明的超级结MOSFET制备中源极引出端和掺杂区注入的示意图，其中a为图2中AA’线的截面示意图，b为图2中BB’线的截面示意图，c为图2中CC’线的截面示意图；
图9为本发明的超级结MOSFET制备中源极引出端和掺杂区形成后的截面示意图，其中a为图2中AA’线的截面示意图，b为图2中BB’线的截面示意图，c为图2中CC’线的截面示意图。
具体实施方式
本发明的超级结MOSFET中集成肖特基二极管的结构，为在超级结MOSFET中并联肖特基二极管。肖特基二极管的阳极设置在超级结MOSFET元胞区域的源端两个体区之间的漂移区上，由阳极和漂移区形成肖特基接触，该阳极与、超级结MOSFET的源端相连；肖特基二极管的阴极共用位于衬底背面的超级结MOSFET的漏电极。在肖特基二极管阳极的漂移区上，还设有多个掺杂区，掺杂区的导电类型与漂移区相反，杂质浓度大于漂移区的杂质浓度，掺杂区也与超级结MOSFET的源端相连。与肖特基接触相邻的掺杂区与漂移区形成PN结，在肖特基二极管电压反向偏置时，上述PN结也反向偏置，肖特基接触附件的电子被耗尽，从而使肖特基二极管的反向漏电降低。
在一个具体实例中(见图2和图3)，超级结MOSFET制备中高掺杂的N型硅衬底上，衬底上方为N型的漂移区，通常为N型外延层。漂移区内有P柱，P柱上方为P型的体区，在体区上方设有N+源区，且源区被体区包围。在源区的中间为P+型的源极引出端(即掺杂浓度比体区的掺杂浓度高)，用于通过接触孔连接电极。往上依次为氧化硅和多晶硅层。在相邻的两个体区之间的漂移区上，设置有接触孔，用于通过接触金属与漂移区形成肖特基二极管。在漂移区表面上，沿着漂移区的宽度方向(即多晶硅的延伸方向)，设置有多个掺杂区(为P+区，可为等间距设置)，该掺杂区的掺杂浓度和掺杂类型可设为与源极引出端中的相同，并通过接触金属引出，该掺杂区与漂移区形成PN结，最终在漂移区的宽度方向形成PN结和肖特基二极管相间隔设置的结构。PN结中P端的接触金属可与肖特基二极管中阳极设在一起，通过同一金属线引出，也可以各自通过接触孔引出。PN结的P端与超级结MOSFET的源端相连，而N端和肖特基二极管的阴极共用衬底背面的漏电极。
本发明的超级结MOSFET结构的制备方法，为在原有的流程中进行改进。具体流程可为：
1)在高掺杂N型衬底的N外延层上形成体区源区和栅极(见图4)，在多晶硅的刻蚀中增加刻蚀去除位于漂移区上方的多晶硅(见图5和图6)。具体可为先通过光刻工艺定义出需要去除多晶硅的位置，而后刻蚀露出的多晶硅。
2)而后在衬底上淀积层间膜，接着采用光刻工艺定义出接触孔的位置，刻蚀层间膜形成源极引出端的接触孔(该接触孔同时为体区的引出接触孔)，漂移区上方的接触孔(见图7)。
3)而后进行离子注入形成漂移区表面的掺杂区和源极引出端的接触区，在离子注入之前，先通过光刻工艺使光刻胶覆盖不需要注入的肖特基二极管的接触孔(见图8)。一实例中，注入最终在相应的接触孔底部形成P+区，而在肖特基阳极下方的漂移区中没有进行注入(见图9)。掺杂区的掺杂浓度为：1013-1014个原子/cm2。
其余步骤与常规功率器件工艺相同，包括接触金属填充、回刻(或化学机械研磨)，正面金属形成，背面减薄，背面金属形成(即为超级结MOSFET的漏电极)。

Claims (4)

1.一种在超级结MOSFET中集成肖特基二极管的方法，其特征在于：在所述超级结MOSFET中并联集成有由肖特基接触与衬底形成的肖特基二极管，所述肖特基二极管的阳极位于超级结MOSFET元胞区域的源端两个体区之间的漂移区上，所述肖特基二极管的阳极与所述超级结MOSFET的源端相连；所述阳极的漂移区上还设有多个掺杂区，所述掺杂区的导电类型与所述漂移区相反，杂质浓度大于所述漂移区的杂质浓度，所述掺杂区也与所述超级结MOSFET的源端相连；所述肖特基二极管的阴极共用位于衬底背面的所述超级结MOSFET的漏电极。
2.按照权利要求1所述的方法，其特征在于，所述超级结MOSFET中集成肖特基二极管的制备包括：
在超级结MOSFET中的多晶硅淀积完成后，刻蚀去除位于源区上方和位于两个体区之间的漂移区上方的多晶硅，形成多晶硅栅；
在所述源区和所述漂移区上刻蚀形成接触孔后，利用光刻工艺使光刻胶覆盖源区的接触孔和漂移区上部分接触孔，接着离子注入在所述漂移区上方未被光刻胶的覆盖的接触孔内形成掺杂区，所述掺杂区的导电类型与所述漂移区相反，杂质浓度大于所述漂移区的杂质浓度，最后去除光刻胶；
接着填入金属在接触孔内形成接触金属；
在接下来的金属互连形成工艺中，用金属线连接所述源极、所述肖特基二极管的阳极和所述掺杂区。
3.按照权利要求1或2所述的方法，其特征在于：所述掺杂区为等间距间隔设置在漂移区上。
4.按照权利要求1或2所述的方法，其特征在于：所述掺杂区的掺杂浓度为：1013-1016个原子/cm2。
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CN106057798A (zh) * 2016-06-27 2016-10-26 电子科技大学 一种集成沟槽肖特基的mosfet
CN106129119A (zh) * 2016-08-31 2016-11-16 西安龙腾新能源科技发展有限公司 集成肖特基二极管的超结功率vdmos的版图结构及其制作方法
CN107768371A (zh) * 2017-10-24 2018-03-06 贵州芯长征科技有限公司 集成肖特基结的超结mosfet结构及其制备方法
CN111969063A (zh) * 2020-09-21 2020-11-20 电子科技大学 一种具有漏端肖特基接触的超结mosfet
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