CN102593141B

CN102593141B - Electric field modulation type random memory cell array and memory

Info

Publication number: CN102593141B
Application number: CN201110304812.1A
Authority: CN
Inventors: 韩秀峰; 于国强; 陈怡然
Original assignee: Institute of Physics of CAS
Current assignee: Institute of Physics of CAS
Priority date: 2011-09-19
Filing date: 2011-09-26
Publication date: 2014-12-17
Anticipated expiration: 2031-09-26
Also published as: CN102593141A; CN102487124B; CN102709470B; CN102593129B; CN102593129A; US9559295B2; CN102856488B; WO2013040859A1; CN102487124A; US20140321199A1; CN102709470A; CN102856488A

Abstract

Disclosed are a novel electric field modulation type memory cell array and a random memory, wherein the memory comprises the novel electric field modulation type memory cell array and a corresponding read-write circuit. The memory cells in the memory cell array can use a structure of conducting layers, function layers and base layers or a structure of conducting layers, insulation layers, buffer layers, function layers and base layers. Both the structures are provided with two data reading lines and two data writing lines. The memory cells in the novel electric field modulation type memory cell array also can use a structure combined with a transistor and utilize the transistor to select memory cells. The random memory comprises a decoder of elementary rows, a sense amplifier, a decoder of columns, a register, a control circuit, a read-write driver, an input interface, an output interface and the like. The novel random memory has the advantages of being simple in structure, long in service life of components, low in power consumption and the like.

Description

A kind of electric field modulation type random memory cell array and memory

Technical field

The present invention relates to a kind of electric field modulation type random access memory technologies field, specifically, the present invention relates to a kind of electric field modulation type random memory cell array and electric field modulation type random asccess memory.

Background technology

Dynamic random access memory (DRAM) is the important component part of current computer, is usually also called internal memory by people.DRAM cellular construction is very simple, is made up of a transistor and an electric capacity.But because electric capacity exists leaky, therefore memory cell needs periodically to refresh.If memory cell refreshes, the information in unit will be lost, and Here it is, and usually said storage data have volatibility.In order to solve the problem of DRAM data volatility, there has been proposed many non-volatile RAMs, as: magnetic random memory (MRAM), Ferroelectric Random Access Memory (FRAM), phase-change random access memory (PRAM) and resistive random asccess memory (RRAM) etc.But due to some problems that itself exists, above-mentioned random asccess memory also cannot realize large-scale industrialization at present.

Regulated and controled by electric field, this memory cell can realize reversible transition in different Resistance states.This memory cell has that structure is simple, cell size is little, low in energy consumption and signal to noise ratio advantages of higher.And practical memory is large-scale memory array, and need and the read/write circuit that matches of large scale memory array.Therefore, the present invention proposes a kind of Array Design scheme can supporting electric field modulation type memory cell and the read/write circuit matched with it.

In patent CN 102129863 A, disclosing the patent that name is called " a kind of can the spin valve structure of electric field adjusting magneto-resistor and preparation technology thereof ", is only utilize multi-iron material to replace anti-ferromagnetic layer material in traditional Spin Valve in that patent; Change the magnetic moment direction of pinning layer by applying electric field, due to the difference of the magnetic moment direction of pinning layer and free layer, the scattering that the conduction electron of different spin direction is subject to is different, thus causes the change of Resistance states.Weak point is the Spin Valve still adopting traditional giant magnetoresistance structure, complicated structure; Resistance states is mainly derived from giant magnetoresistance effect with the change of external magnetic field but not the asymmetric Potential Distributing that causes of interface charge.And experimental result measured by this method is not obvious, the low and poor stability of magneto-resistor (MR).In patent WO 2008/111274 A1, disclose the patent that name is called the lamella structure (Laminate structure on semiconductor substrate) on semiconductor substrate, in that patent major embodiment monocrystalline γ-Al ₂o ₃as resilient coating, the crystal texture of PZT material is optimized; But this patent there is no and proposes to apply the resistance variations caused by electric field change.

Summary of the invention

In order to solve the problem, one object of the present invention is the array and the random asccess memory that provide a kind of electric field modulation type memory cell, described memory comprises the array of electric field modulation type memory cell and corresponding read/write circuit, can improve the reliability of writing speed and data write.

The object of the invention is to be achieved through the following technical solutions:

According to an aspect of the present invention, a kind of array of electric field modulation type memory cell is provided.

The memory cell of described storage array adopts without transistor arrangement.Described memory cell relies on the bottom, functional layer, resilient coating, insulating barrier and the conductive layer that are deposited on successively on substrate to realize the storage of data.By applying a voltage between bottom and buffering, the resistivity of conductive layer can be changed, and then realize the read and write of data.Each unit is connected with 4 strip metal wires.Wherein two strip metal wires are used for the reading of data, and another two strip metal wires are used for the write of data.Article two, digital independent plain conductor is mutually vertical, carries out digital independent for selecting the memory cell of infall; Article two, data write plain conductor is also mutually vertical, carries out data write for selecting the memory cell of intersecting.Storage array is made up of memory cell, and by right-angled intersection reading and write plain conductor form network structure.

According to another aspect of the present invention, a kind of array of electric field modulation type memory cell is provided.

The memory cell of described storage array adopts without transistor arrangement.Described memory cell relies on the bottom, functional layer and the conductive layer that are deposited on successively on substrate to realize the storage of data.By applying a voltage between bottom and conduction, the resistivity of conductive layer can be changed, and then realize the read and write of data.Each unit is connected with 4 strip metal wires.Wherein two strip metal wires are used for the reading of data, and another two strip metal wires are used for the write of data.Article two, digital independent plain conductor is mutually vertical, carries out digital independent for selecting the memory cell of infall; Article two, data write plain conductor is also mutually vertical, carries out data write for selecting the memory cell of intersecting.Storage array is made up of memory cell, and by right-angled intersection reading and write plain conductor form network structure.

In addition, be similar to above-mentioned read-write structure used, the memory cell multilayer film that the present invention proposes can also adopt: bottom, base substrate, functional layer, resilient coating, insulating barrier and conductive coating structure.

In addition, be similar to above-mentioned read-write structure used, the memory cell multilayer film that the present invention proposes can also adopt: bottom, base substrate, functional layer and conductive coating structure.

In addition, be similar to above-mentioned read-write structure used, the memory cell multilayer film that the present invention proposes can also adopt: bottom, functional substrate layer, resilient coating, insulating barrier and conductive coating structure.

In addition, be similar to above-mentioned read-write structure used, the memory cell multilayer film that the present invention proposes can also adopt: bottom, functional substrate layer and conductive coating structure.

According to another aspect of the present invention, a kind of array of electric field modulation type memory cell is provided.Electric field wherein in memory cell does not adopt vertical direction to apply mode, and adopts applying mode in face.Its structure is bottom, functional substrate layer, insulating barrier and conductive coating structure.That electric field applies electrode two ends in functional plane, and then the applying of the face of enforcement internal electric field.

According to a further aspect of the invention, the array of another electric field modulation type memory cell is provided.

The memory cell of described storage array adopts has transistor arrangement.Described memory cell relies on the bottom, functional layer, resilient coating, insulating barrier and the conductive layer that are deposited on successively above transistor to realize the storage of data.Connect wire by the metal of transistor gate and read data wire lines or write data wire lines cooperation and memory cell is selected.The metal of transistor gate connect with reading data wire lines and write data wire lines mutually vertical, carry out digital independent or write for selecting the memory cell of infall.Storage array is made up of memory cell, and by right-angled intersection reading and write plain conductor form network structure.

Present invention also offers the random asccess memory of the array containing above-mentioned three kinds of electric field modulation type memory cell, described random asccess memory also comprises row decoder, sense amplifier and column decoder, register, control circuit, read-write driving, register and input, input port etc.

Compared with prior art, the present invention has following technique effect:

1, device long service life.

3, be conducive to reducing device power consumption further.

4, writing speed can be improved.

5, the reliability of data write can be improved.

6, production process is less, and technique is simpler.

Accompanying drawing explanation

Figure 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H are the core texture schematic diagrames of eight kinds of electric field modulation type memory cell;

Fig. 2 A1,2A2,2A3,2B1,2B2,2B3,2C1,2C2,2C3,2D1,2D2,2D3,2E1,2E2,2E3,2F1,2F2,2F3,2G1,2G2,2G3,2G4,2G5,2G6 are core texture profile and the vertical view of the seven kinds of electric field modulation type memory cell corresponding to figure;

Fig. 3 is the array schematic diagram based on kind of the electric field modulation type memory cell of seven described in Fig. 1 and Fig. 2;

Fig. 4 A, 4B, 4C are section of structure and the vertical view of the electric field modulation type memory cell with transistor;

Fig. 5 A, 5B are two kinds of array schematic diagrames of the electric field modulation type memory cell with transistor;

Fig. 6 is the overall structure schematic diagram of the random asccess memory based on electric field modulation type memory cell of the present invention;

Fig. 7 a is nano-multilayer film structural representation of the present invention;

Fig. 7 b is structure A:BOL1/SUB/B FL/ISO/NM (or FM, or AFM)/CAP;

Fig. 7 c is structure B:SUB/BOL2/FCL/ISO/NM (or FM, or AFM)/CAP;

Fig. 7 d is structure C: SUB/BOL2/FCL/BFL/ISO/NM (or FM, or AFM)/CAP;

Fig. 7 e is structure D:SUB/BOL2/FCL/FM1/NM/FM2/AFM/CAP;

Fig. 7 f is structure E:SUB/BOL2/FCL/FM/AFM/CAP;

Fig. 7 g is structure F:SUB/BOL2/FCL/FM1/NM/FM2/CAP;

Fig. 7 h is structure G:SUB/BOL2/FCL/FM/CAP;

Fig. 7 i structure H:BOL1/SUB/FM1/NM/FM2/AFM/CAP;

Fig. 7 j is structure I: BOL1/SUB/FM/AFM/CAP;

Fig. 7 k is structure J:BOL1/SUB/FM1/NM/FM2/CAP;

Fig. 7 l is structure K:BOL1/SUB/FM/CAP;

Fig. 8 a is the structural representation of the nano-multilayer film of the embodiment of the present invention 1;

Fig. 8 b is that device resistance R is with extra electric field E variation relation schematic diagram.

The structural representation of the nano-multilayer film of Fig. 9 a embodiment of the present invention 2;

Fig. 9 b is intermediate conductive layer is magnetic metal Co ₇₅fe ₂₅device resistance R with extra electric field E variation relation schematic diagram;

Fig. 9 c is intermediate conductive layer is Co ₇₅fe ₂₅, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R, and the magnetic field applying 1kOe while measuring;

The Al film of Fig. 9 d to be intermediate conductive layer be 5nm, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R;

The antiferromagnetic alloy firm of IrMn of Fig. 9 e to be intermediate conductive layer be 5nm, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R;

Figure 10 a be according to the nanometer multilayer membrane structure in the embodiment of the present invention 3 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram;

Figure 10 b be according to the nanometer multilayer membrane structure in the embodiment of the present invention 4 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram.

Figure 10 c be according to the nanometer multilayer membrane structure in the embodiment of the present invention 5 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram.

Figure 10 d be according to the nanometer multilayer membrane structure in the embodiment of the present invention 6 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram.

Figure 10 e be according to the nanometer multilayer membrane structure in the embodiment of the present invention 7 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram.

Figure 10 f be according to the nanometer multilayer membrane structure in the embodiment of the present invention 8 in Fig. 1 a based on electric field modulation type field effect transistor schematic diagram.

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 a is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 3;

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 b is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 4;

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 c is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 5;

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 d is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 6;

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 e is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 7;

Electric field drive random asccess memory (Electric-field-switching Random Access Memory, the ERAM) principle schematic that Figure 11 f is be design principle is memory cell with the nano-device in Fig. 1 a according to the invention process example 8.

Embodiment

Fig. 1 (Figure 1A-Fig. 1 H) is the core texture schematic diagram of six kinds of electric field modulation type memory cell, and the random asccess memory based on above-mentioned electric field modulation type memory cell of the present invention has a kind of memory cell architectures.In this framework, the write of data utilizes the regulation and control of electric field to the electric polarization direction in ferroelectric material to realize.This new framework then requires that memory cell has special cellular construction, as shown in Figures 2 and 4.Wherein, cellular construction shown in Fig. 2 is without transistor arrangement, and Figure 4 shows that the form with transistor.

For the cellular construction shown in diagram, the composition form of its array as shown in Figure 3.And for having the unit of transistor, the form of its cell array as shown in Figure 5.

Give full play to the advantage of this memory cell, need the cellular construction, array structure and the read/write circuit that match with it.Below in conjunction with drawings and Examples the present invention done and describe further.

[embodiment 1]:

The invention provides the array of another kind of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 A (Fig. 2 A1, Fig. 2 A2, Fig. 2 A3) is exemplary.

In described unit, in multilayer film, conductive layer is connected with 2b with 1b and 2a by 1a.Resilient coating is connected by 1c and 2c.Bottom is connected by 1d with 2d.

In described unit, multilayer film is connected respectively by 1a, 1b, 1c and 1d and 2a, 2b, 2c and 2d.2a and 2d is plain conductor, for all memory cell being connected.2a and 2d is in same layer and is parallel to each other.2b and 2c is transition metal layer.

Described transition metal layer 2b is connected with wire 4a with 4b respectively by via 3a with 3b with 2c electrode.Wherein, 4a and 4b is plain conductor, for all memory cell being connected.4a and 4b is in same layer and is parallel to each other.

Described 2a with 4b wire is mutually vertical, for carrying out the reading of data to the unit of intersection.

When described 2a and 4b wire is for reading data, between 2a and 4b, measures the voltage at two ends by rill, and then obtain high-impedance state " 1 " or low resistance state " 0 ".

Described 4a with 2d wire is mutually vertical, for carrying out the write of data to the unit of intersection.

Described 4a and 2d wire is for realizing the write of data.During write data, in functional layer, producing electric field by applying suitable positive and negative voltage on 4a and 2d, changing the resistivity of conductive layer, and then " 0 " that realizes data is " with the storage of " 1 ".

Based on this element structure, constitute memory cell array by the form of Fig. 3.Wherein, each unit is connected with 4 metal line respectively.2a and 4a metal wire is used for the reading of data, corresponds respectively to RL1 and RL0, as shown in Figure 3.When carrying out digital independent, RL1 applies suitable positive voltage, and then by the digital independent in unit out.4b and 2d metal wire is used for the write of data, corresponds respectively to WL0 and WL1, as shown in Figure 4.When carrying out data write, apply suitable voltage between WL0 and WL1 and the electric coupling polar moment in functional layer is overturn, and then realize the write of data of conductive layer.In order to realize pressure between WL1 and WL0, by WL0 ground connection, and WL1 wire can apply a positive voltage.In order to realize negative voltage between WL1 and WL0, by WL1 ground connection, and WL0 wire can apply a positive voltage.

[embodiment 2]:

The invention provides a kind of array of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 B (Fig. 2 B1, Fig. 2 B2, Fig. 2 B3) is exemplary.

In described unit, in multilayer film, conductive layer is by 1a, 1b and 1c and 2a, 2b with 2c is connected.Bottom is connected by 1d with 2d.2a and 2d is plain conductor, for all memory cell being connected.2a and 2d is in same layer and is parallel to each other.2b and 2c is transition metal layer.

Described transition metal layer 2b is connected with wire 4a with 4b respectively by via 3a with 3b with 2c electrode.Wherein, 4a and 4b is plain conductor, for all memory cell being connected.4a and 4b is in same layer and parallel to each other.

Based on this element structure, constitute memory cell array by the form of Fig. 3.Wherein, each unit is connected with 4 metal line respectively.2a and 4b metal wire is used for the reading of data, corresponds respectively to RL1 and RL0, as shown in Figure 3.When carrying out digital independent, RL1 applies suitable positive voltage, and then by the digital independent in unit out.4a and 2d metal is used for the write of data, corresponds respectively to WL0 and WL1, as shown in Figure 4.When carrying out data write, apply suitable voltage between WL0 and WL1 and the electric coupling polar moment in functional layer is overturn, and then realize the write of data of conductive layer.In order to realize pressure between WL1 and WL0, by WL0 ground connection, and WL1 wire can apply a positive voltage.In order to realize negative voltage between WL1 and WL0, by WL1 ground connection, and WL0 wire can apply a positive voltage.

[embodiment 3]:

The invention provides the array of another kind of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 C (Fig. 2 C1, Fig. 2 C2, Fig. 2 C3) is exemplary.

In described unit, in multilayer film, conductive layer is connected with 2b with 1b and 2a by 1a.Resilient coating is connected by 1c and 2c.The bottom of substrate back is connected by 1d with 2d.

The array be made up of it is similar with 2 with above-described embodiment 1, as shown in Figure 3.

[embodiment 4]:

The invention provides a kind of array of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 D (Fig. 2 D1, Fig. 2 D2, Fig. 2 D3) is exemplary.

In described unit, in multilayer film, conductive layer is by 1a, 1b and 1c and 2a, 2b with 2c is connected.The bottom of substrate back is connected by 1d with 2d.2a and 2d is plain conductor, for all memory cell being connected.2a and 2d is in same layer and is parallel to each other.2b and 2c is transition metal layer.

[embodiment 5]:

The invention provides the array of another kind of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 E (Fig. 2 E1, Fig. 2 E2, Fig. 2 E3) is exemplary.

[embodiment 6]:

The invention provides a kind of array of electric field modulation type memory cell.The structural representation giving described array element that Fig. 2 F (Fig. 2 F1, Fig. 2 F2, Fig. 2 F3) is exemplary.

[embodiment 7]:

According to embodiment 1, the electric field wherein in memory cell does not adopt vertical direction to apply mode, and adopts applying mode in face.Its structure is as shown in Fig. 2 G (Fig. 2 G1, Fig. 2 G2, Fig. 2 G3, Fig. 2 G4, Fig. 2 G5, Fig. 2 G6), and wherein electric field applies electrode two ends in functional plane, and then the applying of the face of enforcement internal electric field.

[embodiment 8]:

The invention provides the array of another electric field modulation type memory cell.The structural representation giving described array element that Fig. 4 (Fig. 4 A, Figure 40 B, Figure 40 C) is exemplary.

In described unit, the bottom of multilayer film is connected with the drain electrode 2c of transistor by via 3a.

In described unit, the source electrode of transistor is connected with wire 2a by 1a.The source electrode of all transistors is connected and ground connection by wire 2a.

The grid of described transistor is connected with wire 2b by 1b.Grid in all unit is connected by wire 2b.

In described unit, the bottom of multilayer film is connected with metal wire 5c by via 4d.Conductive layer is connected with metal wire 5c by via 4c.Metal wire 5c ground connection.

In described unit, in multilayer film, conductive layer is connected by 4a with 5b.Resilient coating is connected by 4a and 5a.

In described unit, 5a with 5b is connected with metal wire 7a with 7b respectively by 6a with 6b.Metal wire 7a and 7b to be in same layer and to be parallel to each other.

Described metal wire 7a with 7b is all mutually vertical with metal wire 2b.Wherein, 7a and 2b is used for the write of data; 7b and 2b is used for the reading of data.

When described 7b and 2b wire is for reading data, between 7a and 2b, measures the voltage at two ends by rill, and then obtain high-impedance state " 1 " or low resistance state " 0 ".

Described 7a and 2b wire is for realizing the write of data.During write data, in functional layer, producing electric field by applying suitable positive and negative voltage on 7a and 2b, changing the resistivity of conductive layer, and then " 0 " that realizes data is " with the storage of " 1 ".

Based on this element structure, constitute memory cell array by the form of Fig. 5 A.Wherein, each unit can operate metal wire with 3 and a ground wire is connected respectively.Metal wire 2b corresponds to the WRL in Fig. 6, for forming criss-cross construction with reading metal wire or write metal wire and then first select memory cell.WRL is for opening the transistor of unit bottom.7b and 2b metal wire is used for the reading of data, and wherein 7b corresponds to RL metal wire, as shown in Figure 5A.

When carrying out digital independent, WRL applies suitable positive voltage, and then transistor in unit is opened.Meanwhile, RL applies positive voltage to read the data in the unit first selected.

7a and 2b metal wire is used for the reading of data, and wherein 7a corresponds to WL metal wire, as shown in Figure 5A.When carrying out data write, WRL applies suitable positive voltage, and then transistor in unit is opened.Meanwhile, WL applies voltage to write the data in the unit first selected.Apply suitable electricity between WL and WRL metal wire, negative pressure overturns the electric coupling polar moment in functional layer, and then realize the write of data of conductive layer.

[embodiment 9]:

According to the array element structure that embodiment 8 proposes, by the array formed as Fig. 5 B.

Wherein, each unit can operate metal wire with 3 respectively.In addition, the source electrode of each transistor is directly by metal guide through hole ground connection.

[embodiment 10]:

According to one embodiment of present invention, a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 1 is provided.Fig. 6 shows the overall structure schematic diagram of the random asccess memory of the present embodiment, comprises basic row decoder, sense amplifier and column decoder, register, control circuit, read-write driving, register and input, input port etc.Storage array in the present embodiment and read/write circuit thereof can adopt storage array described in above each embodiment and corresponding read/write circuit.It is worthy of note, structure chart in this embodiment is according to one of reservoir designs special example, this structure chart is made some change such as: the structure changing array, changes the change within this structural design spirit such as the mode of wiring and all should be included in and belong to the design of this embodiment.

[embodiment 11]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 2.

[embodiment 12]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 3.

[embodiment 13]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 4.

[embodiment 14]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 5.

[embodiment 15]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 6.

[embodiment 16]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 7.

[embodiment 17]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 8.

[embodiment 18]:

According to one embodiment of present invention, and similar described in embodiment 10, provide a kind of random asccess memory based on proposing electric field modulation type memory cell array in embodiment 9.

Wherein, said memory cells of the present invention can apply following nanometer multilayer membrane structure.

The object of the invention is to propose a kind of electric field regulation type nano-multilayer film, electric field modulation type field effect transistor, switching mode electric-field sensor and electric field drive random asccess memory, to be used for obtaining reversible electroresistance effect at room temperature electric field regulation and control nano-multilayer film, and realize the application of reversible electroresistance effect in electronic device.

This nano-multilayer film comprises from the bottom to top successively: bottom, substrate, bottom, functional layer, resilient coating, insulative barriers layer, intermediate conductive layer, cover layer, when wherein said intermediate conductive layer is magnetic metal, magnetic alloy or magnetic metal composite, resilient coating and insulating barrier can optionally add according to actual needs.Described intermediate conductive layer comprises metal level, electroconductive molecule material, topological insulator material or conductive doped semi-conducting material etc.Described metal level comprises nonmagnetic metal layer, magnetic metallic layers, antiferromagnetic layer etc.When described intermediate conductive layer nonmagnetic metal layer or antiferromagnetic layer, resilient coating and insulative barriers layer must add, to obtain higher signal to noise ratio.

A kind of electric field regulation type of the present invention nano-multilayer film, comprises from the bottom to top successively:

Bottom;

Base substrate;

Resilient coating

Insulative barriers layer

Conductive layer;

Top cover layer;

Wherein said bottom is electric conducting material, as bottom electrode for applying electric field in base substrate; Base substrate is ferroelectric or multi-ferroic material, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Resilient coating for as top electrode for applying electric field on ferroelectric or multi-ferroic material; Intermediate insulating layer is oxide; Top cover layer is protective layer, prevents intermediate conductive layer oxidized.By applying electric field between described bottom and resilient coating (upper/lower electrode), due to the electric polarization intensity size of base substrate (ferroelectric or multi-ferroic material) and the change in direction thereof, the face internal conductance of impact and change adjacent conductive layer, Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

In above-mentioned nano-multilayer film, described bottom comprises conductive metallic material;

In above-mentioned nano-multilayer film, described substrate comprises ferroelectric or multi-ferroic material substrate;

In above-mentioned nano-multilayer film, described resilient coating can improve the interface of base substrate and multilayer film, can be used as top electrode for applying electric field on ferroelectric or multiferroic film material;

In above-mentioned nano-multilayer film, described conductive layer can ideally grow on insulative barriers layer, and its conductance can be interacted by electric polarization or magneto-electric coupled effect is subject to the ferroelectric or electric polarization intensity size of multiferroic film in bottom and the regulation and control in direction.

In above-mentioned nano-multilayer film, described conductive layer comprises nonmagnetic metal layer, magnetic metallic layers, antiferromagnetic layer, electroconductive molecule material, topological insulator material or conductive doped semi-conducting material etc.;

In above-mentioned nano-multilayer film, described nonmagnetic metal layer is by nonmagnetic metal or its alloy composition, and thickness is 2-100nm;

In above-mentioned nano-multilayer film, described intermediate conductive layer is electroconductive molecule material, topological insulator material or conductive doped semi-conducting material composition.

In above-mentioned nano-multilayer film, described magnetic metallic layers is made up of magnetic metal or its alloy, and thickness is 2-100nm; Or be made up of dilute magnetic semiconductor material or semi-metallic, thickness is 2-100nm.

In above-mentioned nano-multilayer film, described magnetic metallic layers comprises direct or indirect pinning structure, and direct pinning structure comprises antiferromagnetic layer (AFM)/ferromagnetic layer (FM); Indirect pinning structure comprises antiferromagnetic layer (AFM)/first ferromagnetic layer (FM1)/non-magnetic metal layer (NM)/second ferromagnetic layer (FM2).

In above-mentioned nano-multilayer film, described antiferromagnetic materials comprise and have anti-ferromagnetic alloy or oxide.

In above-mentioned nano-multilayer film, described ferromagnetic layer (FM), the first ferromagnetic layer (FM1) and the second ferromagnetic layer (FM2) are made up of ferromagnetic metal or its alloy, and thickness is 2 ~ 100nm; Or be made up of dilute magnetic semiconductor material or semi-metallic, thickness is 2 ~ 100nm.

In above-mentioned nano-multilayer film, described cover layer comprises the single or multiple lift film be made up of non-easy oxidation metal material, and thickness is 2 ~ 200nm.

A kind of electric field modulation type nano-multilayer film of the present invention, comprises from the bottom to top successively:

Base substrate;

Bottom;

Functional layer

Resilient coating

Insulative barriers layer

Conductive layer;

Top cover layer;

Wherein said bottom is electric conducting material, is used for applying electric field on a functional as bottom electrode; Functional layer is ferroelectric or multiferroic film, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Resilient coating as top electrode for applying electric field on ferroelectric or multiferroic film material; Intermediate insulating layer is oxide; Top cover layer is protective layer, prevents intermediate conductive layer oxidized.By applying electric field between described bottom and resilient coating (upper/lower electrode).Due to the electric polarization intensity size of functional layer (ferroelectric or multi-ferroic material) and the change in direction thereof, impact and change the face internal conductance of adjacent conductive layer, Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

In above-mentioned nano-multilayer film, described substrate comprises Si substrate, SiC, glass substrate or Si-SiO ₂substrate, MgO single crystalline substrate, Al ₂o ₃single crystalline substrate or organic flexible substrate etc.

In above-mentioned nano-multilayer film, described bottom comprises conductive metallic material.

In above-mentioned nano-multilayer film, described functional layer comprises ferroelectric or multiferroic nano thin-film, can deposited seed layer in advance according to actual needs, for optimizing the interface with base substrate, improves crystal structure that is ferroelectric or multiferroic nano thin-film.

In above-mentioned nano-multilayer film, described resilient coating can improve the interface of insulative barriers layer and functional layer, can be used as top electrode for applying electric field on ferroelectric or multiferroic film material.

In above-mentioned nano-multilayer film, described conductive layer can ideally grow on insulative barriers layer, and its conductance (resistance) is enough to be interacted by electric polarization or magneto-electric coupled effect is subject to the ferroelectric or electric polarization intensity size of multiferroic film in bottom and the regulation and control in direction.

In above-mentioned nano-multilayer film, described conductive layer comprises nonmagnetic metal layer, magnetic metallic layers, antiferromagnetic layer, electroconductive molecule material, topological insulator material or conductive doped semi-conducting material etc.

In above-mentioned nano-multilayer film, described nonmagnetic metal layer is by nonmagnetic metal or its alloy composition, and thickness is 2-100nm.

The invention provides a kind of electric field regulation type nano-multilayer film, comprise successively from the bottom to top:

Bottom

Base substrate;

Magnetosphere;

Top cover layer;

Wherein said bottom is electric conducting material, as bottom electrode for applying electric field on ferroelectric or multi-ferroic material; Base substrate is ferroelectric or multi-ferroic material, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Top cover layer, as top electrode and protective layer, prevents intermediate magnetic layers oxidized.By applying electric field between described bottom and top cover layer (upper/lower electrode), due to the electric polarization intensity size of base substrate (ferroelectric or multi-ferroic material) and the change in direction thereof, the face internal conductance of impact and change adjacent magnetic layers, Resistance states different under can obtaining not same electric field, causes the generation of reversible electroluminescent resistance.

In above-mentioned nano-multilayer film, described substrate comprises ferroelectric or multi-ferroic material substrate.

In above-mentioned nano-multilayer film, described magnetosphere can ideally grow on base substrate material, and its conductance can be interacted by electric polarization or magneto-electric coupled effect is subject to the ferroelectric or electric polarization intensity size of multiferroic film in bottom and the regulation and control in direction.

In above-mentioned nano-multilayer film, described magnetosphere is made up of feeromagnetic metal or its alloy, and thickness is 2-100nm; Or be made up of dilute magnetic semiconductor material or semi-metallic, thickness is 2-100nm.

In above-mentioned nano-multilayer film, described magnetosphere comprises direct or indirect pinning structure, and direct pinning structure comprises antiferromagnetic layer (AFM)/ferromagnetic layer (FM); Indirect pinning structure comprises antiferromagnetic layer (AFM)/first ferromagnetic layer (FM1)/non-magnetic metal layer (NM)/second ferromagnetic layer (FM2).

In above-mentioned nano-multilayer film, described antiferromagnetic layer is made up of antiferromagnetic materials, and described antiferromagnetic materials comprise and have anti-ferromagnetic alloy or oxide.

Base substrate;

Bottom;

Functional layer

Magnetosphere;

Top cover layer;

Wherein said base substrate is non-ferroelectric or multi-ferroic material; Described bottom is electric conducting material; Be used for applying electric field on a functional as bottom electrode; Functional layer is ferroelectric or multiferroic film, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Top cover layer, as top electrode and protective layer, prevents intermediate magnetic layers oxidized.By applying electric field between described bottom and top cover layer (upper/lower electrode), due to the electric polarization intensity size of functional layer (ferroelectric or multiferroic film material) and the change in direction thereof, affect and change adjacent metal and magnetospheric internal conductance, Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

In above-mentioned nano-multilayer film, described functional layer comprises ferroelectric or multiferroic nano thin-film.

In above-mentioned nano-multilayer film, described magnetosphere can ideally grow on the material of functional layer, and its conductance can be interacted by electric polarization or magneto-electric coupled effect is subject to the ferroelectric or electric polarization intensity size of multiferroic film in bottom and the regulation and control in direction.

The invention provides a kind of electric field modulation type field effect transistor based on electroresistance effect.Electric field regulation type nano-multilayer film according to first, second, third and fourth aspect of the present invention, by applying different voltage at grid, forms certain electric field between top cover layer and bottom.Separately between source electrode and drain electrode, apply certain voltage, due to the generation of electroresistance effect, under different electric fields, the resistance of multilayer film is different, causes different to the conductance of drain electrode from source electrode.Therefore, can be regulated and controled from the conductance of source electrode to drain electrode or the size of resistance value by grid voltage.

The invention provides a kind of switching mode electric-field sensor based on electroresistance effect.Electric field regulation type nano-multilayer film according to first, second, third and fourth aspect of the present invention, make when under External Electrical Field, the electroluminescent resistance of nano-multilayer film can change, thus the high low resistance output characteristic of the acquisition of correspondence.

The invention provides a kind of based on electroresistance effect, namely with the nano-device of the electric field regulation and control electric field drive random asccess memory (Electric-field-switching Random Access Memory, ERAM) (being called for short electric random asccess memory) that is memory cell.

The present invention proposes a kind of preparation method of electric field regulation type nano-multilayer film, adopts magnetron sputtering in conjunction with Laser deposition, molecular beam epitaxy, ald or gas-phase chemical reaction deposition growing method successively deposit primer layer, resilient coating, insulative barriers layer, conductive layer and top cover layer; Wherein said bottom is electric conducting material, as bottom electrode for applying electric field on ferroelectric or multi-ferroic material; Base substrate is ferroelectric or multi-ferroic material, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Resilient coating as top electrode for applying electric field on ferroelectric or multi-ferroic material; Middle insulative barriers layer is oxide; Top cover layer is protective layer, prevents intermediate conductive layer oxidized; By applying electric field between described bottom and resilient coating, due to the electric polarization intensity size of base substrate and the change in direction thereof, impact and change the face internal conductance of adjacent conductive layer, Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

The present invention proposes the preparation method of another kind of electric field regulation type nano-multilayer film, adopts magnetron sputtering and in conjunction with Laser deposition, molecular beam epitaxy, ald or gas-phase chemical reaction deposition growing method deposit primer layer, functional layer, resilient coating, insulative barriers layer, conductive layer and top cover layer successively in base substrate; Wherein said bottom is electric conducting material, is used for applying electric field on a functional as bottom electrode; Described functional layer is ferroelectric or multiferroic film, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Described resilient coating as top electrode for applying electric field on ferroelectric or multiferroic film material; The insulative barriers layer of described centre is oxide; Described top cover layer is protective layer; prevent intermediate conductive layer oxidized; by applying electric field between described bottom and resilient coating; due to the electric polarization intensity size of functional layer and the change in direction thereof; the face internal conductance of impact and change adjacent conductive layer; Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

The present invention proposes the preparation method of another electric field regulation type nano-multilayer film, adopts magnetron sputtering and in conjunction with Laser deposition, molecular beam epitaxy, ald or gas-phase chemical reaction deposition growing method deposit primer layer, magnetosphere and top cover layer successively in base substrate; Wherein said bottom is electric conducting material, as bottom electrode for applying electric field on ferroelectric or multi-ferroic material; Base substrate is ferroelectric or multi-ferroic material, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Top cover layer is as top electrode and protective layer; prevent intermediate magnetic layers oxidized; by applying electric field between described bottom and top cover layer; due to the electric polarization intensity size of base substrate and the change in direction thereof; the face internal conductance of impact and change adjacent metal (magnetosphere); Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

The preparation method of another electric field regulation type nano-multilayer film of proposition of the present invention, adopts magnetron sputtering and in conjunction with Laser deposition, molecular beam epitaxy, ald or gas-phase chemical reaction deposition growing method deposit primer layer, functional layer, magnetosphere and top cover layer successively in base substrate; Wherein said base substrate is non-ferroelectric or multi-ferroic material; Described bottom is electric conducting material, is used for applying electric field on a functional as bottom electrode; Functional layer is ferroelectric or multiferroic film, under the effect of electric field, can change and regulate and control size and the direction thereof of its electric polarization intensity; Top cover layer, as top electrode and protective layer, prevents intermediate magnetic layers oxidized; By applying electric field between described bottom and top cover layer, due to the electric polarization intensity size of functional layer and the change in direction thereof, the face internal conductance of impact and change adjacent metal (magnetosphere), Resistance states different under can obtaining not same electric field, causes the generation of reversible electroresistance effect.

Fig. 7 a illustrates the nano-multilayer film according to the embodiment of the present invention, and it comprises from the bottom to top successively: bottom 102 (referred to as BOL1), substrate 101 (referred to as SUB), bottom 103 (referred to as BOL2), functional layer 104 (referred to as FCL), resilient coating 105 (referred to as BFL), insulating barrier 106 (referred to as ISO), intermediate conductive layer 107 (referred to as IML), cover layer 108 (referred to as CAP).Below each layer is described in detail.

Substrate 101 is ferroelectric or multiferroic substrate, or general substrate comprises Si substrate, SiC, glass substrate or Si-SiO ₂substrate, MgO single crystalline substrate, Al ₂o ₃single crystalline substrate or organic flexible substrate etc.

In above-mentioned base substrate, substrate 101 is ferroelectric or multiferroic substrate, comprises Pb (Mg _1/3nb _2/3) O ₃-PbTiO ₃(PMN-PT), BiFeO ₃(BFO), BaTiO ₃, Pb (Zn _1/3nb _2/3) O ₃-PbTiO ₃(PZN-PT), PbTiO ₃(PTO), SrTiO ₃(STO), BiMnO ₃etc. ferroelectric or multiferroic substrate, thickness is 0.1 ~ 1mm.

In above-mentioned nano-multilayer film, described substrate is general substrate, comprises Si substrate, SiC, glass substrate or Si-SiO ₂substrate, MgO single crystalline substrate, Al ₂o ₃single crystalline substrate or organic flexible substrate etc., thickness is 0.1 ~ 1mm.

In above-mentioned nano-multilayer film, bottom 102 is conductive metal layer.This conductive metal layer generally adopts Cu, Cr, V, Nb, Mo, Ru, Pd, Ta, W, Pt, Ag, Au or its alloy to make, and thickness is 2.0 ~ 100nm.

In nano-multilayer film, bottom 103 is conductive metal layer.This conductive metal layer generally adopts Cu, Cr, V, Nb, Mo, Ru, Pd, Ta, W, Pt, Ag, Au or its alloy to make, and thickness is 2.0 ~ 100nm

Functional layer is 104 is ferroelectric or multiferroic film.This ferroelectric or multiferroic film generally comprises Pb (Mg _1/3nb _2/3) O ₃-PbTiO ₃(PMN-PT), BiFeO ₃(BFO), BaTiO ₃(BTO), PbTiO ₃(PTO), SrTiO ₃(STO), BiMnO ₃deng, thickness is 5-500nm; In order to assurance function layer is relatively good and comparatively tight with base substrate combination, SrRuO can be deposited in advance ₃, TiO ₂etc. Seed Layer.

Resilient coating 105 generally adopts conductivity relatively good and combines non-magnetic metal layer (comprising individual layer or multilayer) more closely with substrate, its material preferred Ta, Ru, Cr, Au, Ag, Pt, Pd, Cu, CuN etc., also can be metal alloy or metal composite layer, thickness can be 2.0 ~ 100nm.

Insulating barrier 106 is generally AlO _x, MgO, Mg _1-xzn _xo, AlN, Ta ₂o ₅, MgAlO _x, ZnO, MgSiO _x, SiO ₂, HfO ₂, TiO ₂, Alq3, LB organic compound film, the material such as GaAs, AlGaAs, InAs make, preferred MgO, AlOx, MgZnO, AlN and Alq3, LB organic compound film, thickness is generally being 0.5 ~ 10nm.

Intermediate conductive layer 107 is ferromagnetic metal, or directly pinning structure or indirectly pinning structure." direct pinning " refers to that antiferromagnet layer AFM directly contacts with ferromagnetic layer FM (being abbreviated as AFM/FM), and " indirect pinning " refers to and insert composite bed NM/FM (being abbreviated as FM1/NM/FM2/AFM) between.

In above-mentioned magnetosphere 107, feeromagnetic metal comprises the higher ferromagnetic metal of spin polarizability, preferred Co, Fe, Ni; Or the alloy firm of these ferromagnetic metals, preferred Co-Fe, Co-Fe-B, NiFeCr or Ni-Fe (as: Ni ₈₁fe ₁₉, Co ₇₅fe ₂₅) etc. ferromagnetic alloy, thickness is 2.0 ~ 100nm; Or the dilute magnetic semiconductor material such as such as GaMnAs, Ga-Mn-N, or such as Co-Mn-Si, Co-Fe-Al, Co-Fe-Si, Co-Mn-Al, Co-Fe-Al-Si, Co-Mn-Ge, Co-Mn-Ga, Co-Mn-Ge-Ga, La _1-xsr _xmnO ₃, La _1-xca _xmnO ₃semi-metallics such as (wherein 0<X<1), thickness is 2.0 ~ 100nm.

In above-mentioned magnetosphere 107, antiferromagnetic layer AFM comprises and has anti-ferromagnetic alloy material, preferred Pt-Mn, Ir-Mn, Fe-Mn and Ni-Mn, and thickness is 5 ~ 50nm; Or there is anti-ferromagnetic oxide, preferred CoO, NiO, thickness is 5 ~ 50nm.Ferromagnetic layer FM adopts the ferromagnetic metal that spin polarizability is higher, preferred Co, Fe, Ni; Or the alloy firm of these ferromagnetic metals, preferred Co-Fe, Co-Fe-B, NiFeCr or Ni-Fe (as: Ni ₈₁fe ₁₉, Co ₇₅fe ₂₅) etc. ferromagnetic alloy, thickness is 2.0 ~ 100nm; Or the dilute magnetic semiconductor material such as such as GaMnAs, Ga-Mn-N, or such as Co-Mn-Si, Co-Fe-Al, Co-Fe-Si, Co-Mn-Al, Co-Fe-Al-Si, Co-Mn-Ge, Co-Mn-Ga, Co-Mn-Ge-Ga, La _1-xsr _xmnO ₃, La _1-xca _xmnO ₃semi-metallics such as (wherein 0<X<1), thickness is 2.0 ~ 100nm.The ultra-thin non-magnetic metal layer NM be inserted between ferromagnetic layer FM and antiferromagnetic layer AFM generally adopts Cu, Cr, V, Nb, Mo, Ru, Pd, Ta, W, Pt, Ag, Au or its alloy to make, and thickness is 0.1 ~ 5nm.

Be the reasonable non-magnetic metal layer of conductivity (comprising individual layer or multilayer composite metal film) at above-mentioned intermediate conductive layer.Its material preferred Ta, Cu, Ti, Ru, Au, Ag, Pt, Al, Cr, V, W, Nb etc., thickness is 2.0 ~ 100nm.

Be antiferromagnetism metal level at above-mentioned intermediate conductive layer.Its material preferred IrMn, FeMn, PtMn, NiMn, thickness is 5 ~ 50nm.Or there is anti-ferromagnetic oxide, preferred CoO, NiO etc., thickness is 5 ~ 50nm.

Be electroconductive molecule material, topological insulator material or conductive doped semi-conducting material etc. at above-mentioned intermediate conductive layer.The electric conducting material such as the preferred Graphene of its material, doped polyacetylene, Sb, Bi-Te, Bi-Se, Sb-Te.

Cover layer 108 is not easily oxidized and the metal level that conductivity is reasonable (comprising individual layer or multilayer composite metal film); its material preferred Ta, Cu, Ti, Ru, Au, Ag, Pt etc.; thickness is 2.0 ~ 200nm, the not oxidized and corrosion for the protection of core texture.

Therefore, magnetic nano-multilayer film structure of the present invention includes but not limited to:

Structure A:BOL1/SUB/B FL/ISO/NM (or FM, or AFM)/CAP (Fig. 7 b);

Structure B:SUB/BOL2/FCL/ISO/NM (or FM, or AFM)/CAP (Fig. 7 c);

Structure C: SUB/BOL2/FCL/BFL/ISO/NM (or FM, or AFM)/CAP (Fig. 7 d);

Structure D:SUB/BOL2/FCL/FM1/NM/FM2/AFM/CAP (Fig. 7 e);

Structure E:SUB/BOL2/FCL/FM/AFM/CAP (Fig. 7 f);

Structure F:SUB/BOL2/FCL/FM1/NM/FM2/CAP (Fig. 7 g);

Structure G:SUB/BOL2/FCL/FM/CAP (Fig. 7 h);

Structure H:BOL1/SUB/FM1/NM/FM2/AFM/CAP (Fig. 7 i);

Structure I: BOL1/SUB/FM/AFM/CAP (Fig. 7 j);

Structure J:BOL1/SUB/FM1/NM/FM2/CAP (Fig. 7 k);

Structure K:BOL1/SUB/FM/CAP (Fig. 7 l);

Example 1:

Magnetron sputtering apparatus is better than 2 × 10 with vacuum ^-6pa, deposition rate is 0.06nm/s, and Ar Pressure is the condition of 0.07Pa, directly at (001)-PMN-PT ferroelectric oxide Grown 5nm Co ₇₅fe ₂₅as magnetosphere.Then at 5nm Co ₇₅fe ₂₅on magnetosphere, Direct precipitation 6nm Ta is as top cover layer, prevents Co ₇₅fe ₂₅magnetospheric oxidation.Then the nano-multilayer film obtained is put into magnetron sputtering apparatus, vacuum is better than 2 × 10 ^-5pa, deposition rate is 10nm/min, and Ar Pressure is 0.1Pa, at the Au film of the tectal deposited atop 100nm of 6nm Ta, in order to preparing top electrodes.Finally at back Direct precipitation 10nm Cr, 100nmAu film of (001)-PMN-PT ferroelectric oxide substrate base as back bottom electrode, to apply electric field.

(-8kV/cm) electric field to 8kV/cm is applied, as shown in Figure 8 a between contact electrode and the Au film of (001)-PMN-PT ferroelectric oxide substrate base lower surface; Fig. 8 b is the measurement result schematic diagram applying the electric field E of additional change and the resistance of nano-multilayer film between contact electrode and the Au film of (001)-PMN-PT ferroelectric oxide substrate base lower surface.

Example 2:

Magnetron sputtering apparatus is better than 1 × 10 with vacuum ^-6pa, deposition rate is 0.1nm/s, and during deposition, Ar Pressure is the condition of 0.07Pa, and (001)-PMN-PT ferroelectric oxide substrate base deposits Ta (5nm) resilient coating (BFL).Then on magnetron sputtering apparatus, 2 × 10 are better than with vacuum ^-6pa, deposition rate is 0.07nm/s, and Ar Pressure is the condition of 0.07Pa, and directly on resilient coating Ta, deposit thickness is the AlO of 1.0nm _xas insulative barriers layer.Then 1 × 10 is better than in vacuum ^-6pa, deposition rate is 0.1nm/s, and deposition Ar Pressure is under the condition of 0.07Pa, at 1.0nm AlO _xinsulative barriers layer on the magnetic metal Co of Direct precipitation 5nm ₇₅fe ₂₅(or the nonmagnetic metal Al of Direct precipitation 5nm, or the antiferromagnetic layer IrMn of deposition 5nm) as intermediate conductive layer.At the Au of (001)-PMN-PT ferroelectric oxide substrate lower surface sputtering 10nm about Cr, 100nm, be convenient to apply electric field.

(-8kV/cm) electric field to 8kV/cm is applied between contact electrode and the Au film of (001)-PMN-PT ferroelectric oxide substrate base lower surface.As illustrated in fig. 9; Fig. 9 b is intermediate conductive layer is Co ₇₅fe ₂₅, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R; Fig. 9 c is intermediate conductive layer is Co ₇₅fe ₂₅, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R, and the magnetic field applying 1kOe while measuring, so that the electric field of the resistance of Measurement and analysis nano-multilayer film and additional change, and the relation between external reinforcement fixed-field.As can be seen from the figure still there is the resistance variations relation of ~ 260%.Can analyze from measurement result in addition, added external magnetic field does not impact the R-E curve of nano-multilayer film.Illustrate that this effect not originates from magnetic interaction.The Al film of Fig. 9 d to be intermediate conductive layer be 5nm, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R.As can be seen from the figure still there is the resistance variations of ~ 100%.Also from side elevation describe this effect not derive from magnetoelectricity interact.The IrMn film of Fig. 9 e to be intermediate conductive layer be 5nm, the electric field E of additional change and the measurement result schematic diagram of nanometer multilayer film resistance R.As can be seen from the figure still there is the resistance variations of ~ 44%.

Example 3: according to the method for example 1 and 2, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric substrate substrate _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Finally at the backside deposition bottom Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Make electrode: the ma-N440 ultraviolet photoresist that first spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, the ma-N440 ultraviolet photoresist that spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in conductive layer Co ₇₅fe ₂₅; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, the ma-N440 ultraviolet photoresist that spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilizing magnetron sputtering apparatus to deposit Cr 5nm, Au 10nm, etch areas can be filled and led up by the thickness of the two substantially; Then the device of preparation is put into the stripping that acetone carries out photoresist; Utilize magnetron sputtering apparatus again, at stripping SiO ₂after device above deposit Cr 10nm, Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As shown in Figure 10 a, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 4: according to the method for example 1 and 2, utilizes pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus, at Si/SiO ₂deposited on substrates underlying metal Cu50nm, then pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus deposit functional layers (001)-PMN-PT ferroelectric oxide (Seed Layer can be grown in advance according to technical requirement) is utilized, then buffer layer Ta 5nm, insulating barrier AlO successively on PMN-PT ferroelectric oxide film _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Make electrode: the ma-N440 ultraviolet photoresist that first spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, the ma-N440 ultraviolet photoresist that spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in conductive layer Co ₇₅fe ₂₅; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, the ma-N440 ultraviolet photoresist that spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilizing magnetron sputtering apparatus to deposit Cr 5nm, Au 10nm, etch areas can be filled and led up by the thickness of the two substantially; Then the device of preparation is put into the stripping that acetone carries out photoresist; Utilize magnetron sputtering apparatus again, at stripping SiO ₂after device above deposit Cr 10nm, Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As shown in fig. lob, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 5: according to the method for example 1 and 2, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Finally at the backside deposition bottom Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Make electrode: the ma-N440 ultraviolet photoresist that first spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Utilize magnetron sputtering apparatus again, at stripping SiO ₂after device above deposit Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As shown in figure l oc, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 6: according to example 3 method, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Finally at the backside deposition bottom Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Make electrode: first a spin coating ~ 1 μm thick ma-N440 ultraviolet photolithographic bears glue on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, μm thick ma-N440 ultraviolet photoresist in even spin coating ~ 1 of whole device surface, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Plasma etching method is used to carry out etching the region not having photoresist to cover, namely at insulating barrier SiO ₂punch, etching depth is to resilient coating Ta.Then device is put into acetone and remove photoresist; Utilize magnetron sputtering apparatus again, on device, deposit Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use plasma etching method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As shown in fig. 10d, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 7: according to the method for example 1 and 2, utilizes pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus, at Si/SiO ₂deposited on substrates underlying metal Cu50nm, then pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus deposit functional layers (001)-PMN-PT ferroelectric oxide (Seed Layer can be grown in advance according to technical requirement) is utilized, then buffer layer Ta 5nm, insulating barrier AlO successively on PMN-PT ferroelectric oxide film _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Make electrode: the ma-N440 ultraviolet photoresist that first spin coating 1 μm is thick on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Utilize magnetron sputtering apparatus again, at stripping SiO ₂after device above deposit Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As illustrated in figure 10e, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 8: according to the method for example 1 and 2, utilizes pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus, at Si/SiO ₂deposited on substrates underlying metal Cu50nm, then pulsed laser deposition (PLD), ald (ALD), molecular beam epitaxy or magnetron sputtering apparatus deposit functional layers (001)-PMN-PT ferroelectric oxide (Seed Layer can be grown in advance according to technical requirement) is utilized, then buffer layer Ta 5nm, insulating barrier AlO successively on PMN-PT ferroelectric oxide film _x1nm, intermediate conductive layer Co ₇₅fe ₂₅5nm and top cover layer Ta 5nm.Make electrode: first a spin coating ~ 1 μm thick ma-N440 ultraviolet photolithographic bears glue on the nano-multilayer film of preparation, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use dry plasma etch method to carry out etching the region not having photoresist to cover, etching depth terminates in resilient coating Ta; And then utilize magnetron sputtering apparatus depositing insulating layer SiO ₂, insulating barrier SiO ₂thickness substantially etch areas can be filled and led up; Then the device of preparation is put into the stripping that acetone carries out photoresist; Repeat above lithography step again, μm thick ma-N440 ultraviolet photoresist in even spin coating ~ 1 of whole device surface, utilizes previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Plasma etching method is used to carry out etching the region not having photoresist to cover, namely at insulating barrier SiO ₂punch, etching depth is to resilient coating Ta.Then device is put into acetone and remove photoresist; Utilize magnetron sputtering apparatus again, on device, deposit Au 100nm; Repeat above lithography step again, at the S1813 ultraviolet photoresist that the even spin coating of whole device surface 1 μm is thick, utilize previously prepared photolithography plate and ultraviolet exposure machine to carry out exposure-processed; Photoresist after uv-exposure is developed, fixing; Use plasma etching method to carry out etching the region not having photoresist to cover, finally device is put into acetone and remove photoresist, obtain source electrode s, grid g and drain electrode d.As shown in figure 10f, the structural principle structural representation of field effect transistor.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 9: according to example 3 method, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer Al5nm and top cover layer Ta 5nm.Finally at backside deposition bottom 10nmCr, Au100nm of (001)-PMN-PT ferroelectric oxide substrate base.Utilize the micro-processing method in example 3, source electrode s, the grid g of preparation field effect transistor and drain electrode d.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 10: according to example 3 method, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer Al 5nm and top cover layer Ta 5nm.Finally at backside deposition bottom 10nm Cr, the Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Utilize the micro-processing method in example 4, source electrode s, the grid g of preparation field effect transistor and drain electrode d.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 11: according to example 3 method, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer IrMn 5nm and top cover layer Ta 5nm.Finally at backside deposition bottom 10nm Cr, the Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Utilize the micro-processing method in example 3, source electrode s, the grid g of preparation field effect transistor and drain electrode d.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 12: according to example 3 method, utilize magnetron sputtering apparatus, buffer layer Ta 5nm, insulating barrier AlO successively on (001)-PMN-PT ferroelectric oxide substrate base _x1nm, intermediate conductive layer IrMn 5nm and top cover layer Ta 5nm.Finally at backside deposition bottom 10nm Cr, the Au 100nm of (001)-PMN-PT ferroelectric oxide substrate base.Utilize the micro-processing method in example 4, source electrode s, the grid g of preparation field effect transistor and drain electrode d.According to the method for testing in example 1 and 2, grid g applies the voltage V changed _g, between source electrode and drain electrode, apply V _dS, by different voltage, the resistance between source electrode and drain electrode is modulated, thus obtains different drain currents, namely obtain output characteristic curve.

Example 13:

Figure 11 a is the principle schematic of the embodiment of the present invention 13 based on the resistor random-access memory unit of reversible electroresistance effect.As can be seen from the figure, this memory cell comprises electroluminescent resistance nano-device, wordline (word line), sense bit line (bit line), write bit line (digit line), ground wire (ground line) and 1 transistor.

In the addressing read operation of ERAM, first make transistor in conducting state by being provided a suitable level by the wordline word line selected, then a read current is correspondingly derived by by the sense bit line bit line selected, this read current ~ 1mA, ground wire ground line is arrived via the drain electrode of nanometer storing unit, source electrode, transistor, thus obtaining current nanometer storing cell resistance size, same standard value in advance compares, and obtains the data message stored in ERAM unit.

In the addressing write operation of ERAM, first make transistor in conducting state by being provided a suitable level by the wordline word line selected, then by being applied a larger voltage by the write bit line digit line selected, (this voltage is greater than the critical turnover voltage V of resistance ₀), so just between grid and bottom, form electric field, due to electroresistance effect, just can realize the change of the high low resistance state of nanometer storing unit, this completes the write to ERAM memory cell data.

Above ERAM memory cell designs according to based on example 3 design principle, can carry out design ERAM memory cell, as Figure 11 b, 11c, 11d, 11e, 11f so equally according to the design principle of example 4,5,6,7,8.The ERAM memory cell designed based on design principle according to example 4,5,6,7,8, operation principle is similar with memory cell in Figure 11 a.Bottom white space wherein in Figure 11 b, 11e, 11f corresponds to base substrate, the ferroelectric or multi-ferroic material of right and wrong.The peripheral circuits such as wordline, write bit line, sense bit line, ground wire all should based on carrying out design preparation based on base substrate.The structural representation of above ERAM memory cell only indicates core structural layer, and other accessory structure layer can add according to actual conditions, but still within the protection range being in this patent.

A kind of electric field regulation type of proposition provided by the invention nano-multilayer film, electric field modulation type field effect transistor, switching mode electric-field sensor and electric field drive random asccess memory and preparation method, to be used for obtaining the electroresistance effect under room temperature in Electric Field Modulated nano-multilayer film.The present invention by the electric field of change to the modulation of the electrical polarization characteristics of ferroelectric or multi-ferroic material, impact and change the conductance of conductive layer, the change of regulation and control device resistance, thus obtain Resistance states corresponding to different electric fields.

The array of electric field modulation type memory cell provided by the invention and random asccess memory compared with prior art, have following technique effect:

1, device long service life.

3, be conducive to reducing device power consumption further.

4, writing speed can be improved.

5, the reliability of data write can be improved.

6, production process is less, and technique is simpler.

Certainly; the present invention also can have other various embodiments; when not deviating from the present invention's spirit and essence thereof; those of ordinary skill in the art can make various corresponding change and distortion according to the present invention, but these change accordingly and are out of shape the protection range that all should belong to the claims in the present invention.

Claims

1. an electric field modulation type memory cell array, is characterized in that, described memory cell relies on the bottom, functional layer, resilient coating, insulating barrier and the conductive layer that are deposited on successively on substrate to realize the storage of data; The reading of data is realized by two metal line be connected with conductive layer; By two metal line that are connected with conductive layer and bottom, functional layer is carried out to the applying of electric field, to realize the write of data.

2. electric field modulation type memory cell array according to claim 1, is characterized in that, applying mode in the electric field employing face in memory cell.

3. according to a kind of electric field modulation type memory cell array in claim 1 or 2 described in any one, it is characterized in that, each unit is connected with 4 metal line respectively, first data read line (RL1) and the second data read line (RL2), first data write line (WL1) and the second data write line (WL2), when carrying out data write, apply suitable voltage between the first data write line (WL1) and the second data write line (WL2) to overturn the electric coupling polar moment in functional layer, and then realize the write of data of conductive layer, wherein, it is netted in right-angled intersection that first data write line (WL1) of all unit and the second data write line (WL2), first data read line (RL1) of all unit and the second data read line (RL2) are also netted in right-angled intersection, therefore, the write of data can be carried out to corresponding unit by corresponding first data write line (WL1) and the second data write line (WL2), the reading of data can be carried out to corresponding unit by corresponding first data read line (RL1) and the second data read line (RL2).

4. an electric field modulation type memory cell array, is characterized in that, its memory cell comprises transistor, and described memory cell relies on the bottom, functional layer, resilient coating, insulating barrier and the conductive layer that are deposited on successively above transistor to realize the storage of data; The reading of data is realized by two metal line be connected with conductive layer; By realizing applying functional layer being carried out to electric field, to realize the write of data with the gate trace of resilient coating connection metal line and transistor.

5. a kind of electric field modulation type memory cell array according to claim 4, it is characterized in that, each unit can operate metal wire with three respectively and be connected,, a data read line (RL1),, data write line (WL), another (WRL) participates in digital independent and write simultaneously, when carrying out digital independent, apply suitable positive voltage this another (WRL) is upper, and then transistor in unit is opened, meanwhile, at this data read line (RL1) upper positive voltage that applies, the data in unit are read; When carrying out data write, apply suitable positive voltage this another (WRL) is upper, and then transistor in unit is opened; Meanwhile, at these data write line (WL) upper voltage that applies, the data in unit are write; Apply positive and negative pressure between these data write line (WL) and this another (WRL) metal wire to overturn the electric coupling polar moment in functional layer, and then realize the write of data of conductive layer.

6. a kind of electric field modulation type memory cell array according to claim 4, it is characterized in that, each transistor adopts directly grounded form.

7. one kind comprises the random asccess memory of the electric field modulation type memory cell array described in claim 5 or 6, it is characterized in that, described random asccess memory also comprises basic row decoder, sense amplifier and column decoder, register, control circuit, read-write driving, register and input, output port.