CN102593043A - 通过优化伪金属分布增大介电强度 - Google Patents

通过优化伪金属分布增大介电强度 Download PDF

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CN102593043A
CN102593043A CN2011102014772A CN201110201477A CN102593043A CN 102593043 A CN102593043 A CN 102593043A CN 2011102014772 A CN2011102014772 A CN 2011102014772A CN 201110201477 A CN201110201477 A CN 201110201477A CN 102593043 A CN102593043 A CN 102593043A
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metal
metal pattern
solid
pseudo
pattern
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CN102593043B (zh
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陈宪伟
刘醇鸿
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种通过优化伪金属分布增大介电强度的方案,该方案包括以下方法:提供晶圆表示件,包括金属层和在该金属层的上方的多个凸块焊盘,其中,该金属层包括:凸块焊盘正下方区域。将固体金属图案插入金属层,其中,固体金属图案包括:位于凸块焊盘正下方区域中的第一部件和位于凸块焊盘正下方区域以外的第二部件。去除固体金属图案的第二部件的部分,其中,基本上没有去除固体金属图案的第一部件的部分。在去除形成的伪金属图案的步骤期间没有去除固体金属图案的剩余部分。在半导体晶圆中实施伪金属图案和多个凸块焊盘。

Description

通过优化伪金属分布增大介电强度
技术领域
本发明涉及通过优化伪金属分布增大介电强度。
背景技术
在集成电路中使用了伪金属和伪通孔用在集成电路中,例如,用于减小在制作工艺中的微承载影响。在用于插入伪金属和伪通孔的现有工艺中,首先,布置金属线和金属通孔,并且将伪金属和伪通孔插入至未通过金属线和金属通孔使用的芯片区。现有的插入工艺可能受制于因低插入效率而更糟。
因此,需要改进的方法以提供具有高插入效率的插入工艺。
发明内容
为了达到上述目的,根据本发明的一个方面,提供了一种方法,包括:提供晶圆表示件,包括:金属层和位于金属层的上方的多个凸块焊盘,其中,金属层包括凸块焊盘正下方区域;将固体金属图案插入金属层中,其中,固体金属图案包括位于凸块焊盘正下方区域中的第一部件和位于凸块焊盘正下方区域以外的第二部件;以及去除固体金属图案的第二部件的部分,其中,基本上没有去除固体金属图案的第一部件的部分,在去除形成的伪金属图案的步骤期间没有去除固体金属图案的剩余部分,并且其中,使用计算机执行插入和去除的步骤。
其中,该方法进一步包括:在半导体晶圆中实现伪金属图案和多个凸块焊盘。
其中,固体金属图案与多个凸块焊盘之一的整体垂直重叠。
其中,金属层直接在多个凸块焊盘的下方,在金属层和多个凸块焊盘之间不存在附加的金属层。
其中,金属层没有直接位于多个凸块焊盘的下方,在金属层和多个凸块焊盘之间具有至少一个附加的金属层。
其中,贯穿晶圆表示件的整体,基本上没有固体金属图案的部分从位于任意多个凸块焊盘下方的凸块焊盘正下方区域中去除。
其中,凸块焊盘正下方区域中的金属密度大于约90%,并且在具有约大于100μm×100μm尺寸的区域中,金属层位于凸块焊盘正下方区域以外的金属密度在约15%和约85%之间。
其中,在插入固体金属图案的步骤之前,在金属层中存在金属连接件,并且其中,固体金属图案与任意金属连接件断开。
其中,在插入固体金属图案的步骤期间,插入附加的固体金属图案以填充金属层,并且其中,没有附加固体金属图案连接至位于金属层中的任何金属连接件。
该方法进一步包括附加的插入步骤,其中,在附加的插入步骤期间,将伪通孔插入凸块焊盘正下方区域中,并且其中,没有将伪通孔插入凸块焊盘正下方区域以外。
根据本发明的另一方面,提供了一种方法,包括:提供晶圆表示件,包括:第一金属层、位于第一金属层上方的第二金属层,以及位于第二金属层上方的多个凸块焊盘,其中,第一金属层包括第一凸块焊盘正下方区域,第二金属层包括第二凸块焊盘正下方区域;将第一固体金属图案插入第一金属层中,其中,第一固体金属图案包括位于第一凸块焊盘正下方区域中的第一部件、和位于第一凸块焊盘正下方区域以外的第二部件;将第二固体金属图案插入第二金属层中,其中,第二固体金属图案包括位于第二凸块焊盘正下方区域中的第三部件、和位于第二凸块焊盘正下方区域以外的第四部件;分别去除第一固体金属图案的第二部件的部分、和第二固体金属图案的第四部件的部分,其中,基本上没有去除第一固体金属图案的第一部件的部分、和第二固体金属图案的第三部件的部分,并且其中,第一固体金属图案和第二固体金属图案的剩余部分形成伪金属图案;以及将伪通孔插入在第一金属层和第二金属层之间,其中,伪通孔在第一部件和第三部件之间并且与第一部件和第三部件垂直重叠,其中,使用计算机执行插入第一固体金属图案和第二固体金属图案的步骤、去除第二部件的部分和第四部件的部分的步骤、以及插入伪通孔的步骤。
其中,在去除第二部件的部分和第四部件的部分的步骤与在芯片中实现伪金属图案的步骤之间,在与伪通孔相同的水平面并且在第一凸块焊盘正下方区域和第二凸块焊盘正下方区域以外,基本上没有插入附加的伪通孔。
其中,贯穿晶圆表示件,基本上没有从第一凸块焊盘正下方区域去除第一固体金属图案的部分,并且基本上没有从第二凸块焊盘正下方区域去除第二固体金属图案的部分。
其中,第一凸块焊盘正下方区域和第二凸块焊盘正下方区域中的金属密度大于约90%,并且其中,位于第一凸块焊盘正下方区域和第二凸块焊盘正下方区域以外的第一金属层和第二金属层的区域的金属密度在约15%和约85%之间。
其中,在插入第一固体金属图案和第二固体金属图案的步骤之前,在第一金属层或第二金属层中存在金属连接件,并且其中,第一固体金属图案和第二固体金属图案与任意金属连接件的电断开。
其中,在插入第二固体金属图案的步骤期间,基本上在晶圆表示件中所有凸块焊盘的全部凸块焊盘正下方区域中插入附加的固体金属图案,并且其中,将附加的固体金属图案插入第二金属层中。
根据本发明的再一方面,提供了一种方法,包括:提供晶圆表示件,包括:金属层和位于金属层上方的多个凸块焊盘,其中,金属层包括凸块焊盘正下方区域;将固体伪金属图案插入金属层中,其中,将固体伪金属图案基本上限定在凸块焊盘正下方区域内,并且其中,基本上没有将固体伪金属图案插入凸块焊盘正下方区域以外;在插入固体伪金属图案的步骤以后,将伪图案插入金属层和凸块焊盘正下方区域以外;以及在半导体晶圆中实现固体伪金属图案和伪图案。
其中,固体伪金属图案与多个凸块焊盘之一的整体垂直重叠。
其中,在插入固体伪金属图案的步骤以前,凸块焊盘正下方区域之一中存在金属连接件,其中,固体伪金属图案和金属连接件基本上与多个凸块焊盘之一的整体垂直重叠,并且其中,固体伪金属图案与金属连接件断开。
其中,贯穿晶圆表示件的基本上全部凸块焊盘正下方区域的金属密度大于约90%,并且位于凸块焊盘正下方区域以外的金属层的区域的金属密度在约15%和约85%之间,其中,该金属层的区域具有大于约100μm×100μm的尺寸。
附图说明
为了全面地理解本实施例及其优点,现在将对结合附图所作的以下描述进行参考,其中:
图1示出了根据实施例的管芯的横截面视图;
图2至图4为根据实施例插入伪金属图案的中间阶段的俯视图,其中,首先插入厚伪金属图案,并且从凸块焊盘正下方区域以外去除部分厚伪金属图案;
图5至图7为根据可选实施例插入伪金属图案的中间阶段的俯视图,其中,将伪金属图案插入凸块焊盘正下方区域中,且之后将附加伪金属图案插入凸块焊盘正下方区域以外;
图8至图13为在凸块焊盘正下方区域中插入伪通孔的中间阶段的俯视图;
图14示出了用于进行金属图案布置的计算机和用于存储伪图案布置的存储介质。
具体实施方式
下面将详细描述本发明各实施例的制造和使用。然而,应该理解,本实施例提供了多个可以在各种具体环境中实现的可应用的概念。所讨论的具体实施例仅仅用于说明,而不用于限制本发明的范围。根据实施例提供了用于插入伪金属和伪通孔的方法。示出了多个实施例的中间阶段。贯穿多个视图和说明性实施例,相同的参考标号用于指示相同元件。
参照图1,提供了半导体晶圆100的一部分的横截面视图。半导体晶圆100可以包括诸如形成在半导体衬底20的表面的晶体管(未示出)的有源器件。互连结构22形成在半导体衬底20的表面,该互连结构包括形成在其中并且电连接至半导体器件的金属线24和通孔26。金属线24和通孔26可以由铜或铜合金形成,并且可以使用镶嵌工艺来形成该金属线和通孔。互连结构22可以包括:层间电介质(ILD)28和金属间电介质(IMD)30。在层间电介质(ILD)28和金属间电介质(IMD)30中形成并且嵌入金属线24和通孔26。
IMD 30可以包括多个介电层31和顶部介电层32,其中,将在介电层31中的金属层称作金属层M1至Mtop-1。将在顶部介电层32中的金属层称作Mtop,其中,整数“top”可以表示9或者更大或更小的整数。在实施例中,金属层M1至Mtop中的金属线24和通孔26由铜或铜合金形成。此外,介电层31可以为低k介电层,例如,具有小于例如约3.0或2.5的低k值的低k介电层。金属层Mtop可以由铜或铜合金形成,或者可选地由铝、铝铜合金等形成。顶部介电层32可以由低k电介质材料或者诸如未掺杂硅玻璃(USG)的其他非低k(具有大于3.8的k值)电介质材料形成。
可以在互联结构22的上方形成一个或多个钝化层。在所示的实施例中,形成了钝化层36和钝化层40。在钝化层36的上方形成凸块焊盘38。凸块焊盘38可以包括铝(Al)或者铝铜合金(AlCu),并且还可以包括诸如银(Ag)、金(Au)、镍(Ni)、钨(W)等的其他金属。凸块焊盘38可以通过下方的互连结构22和在钝化层36中的金属连接件(未示出)与半导体器件电连接。钝化层40可以包括覆盖凸块焊盘38的边缘部的部分、以及与凸块焊盘38相同水平位置的部分。钝化层36和40可以由聚酰亚胺、或者诸如氧化硅、氮化硅、以及其多层的其他已知电介质材料形成。
底部凸块金属(UBM)42形成于凸块焊盘38上并且电连接至凸块焊盘38。UBM 42可以包括铜层和钛层(未示出)。在UBM 42的上方形成金属凸块44。金属凸块44由非回流材料形成,并且可以包括例如铜、镍、钯等。可选地,金属凸块44为焊料凸块。
贯穿该描述,将在位于凸块焊盘38的正下方、并且与该凸块焊盘垂直重叠的区域称作凸块焊盘正下方区域,标记为区域46(图1)。在实施例中,在不违背提供的用于布置金属部件的设计规则的情况下,在凸块焊盘正下方区域中的金属部件可以具有尽可能高的图案密度,没有违背提供的用于金属部件的设计规则。凸块焊盘正下方区域46中的金属部件包括:位于互连结构22中的金属线24和通孔26、以及诸如伪图案52的伪金属。凸块焊盘正下方区域46通过所有介电层31和32延伸,并且延伸入至钝化层36中。因此,金属层M1至Mtop中的每个均包括:凸块焊盘正下方区域和位于任一凸块焊盘正下方区域以外的区域。
图2至图4示出了根据实施例在金属层(金属层Mi,其中,整数为1至“top”之一)之一中布置伪图案的中间阶段的俯视图。参照图2,示出了半导体晶圆100、以及位于该半导体晶圆100中的凸块焊盘38的俯视图。应该注意,贯穿图2至图13,所示的半导体晶圆100、凸块焊盘38、金属线24、伪图案52以及152等是图1所示的物理晶圆中部件的表示(表示件)(representation)。在布置阶段期间执行图2至图13所示的步骤时,这些表示件尚未在物理半导体晶圆中实现和制造。因此,贯穿该描述,还将晶圆100称作晶圆表示件。然而,在稍后的后续制作步骤中,将在物理晶圆中实现该部件。
参照图3,固体金属图案50被布置(插入)在金属层Mi中,其中,在插入固体金属图案50之前,该金属层中布置有金属线24。不将该固体金属图案50连接至位于相同金属层中的任何条金属线24。在固体金属图案50之间的间隔遵循设计规则。所以,对于某些凸块焊盘38,没有金属线24位于其正下方,相应的下层固体金属图案50完全覆盖该凸块焊盘38。可以贯穿整个金属层Mi插入固体金属图案50,以使已有的金属线24和固体金属图案50基本上贯穿整个金属层Mi延伸。
接下来,如图4所示,去除部分固体金属图案50,形成矩形开口54。下文中,将固体金属图案50的剩余部称作伪金属图案。在得到的结构中,可以将位于凸块焊盘正下方区域46以外的某些伪图案52与该结构中的矩形开口54互连,其中,在各个半导体晶圆的制作当中,开口54将填充有电介质材料31或32(图1)。在去除期间,对位于凸块焊盘正下方区域46中的固体金属图案50的部分和位于凸块焊盘正下方区域46以外的固体金属图案50的部分进行不同处理。在实施例中,在凸块焊盘正下方区域46中,不会去除固体金属图案50的部分。然而,在凸块焊盘正下方区域46以外,去除了固体金属图案50的部分。
在可选的实施例中,将凸块焊盘正下方区域46中固体金属图案50的部分、与凸块焊盘正下方区域46以外的固体金属图案50的部分一并去除。然而,与凸块焊盘正下方区域46以外的区域相比较,在凸块焊盘正下方区域46中可以去除更小百分比。在生成的布置中,假设在凸块焊盘正下方区域46中,金属图案密度为“A”,并且在凸块焊盘正下方区域46以外,金属图案密度为“B”,金属图案密度A(包括金属线24和伪图案52这两者)大于金属图案密度B(也包括金属线24和伪图案52这两者)。值A可能以大于约10%或者大于约90%的偏差大于值B。应该注意,对于在每个凸块焊盘38的下方的整个凸块焊盘正下方区域46测量金属图案密度A,并且对于大于或等于100μm×100μm的芯片面积测量金属图案密度B。此外,金属图案密度A可以大于约90%,或者可以高达100%。在凸块焊盘正下方区域46以外,金属图案密度B可以在约10%和约85%之间。
图5至图7示出了根据可选实施例的布置伪图案中的中间阶段的俯视图。除非另有说明,否则在该实施例中的参考标号基本上与在图2至图4所示的实施例中的相同。如图5所示,首先布置金属线24。接下来,参照图6,将伪图案52A添加至与金属线24相同的金属层。贯穿这里的描述,由于伪图案的尺寸接近或者大于凸块焊盘38的尺寸,并且还由于在半导体芯片中实现该伪图案,所以可选地将伪图案52A称作预定固体伪图案。此外,在该步骤中,将伪图案52A添加至凸块焊盘正下方区域46中,而在凸块焊盘正下方区域46以外,则不添加伪图案52A或者基本上没有伪图案52A。尽管示出了伪图案52A的边缘如稍微越过凸块焊盘38的边缘延伸的,示出了伪图案52A的边缘,但是如通过虚线47所示的,伪图案的边缘还可以与凸块焊盘38的边缘对齐。伪图案52A可以基本上与各个凸块焊盘38的整体重叠,并且还可以稍微越过各个凸块焊盘38的边缘延伸。然而,伪图案52A越过凸块焊盘38的延伸受到限制。例如,延伸宽度W1小于凸块焊盘38的宽度W2的大约20%。伪图案52A还可以具有与各个上层凸块焊盘38基本上相同的形状和相同的尺寸,并且可以基本上完全覆盖各个上层凸块焊盘38。在一实施例中,伪图案52A是非固体金属图案,并且可以包括在相同凸块焊盘38下方的多个不连续部分。在凸块焊盘正下方区域46内的金属图案密度A可以达到大于大约等于90%或更高。此外,在金属线24延伸进入凸块焊盘正下方区域46的实施例中,伪金属焊盘52A与金属线24隔离开。
接下来,如图7所示,将伪图案52B添加至与金属线24相同的金属层,并且添加至凸块焊盘正下方区域46以外。在该步骤中,基本上没有将伪图案插入凸块焊盘正下方区域46当中。伪图案52B可以形成分离的矩形图案,或者可以具有其他形状。所以,凸块焊盘的正下方区域46以外的金属图案密度B可以落入预定范围内,例如,在大于或等于100μm×100μm的芯片面积中,在约15%和约85%之间。
在实施例中,对于诸如Mtop和Mtop-1的上部金属层而不是诸如M1至Mtop-2的下金属层,可以重复图2至图4的步骤或者图5至图7的步骤。在可选的实施例中,对于金属层M1至Mtop的每层,可以重复图2至图4的步骤或者图5至图7的步骤。通过提高凸块焊盘正下方区域46中的金属图案密度,可以在各个晶圆上更均匀地分布施加给凸块焊盘38的应力,从而,改善了生成的封装组件的可靠性。此外,通过凸块焊盘正下方区域46中的最大图案密度,还改善了热损失。
图8至图13示出了根据可选实施例的插入伪通孔的中间阶段。参照图8,贯穿金属层之一添加固体金属图案52,其中,该金属层之一可以为金属层M2至Mtop中的任一层,并且在下文中被称作金属层Mi。因此,整数i可以为在2和“top”之间(并且包括2和“top”)的任意值。用于插入固体金属图案52的细节本质上可以与图2和图3中所示的相同,因此这里不再重复。将金属层Mi中的金属连接件/线表示为24A,其在插入固体金属图案52之布置。固体金属图案52与任一金属线24A断开。
接下来,如图9所示,将固体金属图案152插入金属层M(i-1)中,该金属层直接位于金属层Mi的下方,没有位于金属层Mi和M(i-1)之间的其他金属层。用于插入固体金属图案152的细节与插入固体图案52的基本相同,因此这里没有进行讨论。金属层M(i-1)也可以具有预先布置的金属线24(标记为24B),该金属线可以具有与图8所示的金属线24A不同的图案。
图10示出了固体金属图案52和固体金属图案152的重叠区域,其中,重叠区域252为固体金属图案52和152在俯视图中彼此重叠。换而言之,固体金属图案52和152这两者都延伸至重叠区域252中。
参照图11,将伪通孔56插入在金属层Mi和M(i-1)之间,以与固体金属图案52和152互连。伪通孔56在俯视图中与重叠区域252重叠。每个伪通孔56的至少一部分并且也可以是其全部位于凸块焊盘正下方区域46中。因此,每个伪通孔56的至少一部分与凸块焊盘38基本上垂直重叠。在凸块焊盘正下方区域46以外,基本上没有伪通孔56被插入。当当在将半导体晶圆中实施伪通孔56和金属层Mi和M(i-1)在半导体晶圆中实现时,伪通孔将伪图案52物理连接至伪图案152(请参照图12和图13)。在实施例中,在金属层Mi和M(i-1)之间的通孔层中,在插入伪通孔56以前和以后的任何步骤中,没有插入除伪通孔56以外的附加额外伪通孔。在插入伪通孔56和制作包括伪通孔56的各个晶圆之间的任何步骤中,没有插入除伪通孔56以外的附加额外伪通孔。因此,在各个物理晶圆中没有形成除伪通孔56以外的附加额外伪通孔。
接下来,如图12所示,从金属层Mi以及凸块焊盘正下方区域46以外去除了固体金属图案52的部分。图13示出了从金属层M(i-1)以及从凸块焊盘正下方区域46以外去除了固体金属图案152的部分。用于去除固体金属图案52和152的部分的细节基本上可以与针对图4所讨论的相同,因此,这里不进行重复。与图4所示的实施例类似,基本上没有固体金属图案52和152的部分被从凸块焊盘正下方区域46中去除。固体金属图案52和152的剩余部分为伪金属。
通过使用图8至图13所示的工艺,增大了金属层M1至Mtop和通孔层中的金属图案密度,而没有导致在凸块焊盘正下方区域46以外的金属图案密度的增大。
图2至图13示出了伪金属线的布置,其中,可以使用计算机70进行该布置,该计算机包括用于执行如图2至图13所示的步骤的特定软件。将生成的布置保存在诸如硬盘驱动器72的存储介质中。如图2至图13所示的生成的伪金属线、伪通孔56、以及凸块焊盘38,可以在物理半导体晶圆100中实现(制作),得到图1所示的结构。
根据实施例,一种方法,包括:提供晶圆表示件,包括金属层和在该金属层上方的多个凸块焊盘,其中,金属层包括凸块焊盘正下方区域。将固体金属图案插入金属层中,其中,固体金属图案包括位于凸块焊盘正下方区域中的第一部件和位于凸块焊盘正下方区域以外的第二部件。去除固体金属图案的第二部件的部分,其中,基本上没有去除固体金属图案的第一部件的部分。在形成伪金属图案的
去除步骤期间没有去除固体金属图案的剩余部分。在半导体晶圆中实现伪金属图案和多个凸块焊盘。
根据其他实施例,一种方法,包括:提供晶圆表示件,包括第一金属层、在第一金属层上方的第二金属层、以及在该第二金属层上方的多个凸块焊盘,其中,第一金属层和第二金属层分别包括第一凸块焊盘正下方区域和第二凸块焊盘正下方区域。将第一固体金属图案插入第一金属层中,其中,第一固体金属图案包括:位于第一凸块焊盘正下方区域中的第一部件和位于第一凸块焊盘正下方区域以外的第二部件。将第二固体金属图案插入第二金属层中,其中,第二固体金属图案包括:位于第二凸块焊盘正下方区域中的第三部件和位于第二凸块焊盘正下方区域以外的第四部件。分别去除第一固体金属图案的第二部件的部分和第二固体金属图案的第四部件的部分,其中,基本上没有去除第一固体金属图案的第一部件的部分和第二固体金属图案的第三部件的部分。在去除形成伪金属图案的步骤期间没有去除第一固体金属图案和第二固体金属图案的剩余部分。将伪通孔插入在第一金属层和第二金属层之间,其中,伪通孔在第一部件和第三部件之间并且与第一部件和第三部件垂直重叠。在半导体晶圆中实现伪金属图案和多个凸块焊盘。
再根据其他实施例,一种方法,包括:提供晶圆表示件,包括金属层和在该金属层上方的多个凸块焊盘,其中,金属层包括凸块焊盘正下方区域。将固体伪金属图案插入金属层中,其中,固体伪金属图案基本上限定在凸块焊盘正下方区域中,并且其中,基本上没有将固体伪金属图案插入凸块焊盘正下方区域以外。在插入固体伪金属图案的步骤以后,将伪图案插入金属层中以及凸块焊盘正下方区域以外。在半导体晶圆中实现固体伪金属图案和伪图案。
尽管已经详细描述了实施例及其优点,但应该理解,可以在不背离所附权利要求限定的实施例主旨和范围的情况下,做各种不同的改变、替换和更改。而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员应理解,通过本发明,现有的或今后开发的用于执行与在本文中所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造,材料组分、装置、方法或步骤根据本发明可以被使用。因此,所附权利要求旨在包括在这样的工艺、机器、制造、材料组分、装置、方法或步骤的范围内。此外,每条权利要求构成单独的实施例,并且多个权利要求和实施例的组合在本发明的范围内。

Claims (10)

1.一种方法,包括:
提供晶圆表示件,包括:金属层和位于所述金属层的上方的多个凸块焊盘,其中,所述金属层包括凸块焊盘正下方区域;
将固体金属图案插入所述金属层中,其中,所述固体金属图案包括位于所述凸块焊盘正下方区域中的第一部件和位于所述凸块焊盘正下方区域以外的第二部件;以及
去除所述固体金属图案的所述第二部件的部分,其中,基本上没有去除所述固体金属图案的所述第一部件的部分,在去除形成的伪金属图案的步骤期间没有去除所述固体金属图案的剩余部分,并且其中,使用计算机执行插入和去除的步骤。
2.根据权利要求1所述的方法,进一步包括:
在半导体晶圆中实现所述伪金属图案和所述多个凸块焊盘。
3.根据权利要求1所述的方法,其中,所述固体金属图案与所述多个凸块焊盘之一的整体垂直重叠。
4.根据权利要求1所述的方法,其中,所述金属层直接在所述多个凸块焊盘的下方,在所述金属层和所述多个凸块焊盘之间不存在附加的金属层。
5.根据权利要求1所述的方法,其中,所述金属层没有直接位于所述多个凸块焊盘的下方,在所述金属层和所述多个凸块焊盘之间具有至少一个附加的金属层。
6.根据权利要求1所述的方法,其中,贯穿所述晶圆表示件的整体,基本上没有所述固体金属图案的部分从位于任意所述多个凸块焊盘下方的凸块焊盘正下方区域中去除。
7.根据权利要求1所述的方法,其中,所述凸块焊盘正下方区域中的金属密度大于约90%,并且在具有约大于100μm×100μm尺寸的区域中,所述金属层位于所述凸块焊盘正下方区域以外的金属密度在约15%和约85%之间。
8.根据权利要求1所述的方法,其中,在插入所述固体金属图案的步骤之前,在所述金属层中存在金属连接件,并且其中,所述固体金属图案与任意所述金属连接件断开。
9.一种方法,包括:
提供晶圆表示件,包括:第一金属层、位于所述第一金属层上方的第二金属层,以及位于所述第二金属层上方的多个凸块焊盘,其中,所述第一金属层包括第一凸块焊盘正下方区域,所述第二金属层包括第二凸块焊盘正下方区域;
将第一固体金属图案插入所述第一金属层中,其中,所述第一固体金属图案包括位于所述第一凸块焊盘正下方区域中的第一部件、和位于所述第一凸块焊盘正下方区域以外的第二部件;
将第二固体金属图案插入所述第二金属层中,其中,所述第二固体金属图案包括位于所述第二凸块焊盘正下方区域中的第三部件、和位于所述第二凸块焊盘正下方区域以外的第四部件;
分别去除所述第一固体金属图案的所述第二部件的部分、和所述第二固体金属图案的所述第四部件的部分,其中,基本上没有去除所述第一固体金属图案的所述第一部件的部分、和所述第二固体金属图案的所述第三部件的部分,并且其中,所述第一固体金属图案和所述第二固体金属图案的剩余部分形成伪金属图案;以及
将伪通孔插入在所述第一金属层和所述第二金属层之间,其中,所述伪通孔在所述第一部件和所述第三部件之间并且与所述第一部件和所述第三部件垂直重叠,其中,使用计算机执行插入所述第一固体金属图案和所述第二固体金属图案的步骤、去除所述第二部件的部分和所述第四部件的部分的步骤、以及插入所述伪通孔的步骤。
10.一种方法,包括:
提供晶圆表示件,包括:金属层和位于所述金属层上方的多个凸块焊盘,其中,所述金属层包括凸块焊盘正下方区域;
将固体伪金属图案插入所述金属层中,其中,将所述固体伪金属图案基本上限定在所述凸块焊盘正下方区域内,并且其中,基本上没有将所述固体伪金属图案插入所述凸块焊盘正下方区域以外;
在插入所述固体伪金属图案的步骤以后,将伪图案插入所述金属层和所述凸块焊盘正下方区域以外;以及
在半导体晶圆中实现所述固体伪金属图案和所述伪图案。
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