CN102577645A - Copper foil for an embedded pattern for forming a microcircuit - Google Patents
Copper foil for an embedded pattern for forming a microcircuit Download PDFInfo
- Publication number
- CN102577645A CN102577645A CN2010800387300A CN201080038730A CN102577645A CN 102577645 A CN102577645 A CN 102577645A CN 2010800387300 A CN2010800387300 A CN 2010800387300A CN 201080038730 A CN201080038730 A CN 201080038730A CN 102577645 A CN102577645 A CN 102577645A
- Authority
- CN
- China
- Prior art keywords
- layer
- copper foil
- seed layer
- embedded
- embedded copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 103
- 239000011889 copper foil Substances 0.000 title claims abstract description 73
- 230000004888 barrier function Effects 0.000 claims abstract description 49
- 229910052802 copper Inorganic materials 0.000 claims abstract description 30
- 239000010949 copper Substances 0.000 claims abstract description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 12
- 229910000990 Ni alloy Inorganic materials 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims description 33
- 239000011888 foil Substances 0.000 claims description 22
- 238000007747 plating Methods 0.000 claims description 21
- 230000003746 surface roughness Effects 0.000 claims description 21
- 238000009713 electroplating Methods 0.000 claims description 19
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 18
- 239000003795 chemical substances by application Substances 0.000 claims description 9
- 229920000663 Hydroxyethyl cellulose Polymers 0.000 claims description 5
- 239000004354 Hydroxyethyl cellulose Substances 0.000 claims description 4
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 claims description 4
- 235000019447 hydroxyethyl cellulose Nutrition 0.000 claims description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims description 3
- 108010010803 Gelatin Proteins 0.000 claims description 3
- 239000008273 gelatin Substances 0.000 claims description 3
- 229920000159 gelatin Polymers 0.000 claims description 3
- 235000019322 gelatine Nutrition 0.000 claims description 3
- 235000011852 gelatine desserts Nutrition 0.000 claims description 3
- 239000002202 Polyethylene glycol Substances 0.000 claims description 2
- 239000003292 glue Substances 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 229920001223 polyethylene glycol Polymers 0.000 claims description 2
- 229920001451 polypropylene glycol Polymers 0.000 claims description 2
- KCXFHTAICRTXLI-UHFFFAOYSA-N propane-1-sulfonic acid Chemical compound CCCS(O)(=O)=O KCXFHTAICRTXLI-UHFFFAOYSA-N 0.000 claims description 2
- 229910000366 copper(II) sulfate Inorganic materials 0.000 claims 1
- 239000000243 solution Substances 0.000 description 30
- 238000000034 method Methods 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 6
- 238000004070 electrodeposition Methods 0.000 description 5
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 4
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical group [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 4
- 238000013459 approach Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000003475 lamination Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- KRKNYBCHXYNGOX-UHFFFAOYSA-N citric acid Chemical compound OC(=O)CC(O)(C(O)=O)CC(O)=O KRKNYBCHXYNGOX-UHFFFAOYSA-N 0.000 description 3
- 238000005868 electrolysis reaction Methods 0.000 description 3
- 229910021645 metal ion Inorganic materials 0.000 description 3
- 238000001878 scanning electron micrograph Methods 0.000 description 3
- 238000004626 scanning electron microscopy Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 229910052717 sulfur Inorganic materials 0.000 description 3
- 239000011593 sulfur Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- -1 glycolic Chemical compound 0.000 description 2
- JVTAAEKCZFNVCJ-UHFFFAOYSA-N lactic acid Chemical compound CC(O)C(O)=O JVTAAEKCZFNVCJ-UHFFFAOYSA-N 0.000 description 2
- DITXJPASYXFQAS-UHFFFAOYSA-N nickel;sulfamic acid Chemical compound [Ni].NS(O)(=O)=O DITXJPASYXFQAS-UHFFFAOYSA-N 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- CSJDJKUYRKSIDY-UHFFFAOYSA-N 1-sulfanylpropane-1-sulfonic acid Chemical compound CCC(S)S(O)(=O)=O CSJDJKUYRKSIDY-UHFFFAOYSA-N 0.000 description 1
- LMPMFQXUJXPWSL-UHFFFAOYSA-N 3-(3-sulfopropyldisulfanyl)propane-1-sulfonic acid Chemical compound OS(=O)(=O)CCCSSCCCS(O)(=O)=O LMPMFQXUJXPWSL-UHFFFAOYSA-N 0.000 description 1
- LSNNMFCWUKXFEE-UHFFFAOYSA-M Bisulfite Chemical compound OS([O-])=O LSNNMFCWUKXFEE-UHFFFAOYSA-M 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- QXNVGIXVLWOKEQ-UHFFFAOYSA-N Disodium Chemical class [Na][Na] QXNVGIXVLWOKEQ-UHFFFAOYSA-N 0.000 description 1
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910021586 Nickel(II) chloride Inorganic materials 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- DBMJMQXJHONAFJ-UHFFFAOYSA-M Sodium laurylsulphate Chemical compound [Na+].CCCCCCCCCCCCOS([O-])(=O)=O DBMJMQXJHONAFJ-UHFFFAOYSA-M 0.000 description 1
- 239000005864 Sulphur Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 238000010306 acid treatment Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- 150000001412 amines Chemical class 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- SRSXLGNVWSONIS-UHFFFAOYSA-N benzenesulfonic acid Chemical compound OS(=O)(=O)C1=CC=CC=C1 SRSXLGNVWSONIS-UHFFFAOYSA-N 0.000 description 1
- 229940092714 benzenesulfonic acid Drugs 0.000 description 1
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 description 1
- 238000005282 brightening Methods 0.000 description 1
- 239000011469 building brick Substances 0.000 description 1
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000008139 complexing agent Substances 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004310 lactic acid Substances 0.000 description 1
- 235000014655 lactic acid Nutrition 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- QMMRZOWCJAIUJA-UHFFFAOYSA-L nickel dichloride Chemical compound Cl[Ni]Cl QMMRZOWCJAIUJA-UHFFFAOYSA-L 0.000 description 1
- LGQLOGILCSXPEA-UHFFFAOYSA-L nickel sulfate Chemical compound [Ni+2].[O-]S([O-])(=O)=O LGQLOGILCSXPEA-UHFFFAOYSA-L 0.000 description 1
- 229910000008 nickel(II) carbonate Inorganic materials 0.000 description 1
- 229910000363 nickel(II) sulfate Inorganic materials 0.000 description 1
- ZULUUIKRFGGGTL-UHFFFAOYSA-L nickel(ii) carbonate Chemical compound [Ni+2].[O-]C([O-])=O ZULUUIKRFGGGTL-UHFFFAOYSA-L 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 229920000768 polyamine Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 239000000080 wetting agent Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0376—Etching temporary metallic carrier substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0384—Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electroplating Methods And Accessories (AREA)
- Electroplating And Plating Baths Therefor (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Proposed is a copper foil for an embedded pattern, which has no nodule, and which comprises: a copper carrier layer; a barrier layer formed at one surface of the copper carrier layer; and a seed layer formed at a surface of the barrier layer to form a circuit. The barrier layer is a nickel layer or a nickel alloy layer, and the seed layer is a copper layer. The surface of the seed layer has an average roughness Rz of less than 1.5 [mu]m, and Rmax of less than 2.5 [mu]m.
Description
Technical field
The present invention relates to a kind of embedded Copper Foil that is used for fine pattern, and more particularly, relate to a kind of embedded Copper Foil that comprises the barrier layer.
Background technology
Along with highly integrated, the miniaturization of electronic building brick quilt, and become lighter, circuit is miniaturized and the thickness of resin reduces.For this reason, developed the technology (wherein with in the circuit embedded resin) that is used to form embedded fine circuitry pattern, replaced through using typical etching method to form circuit.
For manufacturing comprises the embedded terminal block (embedded wiring board) of this type of fine circuitry pattern, attempted using the goldleaf that comprises typical peel ply or the method for Copper Foil, said typical peel ply is stripped from physics mode.Yet, in this case, when removing peel ply,, therefore in fact be difficult to use embedded terminal block owing to possibly produce folding line or chemicals may penetrate in the peel ply with physics mode.In addition, under the situation of embedded type terminal block, when the surface roughness of Seed Layer was higher, the bonding strength between Seed Layer and the anti-plate layer can reduce.Therefore, during the plating that is used to form circuit, even the edge between Seed Layer and the anti-plate layer also can be electroplate with copper, and thereby the electric wire of fine circuitry pattern between the interval can reduce.In addition; When carrier copper foil layer (carrier copper foil layer), barrier layer (barrier layer) and Seed Layer during in order by complete etching; The part of Seed Layer (its surface roughness is higher) maybe be by over etching, and thereby short circuit possibly occur.
Therefore, need be used for the embedded Copper Foil of fine circuitry pattern,, have uniform interval between the electric wire of said fine circuitry pattern through increasing the bonding strength between Seed Layer and the anti-plate layer.
Summary of the invention
Technical problem
The present invention provides a kind of embedded Copper Foil that is used for the fine circuitry pattern.
Technical solution
According to an aspect of the present invention, a kind of embedded Copper Foil that is used for the fine circuitry pattern is provided, said fine circuitry pattern comprises the carrier copper foil layer; The barrier layer, it is formed on the surface of foils layer; And Seed Layer, it is formed on the surface on barrier layer, and wherein the barrier layer is nickel dam or nickel alloy layer, and Seed Layer is the copper layer, and the average surface roughness Rz of Seed Layer is that 1.5 μ m or littler and Rmax are 2.5 μ m or littler.
Favourable influence
According to embodiments of the invention, owing to use the Copper Foil that comprises the lower Seed Layer of surface roughness to form the fine circuitry pattern, the width that short circuit and circuit therefore can not occur can not reduce.In addition, do not exist folding line and chemicals can not peel off and be penetrated in the peel ply, and thereby can obtain to comprise the embedded terminal block of high-density circuit pattern owing to physics.
Description of drawings
Fig. 1 is used to describe the figure that the Copper Foil that comprises the lower Seed Layer of surface roughness through use is made the method for embedded terminal block.
Fig. 2 is used to describe the concept map that the Copper Foil that comprises the higher Seed Layer of surface roughness through use is made the method for embedded terminal block.
Fig. 3 is scanning electron microscopy (scanning electron microscope, the SEM) image that is used for the Copper Foil of the embedded pattern that instance 1 processes.
Fig. 4 is the SEM image that is used for the Copper Foil of the embedded pattern that Comparative Example 1 makes.
Fig. 5 is the figure that on the surface of carrier copper foil layer, barrier layer, Seed Layer and antirust coat (antirust layer) is carried out in order the surface treating machine of electro-deposition.
Embodiment
Optimal mode
Hereinafter, will describe to the method for embedded Copper Foil, the embedded terminal block of manufacturing and through the embedded terminal block that uses said method to make with respect to example embodiment of the present invention.
The embedded Copper Foil that is used for the fine circuitry pattern according to an embodiment of the invention comprises: the carrier copper foil layer; The barrier layer, it is formed on the surface of carrier copper foil layer; And Seed Layer (it is the layer of circuit before forming), it is formed on the surface on barrier layer, and wherein the barrier layer is nickel dam or nickel alloy layer, and Seed Layer is the copper layer, and the average surface roughness Rz of Seed Layer is that 1.5 μ m or littler and Rmax are 2.5 μ m or littler.
When the average surface roughness of Seed Layer exceeds Rz less than 1.5 μ m and Rmax during less than the scope of 2.5 μ m, the bonding strength between the part of anti-plate layer and Seed Layer (its surface roughness is higher) may reduce, thereby forms the space in the part on the edge of.Therefore, during the formation of copper plate, on the space, form plating paper tinsel layer, so the width of circuit may reduce and the possibility is inhomogeneous with fine circuitry pattern.In addition, when removing carrier copper foil layer, barrier layer and Seed Layer in order in order to make final embedded terminal block, the higher said part of the surface roughness of Seed Layer can be by etching relatively exceedingly, and thereby problem such as short circuit may occur.
In embedded Copper Foil, the barrier layer is nickel dam or nickel alloy layer.Nickel dam or nickel alloy layer can respectively be done for oneself stable; So that said nickel dam or nickel alloy layer can not can be dissolved in the copper etching solution during the etching step of Seed Layer and the carrier copper foil layer that formed by copper; And can be during the etching step on barrier layer, and there be any residue by complete etching.
In embedded Copper Foil, the thickness range of foils layer can be 18 μ m to 70 μ m, and particularly, from 18 μ m to 35 μ m.When the foils layer was blocked up, after forming embedded pattern, removing the time that the carrier copper foil layer spent may increase, and the useful life of etching solution may shorten, thereby reduced productivity ratio.On the other hand, cross when thin when the foils layer, foils layer function as supporter during whole operation may be weakened, and may produce a lot of folding lines.In addition, because during the formation of copper circuit pattern, the foils layer is by etching rapidly, so the nickel barrier layer may be by etching relatively exceedingly.
In embedded Copper Foil, the thickness range on barrier layer can be 0.1 μ m to 10 μ m, and particularly, from 0.3 μ m to 3 μ m.When the barrier layer was blocked up, the surface that is used to electroplate became coarse, and during the plating of Seed Layer, the surface roughness of Seed Layer may increase, and being used for the etched time may increase, and the useful life of etching solution may reduce, thereby reduced productivity ratio.On the other hand, cross when thin when the barrier layer, owing to electroplate error, for example form pin hole (pin holes) in the electrodeposited coating, when removing the foils layer, even meticulous copper circuit layer also may be etched via said pin hole.The surface roughness on barrier layer can be lower.
In embedded Copper Foil, with respect to the etching solution that is used for Seed Layer, the barrier layer can be inertia.That is, can't etch stop layer in order to the etching solution possibility of etching Seed Layer.Because the barrier layer is an inertia with respect to the etching solution that is used for Seed Layer, so the barrier layer can stably form.
In embedded Copper Foil, the thickness range of Seed Layer can be 0.1 μ m to 10 μ m, and particularly, from 2 μ m to 5 μ m.When Seed Layer was blocked up, after forming embedded pattern, removing the time that Seed Layer spends may increase, and the useful life of etching solution may shorten, thereby reduced productivity ratio.On the other hand; When Seed Layer is crossed when thin; During the formation of anti-plate layer and fine circuitry pattern; Being used for the upgrading on Seed Layer surface and for example cleaning the time of waiting other process can be inadequate, and thereby when utilizing copper to electroplate the fine circuitry pattern, error such as pin hole may appear and other electroplates error.
In embedded Copper Foil, can comprise nickel sulfamic acid, nickelous sulfate, nickel chloride or its analog as the nickel source in order to the electroplating solution that forms the barrier layer.Electroplating solution can comprise nickelous carbonate, sulfuric acid or its analog as the pH conditioning agent.Electroplating solution is as being used to regulate electroplating velocity and preventing that the complexing agent of plated metal dissolving from can comprise citric acid, glycolic, lactic acid or its analog, and can comprise aryl sulfonic acid sodium (sodium aryl sulfonate), benzene sulfonic acid, dodecyl sodium sulfate or its analog as the wetting agent that is used to improve electrodeposited coating character.In addition, electroplating solution can comprise brightener (brightening agent).
In embedded Copper Foil, can pass through bright plating (bright electroplating) and form Seed Layer.The surface roughness of the Seed Layer that forms through bright plating maybe be lower.
Employed electroplating solution can comprise copper cyanider, copper sulphate or its analog in the bright plating.For instance, employed electroplating solution can comprise 80 to 400g/L CuSO in the bright plating
45H
2O, 10 arrives the H of 250g/L
2SO
4, 1 to the Cl of 100ppm
-, 1 to the brightener of 100ppm, 1 to 100ppm carrier and 1 to 100ppm leveling agent (leveler).Where necessary, electroplating solution can further comprise nitrogen-containing compound or its analog, so that strengthen the intensity of electrolytic copper foil.
Brightener can be sulfur-containing compound.The sulphur of sulfur-containing compound and copper affinity are higher.Therefore, Sulfur capacity is prone to be adsorbed on the negative electrode, moves to active site to prevent metal ion, thereby promotes to electroplate the miniaturization of particle.For instance; Brightener can comprise (but being not limited to) and be selected from by two-(3-sulfopropyl)-sodium disulfide salt (bis-(3-sulfopropyl)-disulfide; Disodium salt, SPS), the sulfydryl propane sulfonic acid (mercaptopropane sulfonic acid, MPS) and N; In the group that the N-dimethyl dithiocarbamic acid is formed at least one, and can be normally used any brightener in the field under the present invention.
Carrier is adsorbed on the negative electrode, increasing the diffusion length of metal ion, thereby prevents the rapid deposition of copper.Carrier is adsorbed on the negative electrode, with the evolving path and the expansion activation polarization that changes metal ion, thereby improves the uniformity of electro-deposition.For instance; Carrier can comprise the polymer that (but being not limited to) and the negative electrode with C-O key have affinity; For example polyethylene glycol and polypropylene glycol, hydroxyethylcellulose (hydroxyethyl cellulose; And can comprise normally used any carrier in the field under the present invention HEC) or its combination.
Leveling agent is adsorbed on the higher relatively part of current density and enlarges activation polarization, thus the speed that reduces to precipitate.For instance, leveling agent can comprise amine (for example gelatin and glue), the surfactant (for example acid amides) with linkage containing nitrogen or its combination that (but being not limited to) has the polyamine form, and can comprise normally used any leveling agent in the field under the present invention.
Embedded Copper Foil can further comprise the antirust coat that is formed on the Seed Layer.Antirust coat can comprise at least one element that is selected from the group that is made up of zinc (Zn), nickel (Ni), chromium (Cr), molybdenum (Mo), iron (Fe) and tin (Sn).
According to another embodiment of the present invention, the method for making the embedded Copper Foil be used for fine pattern can be included in the electro-deposition of carrying out in order on the foils layer barrier layer and Seed Layer.In addition, can make embedded Copper Foil to the electro-deposition of barrier layer, Seed Layer and antirust coat through on the foils layer, carrying out.For instance; Can on the surface of foils layer, carry out the Copper Foil that the continuous electro-deposition manufacturing of barrier layer, Seed Layer and antirust coat is used for embedded pattern through utilizing surface treating machine; Said surface treating machine comprises some electrolysis tanks (electrolyzers) (respectively to electrolysis tank different electrolyte solution without interruption), conductive rollers (applying negative voltage to it) and anode (it is included in the electrolysis tank respectively) (as shown in Figure 5), so that continuously barrier layer and Seed Layer are electroplated.
According to another embodiment of the present invention, the method for making embedded terminal block can comprise the Copper Foil that preparation is used for embedded pattern, and said embedded pattern comprises foils layer, barrier layer and Seed Layer; On the surface of the Seed Layer of the Copper Foil that is used for embedded pattern, form the anti-plate layer; The meticulous copper plate plating that is used to form fine pattern is not formed on Seed Layer on the part of anti-plate layer; Remove the anti-plate layer fully and be used for the Copper Foil of embedded pattern, form copper plate in the above with fine pattern with preparation; The copper plate that has fine pattern with the insulating barrier dipping is with preparation copper-clad lamination (copper clad laminate); Remove the foils layer that is positioned at the insulating barrier opposite to expose the barrier layer; Remove the barrier layer to expose Seed Layer; And remove Seed Layer.
To be described in more detail with reference to 1 pair of method of making embedded terminal block of figure.Shown in first operation of Fig. 1, preparation comprises the embedded Copper Foil of foils layer, barrier layer (it is formed on the surface of foils layer) and Seed Layer (it is formed on the barrier layer).
The prepared Copper Foil that is used for embedded pattern can be the above-mentioned Copper Foil that is used for embedded pattern.Promptly; Because the surface roughness of the Seed Layer of the employed Copper Foil that is used for embedded pattern is lower in the manufacturing approach; Therefore the bonding strength between anti-plate layer and the Seed Layer increases, thus prevent anti-plate layer because part is developed and between Seed Layer and anti-plate layer the edge of formed pattern formation space.
Then, on Seed Layer, form the anti-plate layer, Seed Layer as electrode, is not formed on Seed Layer on the part of anti-plate layer and forms meticulous copper plate, and then remove the anti-plate layer fully to form final fine pattern.Resist plating (Plating resist) in order to form the anti-plate layer can not receive special restriction, as long as said resist plating is generally used in the affiliated field of the present invention.The method of development anti-plate layer can be normally used any method in the field under the present invention.
Then, Seed Layer as electrode, is not formed the copper plate plating on the part of anti-plate layer, and removes the anti-plate layer fully on Seed Layer.The electroplating solution that is used to form copper plate can be normally used any electroplating solution in the plating.
The copper plate that will have fine pattern immerses in the insulating barrier (like prepreg (prepreg)) with preparation copper-clad lamination.At last, on the copper-clad lamination, foils layer, barrier layer and Seed Layer are carried out etching in order with the meticulous embedded terminal block of final acquisition.Prepreg can be (but being not limited to) epoxy resin, polyimides, phenol, bismaleimide-triazine resin (bismaleimide triazine resin, BT) or its analog and can be normally used any prepreg in the field under the present invention.
On the other hand, as shown in Figure 2, in the Copper Foil that comprises the higher Seed Layer of surface roughness, because the out-of-flatness on Seed Layer surface, the bonding strength between anti-plate layer and the Seed Layer may reduce.Form the space between Seed Layer and the anti-plate layer in the edge of the pattern that therefore, after part is developed the anti-plate layer, is obtained.In addition, the width of circuit reduces in the space owing to copper plate is penetrated into and is uneven.Therefore, be difficult to obtain uniform fine circuitry pattern.
In manufacturing approach, be used for optionally removing the group of the optional free thiosulfonic acid of etching solution, hydrogen peroxide and the nitric acid composition of foils layer and Seed Layer.
In manufacturing approach, the optional free concentration of etching solution that is used for optionally removing the barrier layer is 550ml/l to the group that guaranteed sulfuric acid solution (guaranteed sulfuric solution), sulfuric acid, nitric acid and the interpolation property mixed solution of 650ml/l are formed.For instance, be 600 to the sulfuric acid solution of 620ml/L through working concentration, can in sulfuric acid solution, optionally carry out etching to nickel dam or nickel alloy layer.
Make embedded terminal block according to another embodiment of the present invention through the method for using the embedded terminal block of above-mentioned manufacturing.The embedded terminal block of making through manufacturing approach under using between delicate wire, have uniform interval and failure rate lower, thereby have remarkable productivity ratio.
Pattern of the present invention
Hereinafter, will describe the present invention with reference to following instance.Yet these instances are not intended to limit the object of the invention and scope.
(being used for the manufacturing of the paper tinsel of embedded terminal block)
Instance 1
1. the preparation of foils
Through making thickness is that the electrolytic copper foil of 20 μ m is immersed in the sulfuric acid of 100g/L and 5 seconds electrolytic copper foil was carried out acid treatment, and cleans electrolytic copper foil with pure water.
2. the formation on barrier layer
Through under following condition in electroplating bath electronickelling form the barrier layer.
Nickel sulfamic acid: 350～600g/L
Boric acid (H
3BO
3): 15～40g/L
The temperature of electroplating bath: 40～60 ℃
Current density: 20A/dm
2
The thickness on formed barrier layer is 2 μ m.
3. the formation of Seed Layer (it forms layer before for fine circuitry)
Under following condition, in having the copper plating groove of following composition, form the bright plating layer.
The temperature of electroplating bath: 25 to 30 ℃
Current density: 10 to 20A/dm
2
The composition of copper sulphate bright plating groove
CuSO
45H
2O:200g/L and H
2SO
4: 100g/L
Chloride ion (Cl
-): 5～30ppm
MPS (brightener): 5 to 10ppm
Hydroxyethylcellulose (carrier): 1 to 5ppm
Gelatin (leveling agent): 10 to 20ppm
The thickness of the Seed Layer that forms is 4 μ m.
Instance 3
With with instance 1 in identical mode form barrier layer and Seed Layer, and through using following method on Seed Layer, to form antirust coat.
4. the formation of antirust coat
The temperature of electroplating bath: 25 to 30 ℃
Current density: 0.5 to 1A/dm
2
Chromic acid (CrO
3): 1.5g/L
Processing time: 4 seconds
Under above condition, form antirust coat.
Comparative Example 1
With with instance 1 in identical mode make embedded Copper Foil, in addition, in the formation step of Seed Layer, in the common electrical coating bath, forming common electrical coating (rather than bright plating layer) under the following condition.
The temperature of electroplating bath: 40 to 60 ℃
Current density: 10 to 20A/dm
2
The composition of copper sulphate electroplating bath
CuSO
45H
2O:200g/L and H
2SO
4: 100g/L
Chloride ion (Cl
-): 5 to 30ppm
The thickness of Seed Layer is 4 μ m.
(manufacturing of embedded terminal block)
Instance 2
In instance 1, form the anti-plate layer on the surface of the Seed Layer of the embedded Copper Foil of manufacturing.Through using the dry film that provides by GMP company to form the anti-plate layer.The anti-plate layer develops to form fine pattern through part.Then, through using copper plating solution to form the fine pattern copper plate.Then, through using cleaning solution to remove the anti-plate layer fully.Then, wherein formed the Copper Foil of fine pattern so that contact in the prepreg positioned opposite with prepreg.The structure of gained through pile up with hot pressing to make the copper-clad lamination.Then, through using etching solution to come foils layer, barrier layer and Seed Layer are carried out etching in order to make embedded terminal block.
Under the condition identical with the condition of Seed Layer, the fine pattern copper plate is through forming the electroplating thickness with 35 μ m.
The etching solution and the etching condition that are used for etching foils layer and Seed Layer (bright copper plating layer) are as follows.
The etching solution of the additive of the sulfuric acid through comprising 600ml/L, the hydrogen peroxide of 60ml/L and 60ml/L comes complete etching carrier copper foil.
The etching solution and the etching condition that are used for etch stop layer (nickel dam) are as follows.
Etching solution through comprising 650ml/L sulfuric acid is etch stop layer optionally only, and not etching foils layer and Seed Layer.
Make embedded terminal block under these conditions.
Comparative Example 2
Through use embedded Copper Foil with instance 2 in identical mode make embedded terminal block.
Assessment instance 1: to the assessment of the surface roughness of embedded Copper Foil
Catch the image of the Seed Layer of the embedded Copper Foil of making in instance 1 and the Comparative Example 1 through using scanning electron microscopy (SEM).The SEM image is shown among Fig. 3 and Fig. 4.Through IPC TM 6502.217A method measure surface roughness Rz and Rmax.The measured results show is in following table 1.
Shown in Fig. 3 and Fig. 4, the surface roughness of the embedded Copper Foil of making in the instance 1 is very low and have smooth surface, but the surface roughness of the embedded Copper Foil of making in the Comparative Example 1 is higher and have an irregular surface.
Assessment instance 2: to the inhomogeneity assessment of embedded fine pattern
Through making embedded terminal block according to the embedded Copper Foil of making in use in order instance 1 and the Comparative Example 1 shown in Fig. 1 and Fig. 2 respectively.According to following benchmark the measurement result of the SEM image of the cross sectional view of the embedded fine pattern of embedded terminal block is assessed.Assessment result is presented in the following table 1.
< reducing of circuit width >
X: the point that does not have circuit width to reduce
△: the point that some circuit widths reduce
O: the point that a lot of circuit widths reduce
< short circuit >
X: the point that short circuit do not occur
△: some points that short circuit occurs
O: the point that short circuit much occurs
Table 1
| Rz(μm) | ?Rmax(μm) | Reducing of circuit width | Short circuit | |
| Instance 1 | 0.87 | ?1.41 | X | X |
| Comparative Example 1 | 1.69 | ?2.61 | O | O |
As shown in table 1, when Copper Foil according to an embodiment of the invention when making embedded fine pattern, compare with Copper Foil according to Comparative Example, said Copper Foil has low-down fine pattern failure rate.
Industrial applicability
According to embodiments of the invention, owing to use the Copper Foil that comprises the lower Seed Layer of surface roughness to form fine pattern, the width that short circuit and circuit therefore can not occur can not reduce.In addition, Seed Layer does not exist folding line and chemicals can not peel off and be penetrated in the peel ply owing to physics, and thereby can obtain to comprise the embedded terminal block of high-density circuit pattern.
Claims (10)
1. an embedded Copper Foil is used for fine pattern, and said embedded Copper Foil comprises:
The foils layer;
The barrier layer is formed on the surface of said foils layer; And
Seed Layer, it is formed on the surface on said barrier layer,
Wherein said barrier layer is nickel dam or nickel alloy layer,
Wherein said Seed Layer is the copper layer, and
The average surface roughness Rz that it is characterized in that said Seed Layer is that 1.5 μ m or littler and Rmax are 2.5 μ m or littler.
2. embedded Copper Foil according to claim 1, the thickness range that it is characterized in that said barrier layer are that 0.1 μ m is to 10 μ m.
3. embedded Copper Foil according to claim 1, it is characterized in that said barrier layer with respect to the etching solution that is used for said Seed Layer is inertia.
4. embedded Copper Foil according to claim 1, the thickness range that it is characterized in that said Seed Layer are that 0.1 μ m is to 10 μ m.
5. embedded Copper Foil according to claim 1 is characterized in that said Seed Layer is to form through bright plating.
6. embedded Copper Foil according to claim 5 is characterized in that employed electroplating solution comprises 10 to 400g/L cupric sulfate pentahydrate, 10 to 400g/L sulfuric acid, 1 to 100ppm chloride ion, brightener, carrier and leveling agent in the said bright plating.
7. embedded Copper Foil according to claim 6 is characterized in that said brightener comprises to be selected from by two-(3-sulfopropyl)-sodium disulfide salt, sulfydryl propane sulfonic acid and N, at least one in the group that the N-dimethyl dithiocarbamic acid is formed.
8. embedded Copper Foil according to claim 6 is characterized in that said carrier comprises to be selected from the group that is made up of polyethylene glycol, polypropylene glycol and hydroxyethylcellulose at least one.
9. embedded Copper Foil according to claim 6 is characterized in that said leveling agent comprises to be selected from the group that is made up of gelatin and glue at least one.
10. embedded Copper Foil according to claim 1 further comprises the antirust coat that is formed on the said Seed Layer.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020090081909A KR101298999B1 (en) | 2009-09-01 | 2009-09-01 | Embedded Copper foil for fine pattern |
| KR10-2009-0081909 | 2009-09-01 | ||
| PCT/KR2010/005860 WO2011028004A2 (en) | 2009-09-01 | 2010-08-31 | Copper foil for an embedded pattern for forming a microcircuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102577645A true CN102577645A (en) | 2012-07-11 |
Family
ID=43649764
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010800387300A Pending CN102577645A (en) | 2009-09-01 | 2010-08-31 | Copper foil for an embedded pattern for forming a microcircuit |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5464722B2 (en) |
| KR (1) | KR101298999B1 (en) |
| CN (1) | CN102577645A (en) |
| WO (1) | WO2011028004A2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105765110A (en) * | 2013-11-27 | 2016-07-13 | Ｊｘ金属株式会社 | Copper foil with carrier, laminate, printed wiring board, and method for manufacturing the printed wiring board |
| CN111491456A (en) * | 2019-01-29 | 2020-08-04 | 上海美维科技有限公司 | Manufacturing method of printed circuit board with buried circuit |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012132574A1 (en) * | 2011-03-25 | 2012-10-04 | Jx日鉱日石金属株式会社 | Composite copper foil and method for producing same |
| JP5723971B2 (en) * | 2011-03-25 | 2015-05-27 | Jx日鉱日石金属株式会社 | Composite copper foil and method for producing the same |
| JP6403969B2 (en) * | 2013-03-29 | 2018-10-10 | Ｊｘ金属株式会社 | Copper foil with carrier, printed wiring board, copper-clad laminate, electronic device, and method for manufacturing printed wiring board |
| JP6425401B2 (en) * | 2013-04-26 | 2018-11-21 | Ｊｘ金属株式会社 | Copper foil for high frequency circuit, copper clad laminate for high frequency circuit, printed wiring board for high frequency circuit, copper foil with carrier for high frequency circuit, electronic device, and method of manufacturing printed wiring board |
| CN105746003B (en) * | 2013-11-22 | 2018-12-21 | 三井金属矿业株式会社 | The manufacturing method of printed wiring board with embedding circuit and the printed wiring board obtained with the manufacturing method |
| KR101682555B1 (en) * | 2015-08-07 | 2016-12-07 | 대덕전자 주식회사 | Method of manufacturing a fine pattern printed circuit board |
| JP7230908B2 (en) | 2018-04-24 | 2023-03-01 | 三菱瓦斯化学株式会社 | Etching solution for copper foil and method for producing printed wiring board using the same, etching solution for electrolytic copper layer and method for producing copper pillar using the same |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2927968B2 (en) * | 1995-02-16 | 1999-07-28 | 三井金属鉱業株式会社 | Copper foil for high-density multilayer printed circuit inner layer and high-density multilayer printed circuit board using said copper foil for inner layer circuit |
| JP2000269637A (en) * | 1999-03-18 | 2000-09-29 | Furukawa Circuit Foil Kk | Copper foil for high-density ultrafine wiring board |
| CN1620221A (en) * | 2003-11-11 | 2005-05-25 | 古河电路铜箔株式会社 | Ultra-thin copper foil with carrier and printed wiring board using ultra-thin copper foil with carrier |
| CN1925982A (en) * | 2004-03-16 | 2007-03-07 | 三井金属矿业株式会社 | Carrier foil-attached electrolytic copper foil proviuded with insulation layer forming resin layer, copper-clad laminated sheet, printed circuit board, production method for multilayer copper-clad lam |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3081026B2 (en) * | 1991-07-18 | 2000-08-28 | 古河サーキットフォイル株式会社 | Electrolytic copper foil for printed wiring boards |
| KR100389061B1 (en) * | 2002-11-14 | 2003-06-25 | 일진소재산업주식회사 | Electrolytic copper foil and process producing the same |
| JP3977790B2 (en) * | 2003-09-01 | 2007-09-19 | 古河サーキットフォイル株式会社 | Manufacturing method of ultra-thin copper foil with carrier, ultra-thin copper foil manufactured by the manufacturing method, printed wiring board using the ultra-thin copper foil, multilayer printed wiring board, chip-on-film wiring board |
| JP2007186797A (en) * | 2007-02-15 | 2007-07-26 | Furukawa Circuit Foil Kk | Method for producing ultrathin copper foil with carrier, ultrathin copper foil produced by the production method, and printed circuit board, multilayer printed circuit board and wiring board for chip on film using the ultrathin copper foil |
| KR101135332B1 (en) * | 2007-03-15 | 2012-04-17 | 닛코킨조쿠 가부시키가이샤 | Copper electrolyte solution and two-layer flexible substrate obtained by using the same |
-
2009
- 2009-09-01 KR KR1020090081909A patent/KR101298999B1/en active IP Right Grant
-
2010
- 2010-08-31 WO PCT/KR2010/005860 patent/WO2011028004A2/en active Application Filing
- 2010-08-31 JP JP2012526669A patent/JP5464722B2/en active Active
- 2010-08-31 CN CN2010800387300A patent/CN102577645A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2927968B2 (en) * | 1995-02-16 | 1999-07-28 | 三井金属鉱業株式会社 | Copper foil for high-density multilayer printed circuit inner layer and high-density multilayer printed circuit board using said copper foil for inner layer circuit |
| JP2000269637A (en) * | 1999-03-18 | 2000-09-29 | Furukawa Circuit Foil Kk | Copper foil for high-density ultrafine wiring board |
| CN1620221A (en) * | 2003-11-11 | 2005-05-25 | 古河电路铜箔株式会社 | Ultra-thin copper foil with carrier and printed wiring board using ultra-thin copper foil with carrier |
| CN1925982A (en) * | 2004-03-16 | 2007-03-07 | 三井金属矿业株式会社 | Carrier foil-attached electrolytic copper foil proviuded with insulation layer forming resin layer, copper-clad laminated sheet, printed circuit board, production method for multilayer copper-clad lam |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105765110A (en) * | 2013-11-27 | 2016-07-13 | Ｊｘ金属株式会社 | Copper foil with carrier, laminate, printed wiring board, and method for manufacturing the printed wiring board |
| CN111491456A (en) * | 2019-01-29 | 2020-08-04 | 上海美维科技有限公司 | Manufacturing method of printed circuit board with buried circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5464722B2 (en) | 2014-04-09 |
| WO2011028004A3 (en) | 2011-07-14 |
| WO2011028004A2 (en) | 2011-03-10 |
| KR101298999B1 (en) | 2013-08-23 |
| KR20110024055A (en) | 2011-03-09 |
| JP2013503965A (en) | 2013-02-04 |
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Application publication date: 20120711 |