CN102473650B - 接合材料、半导体装置及其制造方法 - Google Patents

接合材料、半导体装置及其制造方法 Download PDF

Info

Publication number
CN102473650B
CN102473650B CN201080027789.XA CN201080027789A CN102473650B CN 102473650 B CN102473650 B CN 102473650B CN 201080027789 A CN201080027789 A CN 201080027789A CN 102473650 B CN102473650 B CN 102473650B
Authority
CN
China
Prior art keywords
layer
semiconductor device
grafting material
semiconductor element
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201080027789.XA
Other languages
English (en)
Other versions
CN102473650A (zh
Inventor
冈本正英
池田靖
村里有纪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2009207684A external-priority patent/JP5738523B2/ja
Priority claimed from JP2009209957A external-priority patent/JP5723523B2/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of CN102473650A publication Critical patent/CN102473650A/zh
Application granted granted Critical
Publication of CN102473650B publication Critical patent/CN102473650B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C18/00—Alloys based on zinc
    • C22C18/04—Alloys based on zinc with aluminium as the next major constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016—Brazing of electronic components
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/01—Layered products comprising a layer of metal all layers being exclusively metallic
    • B32B15/017—Layered products comprising a layer of metal all layers being exclusively metallic one layer being formed of aluminium or an aluminium alloy, another layer being formed of an alloy based on a non ferrous metal other than aluminium
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C21/00—Alloys based on aluminium
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C21/00—Alloys based on aluminium
    • C22C21/06—Alloys based on aluminium with magnesium as the next major constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F2998/00—Supplementary information concerning processes or compositions relating to powder metallurgy
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/42—Printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29118—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29201—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29211—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01012—Magnesium [Mg]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0133—Ternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0134—Quaternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49826—Assembling or joining
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12736—Al-base component

Abstract

本发明提供接合材料、半导体装置及其制造方法，当采用现有的Zn/Al/Zn金属包层材料进行接合时，由于接合部的热阻至少与现有的高铅焊料相当，接合部的厚度必需为现有的焊料的2倍(约100μm)以下。另外，为了充分呈现Al层的应力缓冲能力，Al层的厚度必需尽量厚。为了得到充分的接合性，接合时必需用约2g/mm2以上的荷重进行加压，批量生产成本显著上升。本发明的半导体装置，其特征在于，包括：半导体元件；框架；和将上述半导体元件与上述框架接合的接合部；上述接合部含Zn-Al合金，在上述接合部与上述半导体元件的界面及上述接合部与上述框架的界面，Al氧化物膜的面积相对全部界面面积之比为0％以上5％以下。

Description

接合材料、半导体装置及其制造方法
技术领城
本发明涉及接合材料及半导体装置。
背景技术
铅对人体的神经及造血系统的不良影响是明确的，欧洲的控制汽车的铅使用的ELV指令(End－of Life Vehicles directive，涉及废汽车的指令)以及禁止电气及电子仪器中使用铅的RoHS指令(Restriction of the use of certain Hazardous Substances in electricaland electronic equipment)，分别于2000年10月及2006年7月施行。电气及电子仪器的部件的电接合使用的焊料中，原来含铅。焊料按熔点分为高温、中温、低温的3种，作为中温焊料，有Sn‐Ag‐Cu系焊料、Sn‐Cu系焊料等，作为低温焊料，有Sn‐Bi系焊料、Sn‐In系焊料等已得到开发及应用，均符合ELV指令、RoHS指令。但是，由于这些焊料的铅含量高达85％以上，尚未开发出无铅的高耐热接合材料来代替具有高熔点的高铅焊料，高铅焊料成为上述ELV指令、RoHS指令的对象之外。然而，高铅焊料，含有作为构成成分的85质量％以上的铅，与RoHS指令禁止的Sn‐Pb共晶焊料相比，环境负荷大。因此，殷切希望开发出代替高铅焊料的替代接合材料。
专利文献1(日本特许3850135号公报)公开了含“Al为1～9质量％，含Ge为0.05～1质量％，其余为Zn及不可避免的杂质所构成的高温焊料用Zn合金”。
另外，专利文献2(日本特许3945915号公报)公开了含“Al为1～9质量％、Mg为0.05质量％以上、小于0.5质量％、Ga为0.1～8质量％、其余为Zn及不可避免的杂质所构成的焊料用Zn合金”。
另外，专利文献3(日本特开2008‐126272号)公开了在“Al系合金层的最表面设置了Zn系合金层的接合材料。特别是Al系合金层的Al含量为99～100质量％、或Zn系合金层的Zn含量为90～100质量％的接合材料”。
这里用图1及图2对现有的适于高耐热接合的应用例加以说明。图1为表示现有的半导体装置结构之一例的图，图2为现有的半导体装置中采用再熔融的焊料产生溢出(flush)时的说明图。
如图1所示，半导体装置7，是把半导体元件1用焊料3接合在框架2上(小片接合：die bonding)，用金属线4，把引线5的内部引线与半导体元件1的电极加以引线接合后，用封装用树脂6或惰性气体加以封装而制成。
该半导体装置7，用Sn‐Ag‐Cu系的中温无铅焊料，在印刷基板上附与回流焊料。Sn‐Ag‐Cu系无铅焊料的熔点高达约220℃，在回流接合时，能够想到接合部被加热达到最高260℃。因此，为使回流接合时的接合部(小片接合)不发生再熔融，小片接合时使用具有290℃以上熔点的高铅焊料。
目前已开发的Sn‐Ag‐Cu系等的中温无铅焊料，由于熔点为约220℃，在用于半导体元件的小片接合时，半导体装置于印刷基板上回流接合时焊料发生熔融。接合部周围用树脂模制时，内部的焊料发生熔融，由于熔融时的体积膨胀，产生如图2所示的溢出，焊料3从封装用树脂6与框架2的界面漏出。或者，既使在未漏出前，与漏出相作用，结果导致凝固后焊料中形成大的凸缘8而成为不合格产品。作为代替材料的候补，报告有从熔点方面考虑，Au‐Sn、Au‐Si、Au‐Ge等Au系焊料，Zn、Zn‐Al系焊料及Bi、Bi‐Cu、Bi‐Ag等焊料，世界各国对它们进行了探讨。
然而，Au系焊料中，作为构成成分的Au含80重量％以上，从成本方面考虑，难以广泛采用，其是硬而脆的硬焊料。Bi系焊料，热导率为约9W/m·K，比现有的高铅焊料低，可以推测在要求高放热性的动力半导体装置及动力模块等中难以使用。另外，该焊料也是硬而脆。另外，Zn及Zn‐Al系焊料，虽然具有高达约100W/m·K的热导率，但由于难以浸润(特别是Zn‐Al系焊料)、焊料硬、热膨张率大，接合后冷却时，存在因热应力的作用易破坏半导体元件等问题。另外，由于纯Zn的反应性高，高温时界面反应显著进行，即使得到良好的接合，也得不到高耐热性。
另外，作为解决Zn‐Al系焊料课题的难浸润及硬度的接合材料，公开了采用Zn/Al/Zn金属包层材料的方法。按照公开的内容，通过表面的Zn层的作用可确保浸润性(接合性)，由于内层的Al在金属中为软，具有应力缓冲能力，可确保接合的可靠性。另外，Zn及Al的熔点分别为420℃、660℃，由于通过Zn与Al的扩散生成的Zn‐Al共晶(Zn‐6Al)的熔点为382℃，故接合材料为高熔点，具有高耐热性。
现有技术文献
专利文献
专利文献1:日本特许3850135号公报
专利文献2:日本特许3945915号公报
专利文献3:日本特开2008‐126272号公报
发明内容
发明要解决的课题
在专利文献1及专利文献2记载的Zn‐Al系焊料的情况下，由于Al作为成分，在熔融的瞬间，表面上形成Al氧化物膜，如氧化物膜不机械破坏，则得不到充分的浸润性。在此情况下，在接合时，由于仅在极局部的场所接合，仅得到非常低的接合强度，存在不耐用的问题。
另一方面，专利文献3所述的采用Zn/Al/Zn金属包层材料的接合，本发明人探讨的结果是，可确认能得到接合性及接合可靠性，但由于接合部的热阻既使低也与现有高铅焊料相当，已判明接合部的厚度必需达到现有的焊料的2倍(约100μm)以下。另外，为了充分呈现Al层的应力缓冲能力，Al层的厚度必需尽量厚。由于这些原因，Zn层的厚度必须薄到10～20μm。当Zn层的厚度薄时，为得到充分的接合性，被接合材料的接合面与Zn/Al/Zn金属包层材料的Zn层必需密合，因此，接合时必需施加约2g/mm2以上的荷重进行加压。另外，专利文献3还明确指出接合时必需加压。接合时即使低荷重加压，则生产成本也显著上升。另外，制品有时也难以采用。
采用现有的Zn/Al/Zn金属包层材料进行接合时，存在的课题是接合时必需加压。
另外，专利文献3所述的采用Zn/Al/Zn金属包层材料进行的接合，可得到接合性及接合可靠性，即使采用Zn-Al共晶接合，必需采用最低382℃、实用上390～400℃以上的接合温度。接合后的冷却时，接合部的最后凝固温度为Zn－Al共晶的熔点382℃。382℃至室温的温差非常大，为382－25＝357℃。另外，Zn/Al/Zn金属包层材料的主要用途在半导体装置内进行小片接合时，通常，半导体元件(Si芯片)与Cu或Cu合金制的框架进行接合。由于Si与Cu或Cu合金的热膨胀率差非常大，当焊料的凝固温度与室温的温差大时，因上述热膨胀率差产生的热应力得不到缓和，半导体元件往往发生破坏。另外，当接合温度高达390～400℃时，Si芯片、含框架的被接合材料的周边部件的耐热性至少必需在400℃以上，部件的选择范围窄是个课题。
用于解决课题的手段
在本申请公开的发明中，简单说明有代表性的发明概要如下。
(1)接合部件，其特征在于，在含有Al层、和在上述Al层的两主面上分别设置了第1及第2的Zn层的接合材料中，上述Al层相对上述第1或上述第2的Zn层的厚度之比为0.59以下。
(2)半导体装置，其特征在于，包括:
半导体元件；框架；和将上述半导体元件与上述框架接合的接合部；
上述接合部含有Zn－Al合金，在上述接合部与上述半导体元件的界面及上述接合部与上述框架的界面，Al氧化物膜的面积相对界面全部面积之比为0％以上、5％以下。
(3)半导体装置的制造方法，其特征在于，在包含第1部件与第2部件之间设置接合材料的设置工序；以及加热熔融该接合材料，使上述第1部件与第2部件接合的接合工序的半导体装置制造方法中，上述接合材料是在Al层的两主面上形成了Zn层的接合材料，在上述接合工序，使上述接合材料的上述Al层及上述Zn层全部熔融后进行接合。
发明效果
按照本发明，具有下列任意效果。能够不用加压进行接合。另外，能够得到具有良好的应力缓冲能力的接合材料。
附图说明
图1为表示现有的半导体装置的结构之图。
图2为说明图1的半导体装置中因再熔融焊料产生的溢出之图。
图3为表示本发明的实施方案涉及的接合材料的制造方法之一例的图。
图4为表示本发明的实施方案涉及的接合材料的制造方法又一例的图。
图5为本发明的实施方案涉及的接合材料的断面之一例。
图6为表示本发明的实施方案中使用的接合材料的各层厚度的图。
图7为表示本发明的实施例1中半导体装置之一例的图。
图8为表示图7的半导体装置中使用接合材料的接合部断面照片的图。
图9为图7的半导体装置中的浸润性、应力缓冲性及接合时是否加压的结果与比较例一起表示的图。
图10为成为图9的应力缓冲性的结果判定基础的温度循环试验结果之一部分与比较例一起表示的图。
图11为表示本发明的实施例的半导体装置之一例的图。
图12为表示图11的半导体装置中接合材料一体型的金属罩的图。
图13为图11的半导体装置中、图11的半导体装置中，浸润性及接合时是否加压的结果与比较例一起表示的结果图。
图14为本发明的实施方案涉及的接合材料作为半导体装置凸缘的图。
图15为表示采用现有的高铅焊料接合的半导体装置结构之一例的图。
图16为图15的半导体装置中因再熔融焊料产生的溢出的说明图。
图17为包层压延方法的说明图。
图18为加压成型方法的说明图。
图19为表示本发明涉及的接合材料的断面之一例的图。
图20为表示本发明涉及的接合材料的实验条件的图。
图21为表示采用本发明涉及的接合材料进行接合的半导体装置的断面之一例的图。
图22为表示采用本发明涉及的接合材料的接合部断面照片的图。
图23为表示本发明涉及的半导体装置的实验结果的图。
图24为表示采用本发明涉及的接合材料进行接合的半导体装置的断面之一例的图。
图25为表示图24的半导体装置中接合材料一体型的金属罩之一例的图。
图26为表示本发明涉及的半导体装置的实验结果的图。
图27为表示采用本发明涉及的接合材料进行接合的半导体装置的断面及安装结构之一例的图。
具体实施方式
下面基于附图对本发明的实施例进行详细说明。还有，在用于说明实施例的全部图中，同一部件，原则上用同一符号，省略其反复说明。
图5为本发明实施方案涉及的接合材料的断面之一例。从下往上依次为Zn层(以后也用Zn表示)101、Al层(以后也用Al表示)102、Zn层(以后也用Zn表示)101进行层叠。
在这里，中间的Al层的厚度希望为10μm以上50μm以下。如下所述，Zn层/Al层/Zn层的厚度比为1:0.52:1，希望Al层的比例大，为确保接合可靠性，总厚度必需最低达到48微米以上，Al层的厚度必需最低达到10微米。即，如Al层的厚度在10微米以上，Zn/Al/Zn层的总厚度(接合部的厚度)达到48微米以上，可确保接合可靠性。当薄到50μm以下时，因接合时的热负荷(接合温度、接合时间)，通过Zn层与Al层的反应，可使Al层完全消失。
另外，希望接合材料的Zn层/Al层/Zn层的厚度比为1:0.52～0.59:1，Al层的比例加大。当Zn层/Al层/Zn层的厚度比处于上述范围内，Al完全消失时，接合部的Al含量达到9质量％以上，由此，接合部富Al的Zn‐Al相的比例多达Zn‐6Al相的20％以上，可以阻碍裂纹的扩大，提高应力缓冲性即接合可靠性。另外，当大于1:0.59:1，Al层增厚时，接合部的Al含量大于10质量％，此时，存在的问题是，在接合温度420℃，Al层未完全消失，存在必需更加提高温度的课题。
图3为表示本发明实施方案涉及的接合材料的制造方法之一例的图。本发明的实施方案涉及的接合材料，把Zn层101a、Al层102a、Zn层101a依次重叠，进行压延加工，即通过进行金属包层压延进行制造。用辊轧机103进行压延，在Zn层101a与Al层102a进行接触的同时，因压力作用产生大的变形，Zn层101a及Al层102a的表面上形成的氧化物膜被破坏，通过新生面进行金属接合。在下列实施例1～30中，采用上述方法，制作本发明的实施方案涉及的接合材料(Zn/Al/Zn金属包层材料)。
另外，图4为表示本发明的实施方案涉及的接合材料的制造方法又一例的图。本发明的实施方案涉及的接合材料，也是可以把Zn层101b、Al层102b、Zn层101b依次重叠层压后进行加压成型而制造的。采用加压成型机104，进行加压成型时，所以在Zn层101b与Al层102b进行接合的同时，因压力作用而产生大的变形，在Zn层101b及Al层102b的表面上形成的氧化物膜被破坏，通过新生面进行金属接合。加压成型中，达到Zn与Al的扩散变显著的温度前，如不施加热负荷，Al扩散至表面Zn层，不到达最表面，故接合时可得到良好的浸润。
采用上述制造方法制作的Zn/Al/Zn金属包层材料，进行半导体装置内部的小片接合。具体的是，半导体装置包括:半导体元件；接合该半导体元件的框架；一端成为外部端子的引线；该引线的另一端与该半导体元件的电极进行接合的金属线；以及将该半导体元件及该金属线用树脂封装的树脂，该半导体元件与该框架的接合采用该Zn/Al/Zn金属包层材料。接合时的热负荷为使Al层消失、全部接合部完全熔融，接合温度应在400℃以上、接合时间在2min以上。由于全部接合部发生熔融，所以接合时即使不加压，也可确保充分的浸润。接合后，接合部大部分由Zn‐Al合金构成(也可残留一部分Zn相)，接合部与半导体元件的界面及接合部与框架的界面上几乎不存在Al氧化物，各界面上存在的Al氧化物膜的面积，相对各界面总面积之比在5％以下。由于界面上存在的Al氧化物阻碍金属的浸润，故存在Al氧化物的部分不发生金属接合。因此，当其相对界面总面积之比在5％以下时，可得到充分的接合强度。
另外，接合部由于大部分由Zn‐Al合金构成(也可残留一部分Zn相)，其中，熔点最低的是Zn‐6Al共晶达到382℃。即，当该接合部也具有380℃的耐热性。另外，Al层消失，由于Zn‐Al合金相中不存在硬而脆的金属间化合物相(Zn与Al不形成金属间化合物)，故具有应力缓冲性，即接合可靠性。
特别是，接合材料的Zn层/Al层/Zn层的厚度比为1:0.52～0.59:1而使Al层加厚，当Al完全消失时，希望接合部的Al含量在9质量％以上10质量％以下。通过使Al层厚度比1:0.52:1加大，当Al完全消失时，由于接合部的Al含量大于9质量％，因此，接合部的富Al的Zn‐Al相的比例增加达到Zn‐6Al相的20％以上，因此，阻碍裂纹的扩大，应力缓冲性即接合可靠性提高。另外，当Al层厚度大于1:0.59:1时，接合部的Al含量大于10质量％，此时，在接合温度420℃，Al层未完全消失，故必需更加提高温度。
本发明的实施方案涉及的接合材料(Zn/Al/Zn金属包层材料)，也可在半导体装置内部的气密封装部的接合及小片接合中使用。
具体的是，在包括:半导体元件；接合该半导体元件的基板；一端成为外部端子的引线；该引线的另一端与该半导体元件的电极进行接合的金属线；以及对该半导体元件及该金属线进行气密封装且与该基板接合的金属罩的半导体装置中，该基板与该金属罩的接合时使用上述Zn/Al/Zn金属包层材料。接合时的热负荷为使Al层消失、全部接合部完全熔融，接合温度在400℃以上、接合时间在2min以上。由于全部接合部发生熔融，所以即使接合时不加压，也可确保充分的浸润。接合后，接合部由Zn‐Al合金构成(有时也残留一部分Zn相)、基板与接合部的界面及接合部与金属罩的界面上几乎不存在Al氧化物，各界面上存在的Al氧化物膜的面积相对各界面总面积之比在5％以下。由此，得到充分的接合强度。
另外，由于接合部由Zn‐Al合金构成(有时也残留一部分Zn相)，其中熔点最低的是Zn‐6Al共晶达到382℃。即，当该接合部具有380℃的耐热性。另外，Al层消失，但由于Zn‐Al合金相中不存在硬而脆的金属间化合物相(Zn与Al不形成金属间化合物)，故具有应力缓冲性即接合可靠性。特别是相比接合材料的Zn层/Al层/Zn层的厚度比达到1:0.52～0.59:1而使Al层增厚，Al完全消失时，希望接合部的Al含量达到9质量％以上10质量％以下。当通过Al层厚度比1:0.52:1而增厚，Al完全消失时，接合部的Al含量变成大于9质量％，由此，接合部的富Al的Zn‐Al相的比例，由于增大到Zn‐6Al相的20％以上时，由此，阻碍了裂纹的扩大，提高应力缓冲性即接合可靠性。另外，当通过Al层比1:0.59:1而增厚时，接合部的Al含量变得大于10质量％，此时，在接合温度420℃，Al层未完全消失，必需升至更高的温度。
另外，该半导体装置的小片接合中采用本发明的实施方案涉及的接合材料(Zn/Al/Zn金属包层材料)时也可得到同样的结果。
本发明的实施方案涉及的接合材料(Zn/Al/Zn金属包层材料)，也可用于半导体装置内部的半导体元件与基板的接合。此时，进行半导体装置内部的小片接合、或在半导体装置内的气密封装部的接合中使用时，也可得到同样的结果。
实施例1
图6为表示本实施例中使用的接合材料(金属包层材料1～7)的各层厚度的图。例如，金属包层材料1是Zn层、Al层、Zn层的厚度分别为19μm、10μm、19μm，以下同样表示。在这里，金属包层材料1～4为本发明的实施例中使用的接合材料、金属包层材料5～7为比较例中使用的接合材料。
下列实施例中使用的Zn/Al/Zn金属包层材料，采用图3或图4中所示的接合材料的制造方法制作(实施例1～12)。
图7为表示本发明的实施例1中的半导体装置之一例的图。半导体装置11包括：半导体元件1；接合该半导体元件1的框架2；一端成为外部端子的引线5；该引线5的另一端与半导体元件1的电极进行接合的金属线4；以及将半导体元件1及金属线4进行树脂封装的封装用树脂6；半导体元件1与框架2用接合材料10加以接合的结构。
半导体元件1与框架2之间，配置了用图3或图4所述制造方法制造的接合材料，采用图3或图4所述的接合材料，通过接合材料10，把半导体装置11加以小片接合而成。
其次，对图7中所述的半导体装置11的制造方法加以说明。在该半导体装置11的制造中，在镀过Ni或Ni/Ag或Ni/Au的框架2上，配置图3或图4中所述的制造方法制造的接合材料，把大小5mm方形的半导体元件1加以层压后不加压下于氮气气氛中，于400～420℃、加热2～5min，进行小片接合。此时的接合材料(Zn－Al合金)10的断面示于图8。由于接合材料(Zn/Al/Zn金属包层材料)的Al层厚度薄到50μm以下，通过接合时的加热，Zn与Al进行反应，Al层消失，接合部完全熔融。由此，可不加压进行接合。加热后，接合材料10变成Zn‐Al合金相。然后，半导体元件1与引线5之间用金属线4加以金属线焊接，于180℃用封装树脂6进行封装。
图9为对图6中所记载的各金属包层材料1～4，进行小片接合时的浸润性及仅进行小片接合时的试样，于－55℃/150℃(15min/15min)温度循环试验时，从各循环数中的接合部断面的裂纹扩大率评价应力缓冲性的结果。图9的作为应力缓冲性结果判定的温度循环试验结果的一部分与比较例1～18一起示于图10。
关于浸润性，对半导体元件的面积(25mm2)达到90％以上的浸润时为〇，不足90％～75％以上时为△、不足75％时为×。关于应力缓冲性，裂纹扩大率采用现有的Pb‐1.5Ag‐5Sn焊料以下时为〇、采用现有的Pb‐1.5Ag‐5Sn焊料达到125％以下时为△、超过125％时为×。还有，“-”表示未进行接合，对温度循环试验即应力缓冲性的未进行评价。
该评价的结果是，采用金属包层材料1～4(Zn/Al/Zn)的接合材料进行接合时，任意一种均得到90％以上的浸润性。对应力缓冲性，总厚度薄到50μm的金属包层材料1，裂纹扩大率，现有的Pb‐1.5Ag‐5Sn焊料达到100～125％，评价为△，金属包层材料2～4，任意一种的裂纹扩大率，均在现有的Pb‐1.5Ag‐5Sn焊料以下，评价为〇。
另一方面，比较例1～9(使用图6的金属包层材料5～7)的情况，为了得到充分的接合性，被接合材料的接合面与Zn/Al/Zn金属包层材料的Zn层必需密合，因此，在接合时有必要用1.75g/mm2的荷重进行加压。这样制作的试样的浸润性、应力缓冲性，任意一种均为〇。
另外，比较例10～12(Zn‐6Al‐5Ge)的情况，由于在熔融的Zn‐Al合金的表面形成牢固的Al氧化物膜，因此对任何框架均不足75％的浸润，几乎未达到浸润。因此，不能进行应力缓冲性的评价。比较例13～15(Zn)的情况，在Zn的熔点420℃以上的温度下进行接合，得到90％以上的浸润。然而，在接合后冷却时，因半导体元件与Cu制框架的热膨张率差产生的热应力未得到缓和，半导体元件发生破坏。为免于破坏，进行温度循环试验的结果是，半导体元件发生破坏。比较例16～18(现有的Pb‐1.5Ag‐5Sn)，浸润性、应力缓冲性任何一项均为〇。在本探讨中，接合时用0.02g/mm2的荷重进行加压，但即使未加压也可接合。然而，本比较材料还含铅93.5质量％。
如上所述，按照实施例1～12，本发明实施例中的接合材料(如图3或图4所记载)，所以通过半导体装置11用小片接合进行接合，由于Al层薄到50μm以下，通过接合时加热，Zn与Al发生反应，Al层消失，接合部完全熔融，因此，不加压也可进行接合。
(实施例13～24)
图11为表示本发明的实施例的半导体装置之一例的图。实施例13～24，如图11所示，作为必须加以气密封装的半导体装置21的封装材料，采用图3或图4所记载的接合材料进行接合。该半导体装置21包括:半导体元件1；接合该半导体元件1的模块基板23；一端成为外部端子的引线5；该引线5的另一端与半导体元件1的电极接合的金属线4；以及将半导体元件1及金属线4加以气密封装，在模块基板23上把半导体元件1及芯片部品等，用Sn系无铅焊料3、或导电性粘合剂、Cu粉/Sn系焊料粉复合材料等加以接合后，把接合材料10a置于模块基板23与金属罩22之间，不加压于400～420℃、加热2～5分钟进行接合。由于接合材料(Zn/Al/Zn金属包层材料)的Al层的厚度薄到50μm以下，故通过接合时的加热，Zn与Al发生反应，Al层消失，接合部完全熔融。因此，可不加压进行接合。加热后的接合材料10a变成Zn‐Al合金相。
还有，关于金属罩，为了进行气密封装，如图12所示，科瓦铁镍钴合金、殷钢等的金属合金24与Al层102及Zn层101一起用金属包层压延进行加工，也可作为接合材料一体型的金属罩22a。
关于实施例13～24(使用图6的金属包层材料1～4)，封装时的浸润性的评价结果示于图13。关于浸润性，相对封装面积，气密得到保持的浸润时为〇，空隙、裂纹等不能保持气密时为×。该评价的结果是，采用金属包层材料1～4(Zn/Al/Zn)的接合材料进行接合时，任意一种均得利90％以上的浸润性。
另一方面，比较例19～24(使用图6的金属包层材料5、6)的情况，为了得到充分的接合性，被接合材料的接合面与Zn/Al/Zn金属包层材料的Zn层必须密合，因此，在接合时有必要用1.75g/mm2的荷重进行加压。这样制作的试样的浸润性，任意一种均为〇。比较例25～27(Zn‐6Al‐5Ge)的情况，由于熔融的Zn‐Al合金的表面形成了牢固的Al氧化物膜，因未浸润及空隙的作用而不能加以气密封装。
如上所述，按照实施例13～24，通过把本实施例的接合材料10a，用作半导体装置21的封装材料，由于Al层薄到50μm以下，所以通过接合时的加热，Zn与Al发生反应，Al层消失，接合部完全熔融，因此，不加压也可以接合。
实施例2
图14为采用本发明的实施方案涉及的接合材料10b(图3或图4中记载)作为必需进行倒装片安装的半导体装置31的凸缘。该半导体装置31具有半导体元件1，该半导体元件1与安装它的基板34，通过接合材料10b加以接合而构成。
该半导体装置31的制造中，接合材料10b，置于基板34的Cu配线35上实施过Ni或Ni/Au镀36的凸缘、半导体元件1的Al配线32上实施过Zn镀33的电极之间，于380℃不加压下进行接合。
其他实施例中，本实施例的接合材料10b，通过用作半导体装置31的凸缘，可不加压下进行接合。
实施例3
图19为表示本发明涉及的接合材料的断面之一例的图。接合材料具有Zn层301、Al系合金层302而构成，从下往上依次层叠Zn层(有时也仅用Zn表示)301、Al系合金层(有时也仅用Al系合金表示)302、Zn层(有时也仅用Zn表示)301。在这里，中间的Al系合金层由于含有Mg、Sn、Ge、Ga、Bi、In中的1种以上金属，与Zn反应时，形成熔点350℃以下的Zn-Al系合金。当Al系合金层中含有Mg时，Mg含量希望在20～50质量％。还有，除Mg以外含有Sn，其含量希望在20～50质量％。因此，低熔点的Zn-Al-Mg系、Zn-Al-Mg-Sn系、Zn-Al-Mg-Gc系等合金可在接合部形成。
图17为用于制造本发明涉及的接合材料的金属包层压延方法的说明图。在这里，301a为Zn层，302a为Al系合金层，301a为Zn层，将这些层重叠，通过辊轧机303进行压延加工，即进行金属包层压延。当采用辊轧机303进行压延时，Zn层301a与Al系合金层302a接触的同一时机因压力产生大的变形，在Zn层301a与Al系合金层302a的表面形成的氧化物膜被破坏，通过新生面加以金属接合。
另外，图18为用于制造本发明涉及的接合材料的加压成型方法的说明图。在这里，301b为Zn层，302b为Al系合金层，301b为Zn层，将这些层重叠采用加压成型机304进行加压成型。当采用加压成型机304进行加压成型时，Zn层301b与Al系合金层302b接触，同时因压力产生大的变形，因此在Zn层301b与Al系合金层302b的表面形成的氧化物膜被破坏，通过新生面加以金属接合。在加压成型中，Zn与Al系合金的扩散达到显著的温度前如不施加热负荷，Al系合金成分扩散表面的Zn层而不到达最表面，则接合时可得到良好的浸润。
图21为表示采用本发明涉及的接合材料进行接合的半导体装置之一例的图。采用通过图17或图18制作的Zn/Al系合金/Zn金属包层材料，半导体装置211的内部进行小片接合。半导体装置211，具体地说，包括:半导体元件201；通过接合材料210与半导体元件接合的框架202；一端成为外部端子的引线205；该引线205另一端与半导体元件201的电极进行接合的金属线204；以及将半导体元件201及金属线204进行树脂封装的封装用树脂206而构成。在该半导体装置211中，在半导体元件201与框架202接合时，采用图17或图18制作的Zn/Al系合金/Zn金属包层材料。
在接合时，通过Zn/Al系合金/Zn金属包层材料的Al系合金层与Zn层反应，接合部变成Zn-Al-Mg系等的合金。由于该合金的熔点在350℃以下，通过Zn-Al-Mg系等的合金的共晶接合，在350℃以下的低温进行接合成为可能。另外，在接合后冷却时，半导体元件未被破坏，另外，由于接合部具有Zn-Al-Mg系等的合金，因此熔点变成350℃以下，由于至少在300℃以上，故具有300℃的耐热性，可充分耐后工序的260℃回流。另外，通过中间的Al系合金层的应力缓冲能力，也可得到具有良好的接合可靠性的效果。
对该半导体装置211的制造方法加以说明。向实施过Ni或Ni/Ag或Ni/Au镀的框架上供给接合材料，把大小5mm方形的半导体元件201加以层叠后，边加压边在氮气气氛中于350℃加热2分钟，进行小片接合，半导体元件201与框架202通过焊料210加以接合。图22为该半导体装置211的焊料接合部的断面图。通过接合时的加热，Zn与Al系合金反应，在350℃低温可以接合，接合后接合部变成Zn-Al-Mg系等的合金相。然后，半导体元件201与引线205之间用金属线204进行金属线焊接，于180℃用封装用树脂206进行封装。
另外，图25为采用本发现涉及的Zn/Al系合金/Zn金属包层材料，用于半导体装置内部的气密封装部的接合及小片接合加以接合的半导体装置221的构成图。
具体地说，在包括:半导体元件201；采用本发明涉及的Zn/Al系合金/Zn金属包层材料与半导体元件201接合的模块基板223；一端成为外部端子的引线5；该引线5另一端与半导体元件201的电极进行接合的金属线204；以及将半导体元件201及金属线204加以气密封装并在模块基板223上接合的金属罩22的半导体装置221中，模块基板223与金属罩22的接合采用本发现涉及的Zn/Al系合金/Zn金属包层材料。
在接合时，通过Zn/Al系合金/Zn金属包层材料的Al系合金层与Zn层反应，接合部形成Zn-Al-Mg系等的合金。因为该合金的熔点在350℃以下，所以通过Zn-Al-Mg系等的合金的共晶接合，可在350℃的低温进行接合。另外，通过本实施例接合的半导体装置的接合后的接合部不产生裂纹。另外，由于接合部由Zn-Al-Mg系等的合金构成，熔点变成350℃以下，至少在300℃以上，故具有300℃的耐热性，可充分耐后工序的260℃回流。另外，通过中间的Al系合金层的应力缓冲能力，可得到良好的接合可靠性。另外，本发现涉及的金属包层材料，在采用小片接合加以接合的半导体装置中也可得到同样的效果。
图25中所示的半导体装置221制造时，作为气密封装的封装材料，采用本发明涉及的接合材料。对半导体装置221的制造方法说明如下。半导体元件201及金属线204进行气密封装，在模块基板223上把半导体元件201及芯片部件等，采用Sn系无铅焊料203、或导电性粘合剂、Cu粉/Sn系焊料粉复合材料等加以接合后，接合材料210a置于模块基板223与金属罩222之间，边加压边于350℃加热2分钟进行接合。通过接合时的加热，通过Zn与Al系合金反应，在350℃低温能够接合。接合后，接合部变成Zn-Al-Mg系等合金相。
还有，关于金属罩，为了进行气密封装，如图26所示，把科瓦铁镍钴合金、殷钢等金属合金224与Al系合金层302及Zn层301一起采用金属包层压延进行加工，作为接合材料一体型的金属罩222a也可。
另外，本发现涉及的Zn/Al系合金/Zn金属包层材料也可用于半导体装置221内部的半导体元件201与模块基板223的接合。具体地是，半导体元件201与采用本发明涉及的接合材料，通过接合的焊料203，与模块基板223接合，形成半导体装置也可。
在接合时，通过Zn/Al系合金/Zn金属包层材料的Al系合金层与Zn层反应，接合部变成Zn-Al-Mg系等的合金。因为该合金的熔点在350℃以下，所以通过Zn-Al-Mg系等的合金的共晶接合，可在350℃的低温进行接合。另外，由于接合后冷却时半导体元件不被破坏，或在接合部不产生裂纹，另外，由于接合部具有Zn-Al-Mg系等的合金而成，熔点变成350℃以下，至少在300℃以上，故具有300℃的耐热性，可充分耐后工序的260℃回流。另外，通过中间的Al系合金层的应力缓冲能力，也可得到具有良好的接合可靠性的效果。
图20为表示本发明涉及的接合材料的实验条件的图。该图示出采用上述方法制作的金属包层材料8～19的厚度、Al合金层的组成及备注。关于金属包层材料8，Zn层、Al系合金层、Zn层的厚度分别为20、40、20μm，对金属包层材料9～19也同样加以记载。另外，作为Al系合金层，可用Al-44Mg、Al-34Mg-23Sn、Al-27Mg-36Ge、Al等的4种。在这里，金属包层材料8～16是本发明涉及的接合材料，金属包层材料17～19是用于比较的接合材料。另外，在下列所示的实施例中，Zn/Al系合金/Zn金属包层材料全部采用图17所示的金属包层压延法制作。
图23为表示采用本发明涉及的接合材料进行接合的半导体装置的浸润性及接合后的芯片有无破裂的实验结果的图。实施例25～51示出采用本发明涉及的作为接合材料的金属包层材料进行小片接合，制造半导体装置时的浸润性及接合后的芯片有无破裂的实验结果，比较例28～36示出分别采用Al系合金层为Al的金属包层材料17～19进行小片接合，制造半导体装置时的浸润性及接合后的芯片有无破裂的实验结果的图。
关于浸润性，对半导体元件的面积(25mm2)得到90％以上浸润性时为○，不足90％～75％以上时为△，不足75％时为×。
实验的结果是，采用金属包层材料8～16的实施例25～51，金属包层材料、任意框架电镀时，也得到90％以上的浸润性。同样地，任何金属包层材料、任意框架电镀时，在接合后也不发生芯片破裂。
另一方面，采用金属包层材料17～19的比较例28～36，浸润性与实施例25～51同样，比较例28～36全部得到90％以上浸润性，但关于接合后的芯片破裂，所有比较例均发生破裂。这可以认为原因是在比较例28～36中，接合后的接合部的凝固温度高达382℃(Zn-6Al的熔点)所致。
由以上己知，按照实施例25～51，采用本发明涉及的接合材料，通过用于半导体装置的小片接合，可在350℃的低温进行接合。因此，可降低接合后冷却时产生的热应力，可防止半导体元件的破坏。
图24为表示采用本发明涉及的接合材料接合的图25所示的半导体装置221的浸润性及接合后的接合部有无裂纹的实验结果的图。实施例52～69示出采用本发明涉及的作为接合材料的金属包层材料接合的半导体装置221的浸润性及接合后的接合部有无裂纹的实验结果，比较例37～42示出Al系合金层的组成为Al的金属包层材料的任意一种进行接合、制造的半导体装置的浸润性及接合后的接合部有无裂纹的实验结果。
关于浸润性，对封装面积可得到保持气密的浸润性时为○，因空隙、裂纹等而不能保持气密时为×。
实验结果是，采用金属包层材料8～13的实施例52～69，金属包层材料、任意框架电镀时，也得到90％以上的浸润性。同样地，任意金属包层材料、任意框架电镀时，在接合后接合部也不发生裂纹。
另一方面，采用金属包层材料的任意一种的比较例37～42，浸润性与实施例52～69同样，比较例37～42全部得到90％以上浸润性，但关于接合后的接合部的裂纹，所有比较例均发生裂纹。这可以认为原因是在比较例37～42中，接合后的接合部的凝固温度高达382℃(Zn-6Al的熔点)所致。
由以上己知，按照实施例42～69，采用本发明涉及的接合材料，作为半导体装置221的封装材料，可在350℃的低温下接合。因此，可降低接合后冷却时产生的热应力，可防止接合部裂纹的发生。
图27为表示采用本发明涉及的接合材料进行接合的半导体装置的另一实施例。半导体装置231，采用本发明涉及的接合材料210b作为必需进行倒装片安装的半导体装置的凸缘。该半导体装置231，具有半导体元件201，该半导体元件201，与安装它的基板234通过接合材料210b加以接合而构成。
对该半导体装置231的制造方法说明如下。在基板234的Cu配线235上实施过Ni或Ni/Au镀236的凸缘，与半导体元件201的Al系合金配线232上实施过Zn镀233的电极之间，设置接合材料210b，于350℃边加压边进行接合。
在其它实施例中，本发明涉及的接合材料210b，通过用作半导体装置的凸缘，在350℃的低温可进行接合，通过接合后的热应力降低，可以防止半导体元件的破坏或凸缘部发生的裂纹。
上面对基于本发明人提出的发明的实施例进行具体地说明，但本发明又不限于上述实施例，在不偏离其要点的范围内作种种变更也包括在内。
即，在上述说明中，关于本发明的适用，以半导体装置的小片接合为例加以说明，只要是小片接合的半导体装置均适用于多种半导体装置。其中，可以举出，例如整流二极管、IGBT模块、RF模块等前端模块、汽车用电力模块等。
另外，在上述说明中，举例说明半导体装置于模块基板上回流安装，例如在MCM(多片模块：Multi Chip Module)结构中使用时也当然可以适用。
本发明的半导体装置，可用作电力元件、能量晶体管、能量模块、LSI等半导体装置。特别是小片接合、气密封装、倒装片焊接等接合部，可作为无铅的半导体装置使用。
符号的说明
1···半导体元件、2···框架、3···焊料、4···金属线、5···引线、6···树脂、7···半导体装置、8···凸缘、10、10a、10b···接合材料、11···半导体装置、21···半导体装置、22、22a···金属罩、23···模块基板、24···金属合金、31···半导体装置、32···Al配线、33···Zn镀、34···基板、35···Cu配线、36···Ni或Ni/Au镀、101、101a、101b···Zn层、102、102a、102b···Al层、103···辊轧机、104···加压成型机、201···半导体元件、202···框架、203···焊料、204···金属线、205···引线、206···树脂、207···半导体装置、208···凸缘、210、210a、210b···接合材料、211···半导体装置、221···半导体装置、222、222a···金属罩、223···模块基板、224···金属合金、231···半导体装置、232···Al系合金配线、233···Zn镀、234···基板、235···Cu配线、236···Ni或Ni/Au镀、301、301a、301b···Zn层、302、302a、302b···Al系合金层、303···辊轧机、304···加压成型机

Claims (3)

1.接合部件，其特征在于，在具有Al系层、和在上述Al系层的两主面上分别设置了第1及第2的Zn系层的接合材料中，上述Al系层的厚度相对上述第1的Zn系层的厚度之比和Al系层相对于上述第2的Zn系层的厚度之比均为0.52以上0.59以下。
2.按照权利要求1所述的接合部件，其特征在于，上述Al系层的厚度为10μm以上、50μm以下。
3.接合部件的制造方法，其特征在于，在Al系层的两主面上分别设置了第1及第2的Zn系层并进行金属包层压延的接合材料的制造方法中，上述Al系层的厚度相对上述第1的Zn系层的厚度之比和Al系层相对于上述第2的Zn系层的厚度之比均为0.52以上0.59以下。
CN201080027789.XA 2009-09-09 2010-08-30 接合材料、半导体装置及其制造方法 Active CN102473650B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2009-207684 2009-09-09
JP2009207684A JP5738523B2 (ja) 2009-09-09 2009-09-09 接続材料、接続方法及び半導体装置の製造方法
JP2009209957A JP5723523B2 (ja) 2009-09-11 2009-09-11 接続材料、接続材料の製造方法、半導体装置、半導体装置の製造方法、パワーモジュール
JP2009-209957 2009-09-11
PCT/JP2010/005313 WO2011030517A1 (ja) 2009-09-09 2010-08-30 接続材料、半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
CN102473650A CN102473650A (zh) 2012-05-23
CN102473650B true CN102473650B (zh) 2014-09-24

Family

ID=43732198

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201080027789.XA Active CN102473650B (zh) 2009-09-09 2010-08-30 接合材料、半导体装置及其制造方法

Country Status (5)

Country Link
US (1) US8525330B2 (zh)
KR (1) KR101361252B1 (zh)
CN (1) CN102473650B (zh)
DE (1) DE112010003600T5 (zh)
WO (1) WO2011030517A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5601275B2 (ja) 2010-08-31 2014-10-08 日立金属株式会社 接合材料、その製造方法、および接合構造の製造方法
US9735126B2 (en) * 2011-06-07 2017-08-15 Infineon Technologies Ag Solder alloys and arrangements
JP6064886B2 (ja) * 2012-12-26 2017-01-25 株式会社豊田中央研究所 熱伝導性応力緩和構造体

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101185991A (zh) * 2006-11-21 2008-05-28 株式会社日立制作所 接合材料、接合材料的制造方法及半导体装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4464602A (en) * 1982-01-28 1984-08-07 The United States Of America As Represented By The Secretary Of The Army Thin film electroluminescent device
JPS6066843A (ja) * 1983-09-22 1985-04-17 Hitachi Ltd 集積回路パツケ−ジ
JPH07112041B2 (ja) * 1986-12-03 1995-11-29 シャープ株式会社 半導体装置の製造方法
US5227812A (en) * 1990-02-26 1993-07-13 Canon Kabushiki Kaisha Liquid jet recording head with bump connector wiring
US5192835A (en) * 1990-10-09 1993-03-09 Eastman Kodak Company Bonding of solid state device to terminal board
JP3105089B2 (ja) * 1992-09-11 2000-10-30 株式会社東芝 半導体装置
JP3735949B2 (ja) * 1996-06-28 2006-01-18 株式会社デンソー 青色発光材料、それを用いたｅｌ素子、及びその製造方法
US6238808B1 (en) * 1998-01-23 2001-05-29 Canon Kabushiki Kaisha Substrate with zinc oxide layer, method for producing zinc oxide layer, photovoltaic device, and method for producing photovoltaic device
JP3850135B2 (ja) 1998-04-02 2006-11-29 住友金属鉱山株式会社 高温はんだ付用Ｚｎ合金
JP3945915B2 (ja) 1998-08-25 2007-07-18 住友金属鉱山株式会社 はんだ用Ｚｎ合金
CZ20012222A3 (cs) * 1998-12-18 2002-02-13 Glaverbel Zasklívací tabule a způsob její výroby
US6608328B2 (en) * 2001-02-05 2003-08-19 Uni Light Technology Inc. Semiconductor light emitting diode on a misoriented substrate
US8691371B2 (en) * 2002-09-11 2014-04-08 General Electric Company Barrier coating and method
ES2305718T3 (es) * 2003-02-14 2008-11-01 Agc Flat Glass Europe Sa Panel vidriado que lleva una superposicion de revestimientos.
KR20050028980A (ko) * 2003-09-19 2005-03-24 한국전자통신연구원 무기 박막 전계 발광 소자 및 그 제조 방법
JP4073876B2 (ja) * 2004-01-14 2008-04-09 三菱電機株式会社 半導体装置
FR2876606B1 (fr) * 2004-10-19 2009-11-06 Corus Aluminium Walzprod Gmbh Procede de production d'une feuille de brasage en alliage d'aluminium et d'ensembles legers et brases pour echangeur de chaleur.
JP4703492B2 (ja) * 2006-06-09 2011-06-15 パナソニック株式会社 鉛フリーはんだ材料
SG148056A1 (en) * 2007-05-17 2008-12-31 Micron Technology Inc Integrated circuit packages, methods of forming integrated circuit packages, and methods of assembling intgrated circuit packages
KR101527982B1 (ko) * 2007-06-20 2015-06-10 알레리스 알루미늄 코블렌쯔 게엠베하 알루미늄합금 브레이징 시트 제품 및 그 제조방법
US7820309B2 (en) * 2007-09-14 2010-10-26 Cardinal Cg Company Low-maintenance coatings, and methods for producing low-maintenance coatings

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101185991A (zh) * 2006-11-21 2008-05-28 株式会社日立制作所 接合材料、接合材料的制造方法及半导体装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JP特开2007-326137A 2007.12.20

Also Published As

Publication number Publication date
US20120098134A1 (en) 2012-04-26
KR101361252B1 (ko) 2014-02-11
KR20120027500A (ko) 2012-03-21
WO2011030517A1 (ja) 2011-03-17
DE112010003600T5 (de) 2012-08-23
CN102473650A (zh) 2012-05-23
US8525330B2 (en) 2013-09-03

Similar Documents

Publication Publication Date Title
CN102437130B (zh) 半导体装置及其制造方法
US6563225B2 (en) Product using Zn-Al alloy solder
US10510640B2 (en) Semiconductor device and method for manufacturing semiconductor device
US7579677B2 (en) Semiconductor device and method for manufacturing thereof
US20080224282A1 (en) Semiconductor device and method of manufacturing the same
US20070069368A1 (en) Integrated circuit device incorporating metallurigacal bond to enhance thermal conduction to a heat sink
US20060151889A1 (en) Semiconductor apparatus and manufacturing method
US8110437B2 (en) Method for attaching a semiconductor chip in a plastic encapsulant, optoelectronic semiconductor component and method for the production thereof
JP5578326B2 (ja) リード部品及びその製造方法、並びに半導体パッケージ
US20240047439A1 (en) Batch Soldering of Different Elements in Power Module
CN102473650B (zh) 接合材料、半导体装置及其制造方法
JP5152125B2 (ja) 接続材料、接続材料の製造方法、および半導体装置
JP2010003878A (ja) 回路基板及びその製造方法
JP6598151B2 (ja) 半導体装置およびその製造方法
JP5723523B2 (ja) 接続材料、接続材料の製造方法、半導体装置、半導体装置の製造方法、パワーモジュール
JP5738523B2 (ja) 接続材料、接続方法及び半導体装置の製造方法
JP6078577B2 (ja) 接続材料、接続方法、半導体装置及び半導体装置の製造方法
WO2024029258A1 (ja) 半導体モジュールおよび半導体モジュールの製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant