CN102467987A - 封装用导线及其制造方法 - Google Patents

封装用导线及其制造方法 Download PDF

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CN102467987A
CN102467987A CN2010105548300A CN201010554830A CN102467987A CN 102467987 A CN102467987 A CN 102467987A CN 2010105548300 A CN2010105548300 A CN 2010105548300A CN 201010554830 A CN201010554830 A CN 201010554830A CN 102467987 A CN102467987 A CN 102467987A
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杨成诫
汪建民
林振川
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YUCHENG MATERIAL TECHNOLOGY Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554—Coating
    • H01L2224/45565—Single coating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Materials For Medical Uses (AREA)

Abstract

本发明涉及一种封装用导线，其包含有一芯线，由银、银-金合金、银-铜合金、银-钯合金、铜、铝或其合金所制成；一镀层，被覆于所述芯线表面，所述镀层由金、银、钯、铂、钌、镍或其合金所制成。导线的制造方法是将一芯线通过一反应室，在所述反应室中产生电浆以清洁所述芯线表面；再在所述芯线表面被覆一镀层。由于电浆可快速且完全地将芯线表面清洗干净并加以活化，故镀层可稳固地被覆于芯线表面而不易脱落。

Description

封装用导线及其制造方法
技术领域
本发明涉及封装用的导线，特别是指一种封装用导线及其制造方法，其可快速且完全地将芯线表面清洗干净，并可使镀层稳固地被覆于芯线外。
背景技术
习知封装用导线以纯金线为主，金线在封装应用上具有良好的电性及稳定的作业性，然而近来因金线成本价格大涨，致使业界开始寻求替代金线的材料。在电性上具有良好特性的铜及银为目前业界尝试用来取代金的主要替代品，但纯铜及纯银线易受温度及湿度影响，致使在保存及封装作业上不如金线稳定，造成封装合格率降低，因此便产生有表面用镀层被覆的复合导线，镀层可对导线形成有效保护，使复合导线达到与金线相当的特性功能。
现有的封装用导线的制造方法是先取一芯线，通过脱脂处理(degrease)来去除芯线表面的油污，并用水冲洗后，再用酸性药水进行活化处理(acid active)，及二次水洗，接着再在芯线表面用电镀方式形成一镀层。但是，形成镀层前所进行的脱脂与活化处理，不仅费事，且常因药水效性变异，不能完全将芯线表面清洁干净，影响镀层的附着性，造成镀层可能意外脱落，并导致封装导线功能失效。
发明内容
针对上述问题，本发明的主要目的在于提供一种封装用导线及其制造方法，其可快速且完全地将芯线表面清洗干净，并可使镀层稳固地被覆于芯线外。
为达到上述目的，本发明所提供的一种封装用导线，其特征在于包含有：一芯线，由银、银-金合金、银-铜合金、银-钯合金、铜、铝或其合金所制成；一镀层，被覆于所述芯线表面，所述镀层由金、银、钯、铂、钌、镍或其合金所制成。
上述技术方案中，所述银-金合金中金的含量为10ppm～40wt％。
所述银-铜合金中铜的含量为10ppm～10wt％。
所述银-钯合金中钯的含量为10ppm～35wt％。
本发明所提供的一种封装用导线的制造方法包含有以下步骤：(a)将一芯线通过一反应室，在所述反应室中产生电浆以清洁所述芯线表面；(b)在所述芯线表面被覆一镀层。
在步骤(a)中，所述电浆为采用氮气、氩气、氢气或其混合气体所生成。
在步骤(a)中，是将氮气与最多3％氢气的混合气体以10升/分钟通入反应室中，以生成所述电浆。
在步骤(b)中，所述镀层是以电镀、溅镀、蒸镀、化学蒸汽沉积或其复合方式被覆于所述芯线表面。
采用上述技术方案，由于电浆可快速且完全地将芯线表面清洗干净并加以活化，故镀层可稳固地被覆于芯线表面而不易脱落。
附图说明
图1是本发明一较佳实施例的产品立体图；
图2是本发明一较佳实施例的制造方法示意图。
具体实施方式
现举以下实施例并结合附图对本发明的结构及功效进行详细说明。
如图1所示，为本发明一较佳实施例所提供的制造方法所制成的封装用导线10，导线10具有一芯线12以及一镀层14，芯线12的直径为0.0100mm～0.0508mm，镀层14的厚度则为5nm～0.001mm，芯线12由银、铜、铝或其合金所制成，或者芯线12可由银-金合金所制成，其中金的含量为10ppm～40wt％；芯线12还可由银-铜合金所制成，其中铜的含量为10ppm～10wt％；另外，芯线12也可由银-钯合金所制成，其中钯的含量为10ppm～35wt％。镀层14则可由金、银、钯、铂、钌、镍或其合金所制成。
如图2所示，封装用导线10的制造方法是先将芯线12通过一反应室20，将氮气与3％以下氢气的混合气体以每分钟10升的流量通入反应室20中，利用一电源施加电压以生成电浆，该电浆即可轰击芯线12表面以进行清洁、活化处理，完成表面清洁处理后的芯线12可直接用溅镀或电镀方式在芯线12表面被覆一镀层14，即完成封装用导线10的制造程序。
由于本发明所提供的制造方法为利用电浆清洗芯线12，不仅快速，清洁更为确实。芯线12采用卷对卷(Roll to Roll)方式进出反应室20，放线速度(wire speed)每分钟可达三百米以上，芯线12在反应室20中仅需几亳秒时间即可完全将芯线12表面的杂质如碳、氧或有机物质去除殆尽，非常适合封装用导线10的生产。芯线12进行镀层14被覆作业后所形成的导线10，其镀层14与芯线12的结合性极佳，即使针对导线10进行后续加工如拉伸处理，镀层14冶不易意外脱落。
需特别说明的是，形成电浆的气体可依需要采用氮气、氩气、氢气或其混合气体，而于芯线表面被覆镀层的方法也可采用电镀、溅镀、蒸镀、化学蒸汽沉积或其复合方式，其它等效步骤的替代或变化，均应被涵盖在本发明的专利保护范围内。

Claims (8)

1.一种封装用导线的制造方法，其特征在于包含有以下步骤：
(a)将一芯线通过一反应室，在所述反应室中产生电浆以清洁所述芯线表面；
(b)在所述芯线表面被覆一镀层。
2.如权利要求1所述封装用导线的制造方法，其特征在于：在步骤(a)中，所述电浆为采用氮气、氩气、氢气或其混合气体所生成。
3.如权利要求1所述封装用导线的制造方法，其特征在于：在步骤(a)中，是将氮气与最多3％氢气的混合气体以10升/分钟通入反应室中，以生成所述电浆。
4.如权利要求1所述封装用导线的制造方法，其特征在于：在步骤(b)中，所述镀层是以电镀、溅镀、蒸镀、化学蒸汽沉积或其复合方式被覆于所述芯线表面。
5.一种封装用导线，其特征在于包含有：
一芯线，由银、银-金合金、银-铜合金、银-钯合金、铜、铝或其合金所制成；
一镀层，被覆于所述芯线表面，所述镀层由金、银、钯、铂、钌、镍或其合金所制成。
6.如权利要求5所述的封装用导线，其特征在于：所述银-金合金中金的含量为10ppm～40wt％。
7.如权利要求5所述的封装用导线，其特征在于：所述银-铜合金中铜的含量为10ppm～10wt％。
8.如权利要求5所述的封装用导线，其特征在于：所述银-钯合金中钯的含量为10ppm～35wt％。
CN2010105548300A 2010-11-19 2010-11-19 封装用导线及其制造方法 Pending CN102467987A (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105970166A (zh) * 2016-05-20 2016-09-28 广东蒙泰纺织纤维有限公司 一种丙纶纤维导线的制造方法
CN107946271A (zh) * 2017-11-14 2018-04-20 汕头市骏码凯撒有限公司 一种半导体封装用银合金线及其制造方法
CN107978577A (zh) * 2017-11-22 2018-05-01 汕头市骏码凯撒有限公司 一种低阻抗、高可靠性的复合钯钌铜线及其制造方法
CN110277188A (zh) * 2019-07-09 2019-09-24 贵研铂业股份有限公司 一种低密度超细的银包铝复合软导线及其制备方法

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JP2000106384A (ja) * 1998-09-29 2000-04-11 Sumitomo Metal Mining Co Ltd ボンディングワイヤーの製造方法
US6261436B1 (en) * 1999-11-05 2001-07-17 Asep Tec Co., Ltd. Fabrication method for gold bonding wire
KR20020015809A (ko) * 2000-08-23 2002-03-02 권문구 알루미늄 전선의 표면 세정장치
CN101252033A (zh) * 2008-04-03 2008-08-27 江苏冰城电材有限公司 耐电晕聚酰亚胺薄膜制作绕组线的生产方法
CN101689517A (zh) * 2007-07-24 2010-03-31 新日铁高新材料株式会社 半导体装置用接合线和线接合方法

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Publication number Priority date Publication date Assignee Title
JP2000106384A (ja) * 1998-09-29 2000-04-11 Sumitomo Metal Mining Co Ltd ボンディングワイヤーの製造方法
US6261436B1 (en) * 1999-11-05 2001-07-17 Asep Tec Co., Ltd. Fabrication method for gold bonding wire
KR20020015809A (ko) * 2000-08-23 2002-03-02 권문구 알루미늄 전선의 표면 세정장치
CN101689517A (zh) * 2007-07-24 2010-03-31 新日铁高新材料株式会社 半导体装置用接合线和线接合方法
CN101252033A (zh) * 2008-04-03 2008-08-27 江苏冰城电材有限公司 耐电晕聚酰亚胺薄膜制作绕组线的生产方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105970166A (zh) * 2016-05-20 2016-09-28 广东蒙泰纺织纤维有限公司 一种丙纶纤维导线的制造方法
CN107946271A (zh) * 2017-11-14 2018-04-20 汕头市骏码凯撒有限公司 一种半导体封装用银合金线及其制造方法
CN107946271B (zh) * 2017-11-14 2020-01-21 汕头市骏码凯撒有限公司 一种半导体封装用银合金线及其制造方法
CN107978577A (zh) * 2017-11-22 2018-05-01 汕头市骏码凯撒有限公司 一种低阻抗、高可靠性的复合钯钌铜线及其制造方法
CN110277188A (zh) * 2019-07-09 2019-09-24 贵研铂业股份有限公司 一种低密度超细的银包铝复合软导线及其制备方法

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Application publication date: 20120523