CN102412300A - 碳化硅半导体器件 - Google Patents

碳化硅半导体器件 Download PDF

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CN102412300A
CN102412300A CN2011102835030A CN201110283503A CN102412300A CN 102412300 A CN102412300 A CN 102412300A CN 2011102835030 A CN2011102835030 A CN 2011102835030A CN 201110283503 A CN201110283503 A CN 201110283503A CN 102412300 A CN102412300 A CN 102412300A
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A·施普利
P·莫比
J·科文顿
M·詹宁斯
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GE Aviation Systems Ltd
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Abstract

本发明名称为“碳化硅半导体器件”。一种制造半导体器件的方法，包括：将包含硅的第一层(16)施加到包含碳化硅的第二层(15)，由此定义了在第一层和第二层之间的界面，并氧化第一层(16)的一些或全部。

Description

碳化硅半导体器件
技术领域
本发明涉及通过碳化硅制造的半导体器件以及制造这些器件的方法。本发明的一个具体应用在使用碳化硅制造MOSFET(金属氧化物半导体场效应晶体管)中。本发明也涉及利用这样的MOSFET的航空器配电系统。
背景技术
在MOSFET的制造中使用碳化硅(SiC)，提供了超过传统的硅衬底的大量的益处。例如，SiC有非常高的强度，不会在任何已知的压力下融化并且在化学上是高度稳定的。进一步地，SiC允许生产的器件拥有比硅器件低的导通状态电阻。因而SiC指引自己用在高功率的MOSFET中。
与使用SiC制造MOSFET相关联的一个问题是还不太可能以足够高的质量制造MOSFET的沟道区，以生产对实际使用充分可靠的可行的器件。在MOSFET中，沟道区位于MOSFET的栅极处的氧化层下方，并且当MOSFET接通的时候，沟道区允许电流通过器件。生产SiC MOSFET的在先尝试经受了界面处的碳吸除(getter)的问题，由此碳杂质在界面处形成，不利地影响了器件的电性能。
US5,744,826公开了用于生产碳化硅半导体器件(例如，MOSFET)的过程，其中，通过热氧化SiC层，栅极绝缘膜在SiC半导体层的表面上形成。
发明内容
为了在沟道区提供所需的电性质，在氧化物和在氧化物之下的SiC之间定义良好质量的界面是重要的。本发明提供了制造半导体器件的方法，包括：将包含硅的第一层施加到包含碳化硅的第二层，由此在第一层和第二层之间定义了界面，并氧化第一层的一些或全部。
通过将包含硅的第一层施加到包含SiC的第二层，可独立确保第一层和第二层的各表面的质量，因此导致每个表面的高质量，特别是层之间的界面。进一步地，由于这个进程没有氧化任何SiC，因此也克服了在界面处与碳吸除相关联的问题。因而，通过本发明提供的界面是高质量的。自然地，制备SiC层是需要高度谨慎的，因为需要高水平的洁净度和平整度。
晶片结合(wafer bond)可用来使第一层和第二层附连到彼此。在晶片结合中，单晶硅的薄层从载体晶片转移到另一个目标晶片的表面(这种情况下是SiC层)上。转移层具有高质量，所以可被氧化以形成相应地高质量的氧化物。
进一步地，本发明提供了根据上述方法制造的半导体器件，包括接合到包含碳化硅的第二层的、包含SiO2的第一层，由此定义了第一层和第二层之间的界面。此外，本发明提供包含这样的半导体器件的航空器配电系统。
附图说明
以下是参照附图仅以示例方式对本发明实施例的详细描述，在附图中：图1是场效应晶体管(例如，MOSFET)的简化示意图；图2是示出碳吸除问题的截面图；图3示出根据本发明实施例的层的布置；
图4A、4B、4C和4D示出根据本发明实施例的过程的阶段；以及
图5示出根据本发明实施例的过程的进一步的阶段。
具体实施方式
图1示出了现有技术场效应晶体管1(例如，MOSFET)的基本结构，其包括各包含导电触点的源极2、漏极4和栅极3。诸如氧化物(例如，二氧化硅)的电绝缘体的层9提供在源极2、漏极4、栅极3和衬底5之间。邻近层9，当通过施加电势到栅极3接通MOSFET时，导电沟道10在衬底5中形成，允许电流在源极2和漏极4之间流动。在n沟道MOSFET中，衬底5包括p型材料，而源极2包括n型材料的第一区7，同时漏极4包括n型材料的第二区8。为了接通n沟道MOSFET，施加正电位到栅极3，由此朝向非导电层9吸引负载流子，而且如果施加的电势超过用于接通器件的阈值，会形成本质上n型材料的沟道10。由此在源极2和漏极4之间提供n型材料的连续传导通路，允许电流在之间流动。一旦移除栅极3处的电势，在衬底5内的电荷载流子分布就回复到它的正常状态，因而移除了导电沟道10并关闭器件。本发明也适用于p沟道MOSFET，其中以与刚才所述相反的配置来布置p型材料和n型材料。一般地说，本发明适用于任何类型的MOSFET，或者适用于需要半导体层和绝缘层之间的界面的其它半导体器件。
图2是示出与直接氧化SiC有关的问题的截面图。取决于反应条件，SiC的氧化一般会在正在氧化的SiC层11顶部上产生SiO2层12。其他非化学计量的硅氧化物可出现在SiO2层12中。碳簇(carboncluster)13在介于SiC层11和SiO2层12之间的界面处形成，对布置的电性质有害。
图3是实施本发明的半导体器件的一部分的截面图，包括部署在SiC的第二层15上的、SiO2的第一层16。在界面17处没有出现碳簇，因为器件是根据本发明的方法制造的。
图4A、4B、4C和4D是示出实施本发明方法的阶段的截面图。如图4A中所示，起点为SiC层15。在图4B中，Si的层18晶片结合到SiC的层15上。在图4C中，氧化了晶片结合的Si的层18。氧气从Si层18的外表面20向里与它进行反应，其中形成至少部分氧化的Si的层18。可控制层18的氧化程度，例如通过在已知的氧化速率下执行氧化预定的时间。备选地或额外地，氧化可在足以氧化硅但不足以氧化碳化硅的温度处执行。这确保了SiC层15的氧化不会发生。氧化可持续直到全部氧化Si层。备选地，通过在Si层完全氧化之前终止氧化，可在碳化硅和Si的氧化的层之间剩下未氧化的Si的层。这提供了确保在过程期间不氧化SiC的层的另一个途径。图4D示出了在氧化过程完成后层的布置，其中在SiC的层15上提供SiO2的层16。
如图5中所示，随着氧化进程的完成，在区域26、27中蚀刻掉SiO2层16以暴露在SiC层15中的重掺杂n型SiC的第一区域和第二区域23、25和掺杂p型SiC的第一区域和第二区域22、24。为简单起见，区域22到25都未在图4A到4D中示出。SiC层15的其余部分包含适当掺杂n型SiC，以及具体地，可由单晶SiC组成。在区域26和27中提供源极触点(未示出)，同时在器件背面上提供漏极触点23。在SiC层15和漏极触点23之间提供了重掺杂n型SiC的层22。在SiO2的层16上提供了栅极极21。触点可由任何良好的电导体(例如，镍)制成。
实施本发明的SiC MOSFET特别适合用于航空器配电系统中。近些年航空器线路安全问题已受到广泛的关注。“座舱冒烟”和电弧事件都跟这相关，以及做出努力来提高这样系统的安全。航空器电力系统暴露在大范围的干扰下，这可引起这样的事件。这些包括电流和电压瞬态和短路条件，例如，由设备故障和雷击引起。机电断路器传统上已用于保护这样的故障；然而，很多故障都低于设计来保护电力系统的时间保护曲线阈值。
SSPC(固态功率控制器)可代替机电控制器和提供改进的性能，包含极快速响应，在安全极限内限制故障电流以及长的多操作使用期限。它们更进一步允许灵活的结构和控制方案，让限流和终端的功能都完全可控。SSPC也是低成本和要求最少维护的。
一般地，MOSFET具有非常低的导通状态电阻，允许低压降并因此在操作期间的功率耗散(做为热)小。然而，为了能经受短路或者指定时间的故障电流，可能不得不并行放置多个MOSFET以使得器件能够经受相关联的能量损失。在动作中有两个基本约束：(1)稳态冷却需求，即，通过正常操作定义尺寸，质量和传热，以及(2)并行器件数量由故障条件定义；在这种情况下，高功率耗散水平起作用的时间将不会长到足以加热器件(即，机箱(case))的外部触点，由于从半导体器件本身到机箱的热扩散和起作用的短时间。换句话说，如果系统中提供不足的SSPC，故障条件期间可发生过热。减少并行的MOSFET数量并因而在尺寸和质量上给出提高，在正常操作中是可接受的；然而，这可能不允许安全地包含故障条件。
由本发明提供的用SiC制造的MOSFET器件因为它们比相应的硅器件有小得多的导通状态电阻，由此为这个问题提供了解决方案。从而可提供提高了的故障电流的敏感性，而且减少I2R加热。碳化硅也是一个好得多的热导体并比Si拥有更高的熔点/升华温度，因此能更热地运行从而降低强散热槽的布置的需求。同时，碳化硅的材料优势允许取得高得多的功率密度。

Claims (12)

1.一种制造半导体器件的方法，包括：将包含硅的第一层施加到包含碳化硅的第二层，由此在所述第一层和所述第二层之间定义了界面，以及氧化所述第一层的一些或全部。
2.根据权利要求1所述的方法，其中，所述第一层晶片结合到所述第二层。
3.根据权利要求1或2所述的方法，其中，所述第二层由单晶的SiC组成。
4.根据上述权利要求的任一项所述的方法，其中，所述第一层由单晶的Si组成。
5.根据权利要求1到4的任一项所述的方法，其中，氧化所述第一层的一些或全部的所述步骤在将所述第一层施加到所述第二层之后执行。
6.根据权利要求1到4的任一项所述的方法，其中，氧化所述第一层的一些或全部的所述步骤在将所述第一层施加到所述第二层之前或者同时执行。
7.一种根据权利要求1到6的任一项所述的方法制造的半导体器件，包括接合到包含碳化硅的第二层的、包含SiO2的第一层，由此在所述第一层和所述第二层之间定义了界面。
8.根据权利要求7所述的半导体器件，其包括MOSFET。
9.一种包含根据权利要求7或8所述的半导体器件的航空器配电系统。
10.一种制造半导体器件的方法，大体上如参照附图在本文中描述的那样。
11.一种半导体器件，大体上如参照附图在本文中描述的那样。
12.一种航空器配电系统，大体上如参照附图在本文中描述的那样。
CN2011102835030A 2010-09-17 2011-09-15 碳化硅半导体器件 Pending CN102412300A (zh)

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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
JP7253730B2 (ja) * 2018-12-26 2023-04-07 株式会社日進製作所 半導体装置の製造方法及び半導体装置
JP7455833B2 (ja) * 2019-07-08 2024-03-26 株式会社Fuji 回路パターン作成システム、および回路パターン作成方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272107A (en) * 1983-09-24 1993-12-21 Sharp Kabushiki Kaisha Manufacture of silicon carbide (SiC) metal oxide semiconductor (MOS) device
US20090090919A1 (en) * 2007-10-03 2009-04-09 Oki Electric Industry Co., Ltd. Semiconductor device and method of producing the same
US20090170264A1 (en) * 2007-11-13 2009-07-02 Oki Semiconductor Co., Ltd. Method of producing semiconductor device

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6066866A (ja) * 1983-09-24 1985-04-17 Sharp Corp 炭化珪素ｍｏｓ構造の製造方法
JP2560765B2 (ja) * 1988-01-20 1996-12-04 富士通株式会社 大面積半導体基板の製造方法
US5459107A (en) * 1992-06-05 1995-10-17 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
IT1268123B1 (it) * 1994-10-13 1997-02-20 Sgs Thomson Microelectronics Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione.
US6171931B1 (en) * 1994-12-15 2001-01-09 Sgs-Thomson Microelectronics S.R.L. Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication
JP3471509B2 (ja) 1996-01-23 2003-12-02 株式会社デンソー 炭化珪素半導体装置
SE9700215L (sv) * 1997-01-27 1998-02-18 Abb Research Ltd Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken
FR2801723B1 (fr) * 1999-11-25 2003-09-05 Commissariat Energie Atomique Couche de silicium tres sensible a l'oxygene et procede d'obtention de cette couche
JP4325095B2 (ja) * 2000-09-08 2009-09-02 株式会社デンソー ＳｉＣ素子の製造方法
US6689669B2 (en) * 2001-11-03 2004-02-10 Kulite Semiconductor Products, Inc. High temperature sensors utilizing doping controlled, dielectrically isolated beta silicon carbide (SiC) sensing elements on a specifically selected high temperature force collecting membrane
US6593209B2 (en) * 2001-11-15 2003-07-15 Kulite Semiconductor Products, Inc. Closing of micropipes in silicon carbide (SiC) using oxidized polysilicon techniques
JP4100070B2 (ja) * 2002-07-05 2008-06-11 トヨタ自動車株式会社 半導体装置の製造方法
US7122488B2 (en) * 2004-03-15 2006-10-17 Sharp Laboratories Of America, Inc. High density plasma process for the formation of silicon dioxide on silicon carbide substrates
US20040245571A1 (en) * 2003-02-13 2004-12-09 Zhiyuan Cheng Semiconductor-on-insulator article and method of making same
ATE504082T1 (de) * 2003-05-27 2011-04-15 Soitec Silicon On Insulator Verfahren zur herstellung einer heteroepitaktischen mikrostruktur
US7560361B2 (en) * 2004-08-12 2009-07-14 International Business Machines Corporation Method of forming gate stack for semiconductor electronic device
ATE498243T1 (de) * 2005-02-16 2011-02-15 Leach Int Corp Leistungsverteilungssystem unter verwendung von festkörperleistungsreglern
US7749863B1 (en) * 2005-05-12 2010-07-06 Hrl Laboratories, Llc Thermal management substrates
FR2888398B1 (fr) * 2005-07-05 2007-12-21 Commissariat Energie Atomique Couche de silicium tres sensible a l'oxygene et procede d'obtention de cette couche
US7977821B2 (en) * 2007-05-10 2011-07-12 Honeywell International Inc. High power density switch module with improved thermal management and packaging
JP4844609B2 (ja) * 2008-09-25 2011-12-28 富士電機株式会社 炭化けい素半導体基板の酸化膜形成方法
JP2010251724A (ja) * 2009-03-26 2010-11-04 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法
US9018077B2 (en) * 2009-04-30 2015-04-28 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On Behalf Of Arizona State University Methods for wafer bonding, and for nucleating bonding nanophases
US8193848B2 (en) * 2009-06-02 2012-06-05 Cree, Inc. Power switching devices having controllable surge current capabilities

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272107A (en) * 1983-09-24 1993-12-21 Sharp Kabushiki Kaisha Manufacture of silicon carbide (SiC) metal oxide semiconductor (MOS) device
US20090090919A1 (en) * 2007-10-03 2009-04-09 Oki Electric Industry Co., Ltd. Semiconductor device and method of producing the same
US20090170264A1 (en) * 2007-11-13 2009-07-02 Oki Semiconductor Co., Ltd. Method of producing semiconductor device

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CA2751927A1 (en) 2012-03-17
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