CN102339815A - Test structure for analyzing through-hole type metal-interconnected electromigration reliability - Google Patents
Test structure for analyzing through-hole type metal-interconnected electromigration reliability Download PDFInfo
- Publication number
- CN102339815A CN102339815A CN2010102331994A CN201010233199A CN102339815A CN 102339815 A CN102339815 A CN 102339815A CN 2010102331994 A CN2010102331994 A CN 2010102331994A CN 201010233199 A CN201010233199 A CN 201010233199A CN 102339815 A CN102339815 A CN 102339815A
- Authority
- CN
- China
- Prior art keywords
- metal
- test structure
- layer
- throuth hole
- insulating medium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The invention provides a test structure for analyzing through-hole type metal-interconnected electromigration reliability. The test structure comprises at least two layers of metal wires; an insulating dielectric layer is respectively filled between adjacent metal wires of each layer; adjacent layers of metal wires are separated by insulating dielectric layers, and the conduction of the adjacent layers of metal wires is realized through metal through holes; and at least one layer of insulating dielectric layers covers on the top layer of metal wires. The test structure for analyzing the through-hole type metal-interconnected electromigration reliability is characterized in that: the insulating dielectric layers covering on the top layer of metal wires contain metal markers which are used for indicating the positions of the metal through holes. With the adoption of the test structure provided by the invention, the positions of metal through holes can be known through observing from any layer by using an SEM (Scanning Electron Microscope) without grinding to strip layers, and the metal through holes can be conveniently and fast positioned when an FIB (Focus Ion Beam) is used for cutting, so that the efficiency is increased and the time for using machine platforms is saved.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field, particularly a kind of test structure that is used to analyze the metal interconnected electromigration reliability of through hole type.
Background technology
Reliability testing has two main effects: 1. assess the actual working life of device; 2. for technology provides the device degradation failure mechanism, thereby optimize technology.It is after chip manufacturing process is accomplished or in the process dependability parameter is tested that compare with traditional reliability testing, this test is equivalent to a kind of on-line testing chip-scale reliability (WLR, Wafer Level Reliability).WLR can put into different categories to the different reliability problem particularly and monitor, and therefore the test data of reliability aspect can in time be provided for technology.
Generally speaking, WLR test comprises following a few part: 1. device reliability test: comprise that removable ion, hot carrier, technology brings out damage etc.; 2. interlinking reliability test: comprise contact hole, through hole, metal line ELECTROMIGRATION PHENOMENON etc.; 3. dielectric reliability testing: comprise gate oxide integrity, spacer medium electric leakage etc.
(EM is because momentum of electron shifts directed the moving of metallic atom to be caused Electromigration), and its consequence is to produce cavity and hillock in electromigration.The cavity is the place of the ion-flow rate of outflow greater than the inflow ion-flow rate, and hillock is to flow out ion-flow rate less than the place that flows into ion-flow rate.The long-term accumulation of cavity and hillock finally will cause metal interconnect structure to lose efficacy.The end view of test structure of reliability that is used to test through hole type metal interconnect structure in the prior art is as shown in Figure 1, and the vertical view of this test structure is as shown in Figure 2.101 and 102 is the upper strata metal wire, does not connect between 101 and 102.105 is the lower metal line, separates (not showing insulating medium layer among Fig. 1 and Fig. 2) by insulating medium layer between upper strata metal wire and the lower metal line.Realize conducting by metal throuth hole 103 between upper strata metal wire 101 and the lower metal line 105, realize conducting through metal throuth hole 104 between upper strata metal wire 102 and the lower metal line 105.Upper strata metal wire 101 connects electric negative pole, and it is anodal that upper strata metal wire 102 connects electricity, and the electronics flow direction in the lower metal line 105 is shown in arrow.Because the cavity is caused by ion flow flux difference with hillock, therefore cavity and hillock generally all appear near the contact-making surface of metal throuth hole and metal wire.
Usually the metal interconnected electromigration reliability analytical method of through hole type that adopts in the prior art is: the image that obtains the test structure surface through scanning electron microscopy (SEM); Under the guidance of this image; Through FIB (FIB; Focus Ion Beam) test structure two ends through hole and upper strata metal wire and lower metal line are cut cross section; Observe through SEM again and the profile of research cross section, the size of through hole and metal wire and contact-making surface thereof, and measure the parameters such as position, shape, size of cavity and hillock.
In current large-scale semiconductive chip manufacture, need use the metal film layer more than six layers, structure metal throuth hole line is realized interconnecting between these metal film layers.Insulating material is deposited on and forms electric insulation layer between the metal film layer so that sufficient insulation blocking to be provided.And on the electric insulation layer of the superiors deposit silicon nitride as the passivation protection layer.In SEM, can only observe insulating medium layer, and be difficult to, often need guess that the Position Approximate of estimating metal throuth hole carries out blind cutting up to the definite position of metal throuth hole, if the position not to cutting once more.Understand the service time and the cost of significant wastage board like this, efficient is very low.
Also has another kind of metal throuth hole inefficacy property analytical method in the prior art: at first, remove the insulating medium layer on the metal wire of upper strata, make upper strata metal wire exposing surface, just can see the structure of test structure like this at SEM through the mode of grinding.But so just destroyed the integrality of test structure, be unfavorable for each level of multianalysis chip.
Summary of the invention
The invention provides a kind of test structure that is used to analyze the metal interconnected electromigration reliability of through hole type, can know the position of knowing metal throuth hole intuitively, thereby carry out fail-safe analysis fast.
A kind of test structure that is used to analyze the metal interconnected electromigration reliability of through hole type that the embodiment of the invention proposes; Said test structure comprises double layer of metal line at least; Fill insulating medium layer between the adjacent metal line in each layer; Separate by insulating medium layer between the metal wire of adjacent layer, and the metal wire of adjacent layer realizes conducting by metal throuth hole, cover one deck insulating medium layer at least on the top wire; It is characterized in that, contain the metal marker that is used to indicate the metal throuth hole position in the insulating medium layer that covers on the said top wire.
Preferably, the position that has a metal throuth hole of 2 metal marker indications at least.
Preferably, be used to indicate between a plurality of metal marker length directions of same metal throuth hole position have angle, the intersection point of the extended line of the length direction of said a plurality of metal markers is the metal throuth hole position.
Preferably, the number of the metal marker of the position of a metal throuth hole of indication is 2, and the length direction of these 2 metal markers is vertical each other.
Preferably, the length range of said metal marker is 0.2 micron to 1 micron, and width range is 0.2 micron to 0.5 micron.
Preferably, the metal marker vertical alignment that contains in each layer insulating medium layer that covers on the top wire.
Can find out from above technical scheme; All increased the metal marker that is used to indicate the metal throuth hole position in the insulating medium layer that on the top wire of test structure, covers; Make which layer to observe the position that all can know metal throuth hole with SEM no matter at, also needn't grind the stripping layer, FIB can locate during cutting quickly and easily; Raise the efficiency, save the service time of board.
Description of drawings
Fig. 1 is the end view of test structure of the prior art;
Fig. 2 is the vertical view of test structure of the prior art;
Fig. 3 is the vertical view of the test structure of embodiment of the invention proposition;
Fig. 4 is a sketch map of in SEM, observing the test structure upper surface gained image of embodiment of the invention proposition;
Fig. 5 obtains profile for this test structure of the cutting of the directions X in Fig. 4;
Fig. 6 obtains profile for this test structure of the cutting of the Y direction in Fig. 4.
Embodiment
The embodiment of the invention proposes, and to be used to analyze the vertical view of test structure of the metal interconnected electromigration reliability of through hole type as shown in Figure 3.Said test structure comprises double layer of metal line at least; Fill insulating medium layer between the adjacent metal line in each layer; Separate by insulating medium layer between the metal wire of adjacent layer; And the metal wire of adjacent layer is realized conducting by metal throuth hole, covers one deck insulating medium layer at least on the top wire.Compare with the vertical view of existing test structure shown in Figure 2, its difference is to contain the metal marker that is used to indicate the metal throuth hole position in the insulating medium layer that on the top wire of test structure, covers.
The shape of each metal marker is rectangle (or being similar to other shapes of rectangle, round rectangle for example, the shape of perhaps similar stadium runway) preferably, and length range is 0.2 micron to 1 micron, and width range is 0.2 micron to 0.5 micron.The extended line of length direction is through metal throuth hole.Has metal throuth hole of two metal marker indications at least.Have certain included angle between these metal marker length directions, the intersection point of the extended line of the length direction of a plurality of like this metal markers is the metal throuth hole position.Preferably, metal throuth hole of two metal marker indications, the length direction of these two metal markers is vertical each other.
These metal markers can be regarded as a kind of area and the less particulate metal line of thickness, therefore can adopt these metal markers of metallized method construct, and promptly through etching groove on the dielectric, metal deposit, planarization process obtain.The construction process of metal marker need not to increase new technology, if in original metallization processes in the photomask pattern that the step of dielectric etching adopts, the corresponding pattern of metal marker is set gets final product.
The test structure upper surface gained image of in SEM, observing embodiment of the invention proposition is as shown in Figure 4, can only observe four metal markers 107,108,109 and 110.Fig. 5 obtains section for this test structure of the cutting of the directions X in Fig. 4, and horizontal dotted line marks the interface of adjacent insulating medium layer.Can find out that metal marker 107 is actual to be that a series of metal marks stacks of the vertical alignment of each insulating medium layer on metal wire 101 constitute.In like manner, metal marker 110 is actual is that a series of metal marks stacks of the vertical alignment of each insulating medium layer on metal wire 102 constitute.
Fig. 6 can find out for this test structure of the cutting of the Y direction in Fig. 4 obtains section, and metal marker 109 is actual to be that a series of metal marks stacks of the vertical alignment of each insulating medium layer on metal wire 102 constitute.
The above test structure comprises the structure of two types: a kind of lower floor that is structure two ends metal lead wire at main body electromigration metal wire; Realize conducting by metal throuth hole between lower metal line and the upper strata metal wire; Electron stream goes between from the upper strata and flows to the main body electromigration metal wire of lower floor; This structure is known as downward electron stream test structure (the English Down Stream of being, numeral abbreviates 212 as) structure.Another kind of test structure is the upper strata of structure two ends metal lead wire at main body electromigration metal wire; Realize conducting by metal throuth hole between lower metal line and the upper strata metal wire; Electron stream flows to the main body electromigration metal wire on upper strata from lower floor's lead-in wire; This structure is known as upwards electron stream test structure (the English Up Stream of being, numeral abbreviates 121 as) structure.
The above is merely preferred embodiment of the present invention, and is in order to restriction the present invention, not all within spirit of the present invention and principle, any modification of being made, is equal to replacement, improvement etc., all should be included within the scope that the present invention protects.
Claims (6)
1. test structure that is used to analyze the metal interconnected electromigration reliability of through hole type; Said test structure comprises double layer of metal line at least; Fill insulating medium layer between the adjacent metal line in each layer; Separate by insulating medium layer between the metal wire of adjacent layer, and the metal wire of adjacent layer realizes conducting by metal throuth hole, cover one deck insulating medium layer at least on the top wire; It is characterized in that, contain the metal marker that is used to indicate the metal throuth hole position in the insulating medium layer that covers on the said top wire.
2. test structure according to claim 1 is characterized in that, has the position of 1 metal throuth hole of 2 metal marker indications at least.
3. test structure according to claim 2; It is characterized in that; Be used to indicate between a plurality of metal marker length directions of same metal throuth hole position have angle, the intersection point of the extended line of the length direction of said a plurality of metal markers is the metal throuth hole position.
4. test structure according to claim 2 is characterized in that, the number of the metal marker of the position of a metal throuth hole of indication is 2, and the length direction of these 2 metal markers is vertical each other.
5. test structure according to claim 1 is characterized in that, the length range of said metal marker is 0.2 micron to 1 micron, and width range is 0.2 micron to 0.5 micron.
6. test structure according to claim 1 is characterized in that, the metal marker vertical alignment that contains in the per 1 layer of insulating medium layer that covers on the top wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102331994A CN102339815A (en) | 2010-07-15 | 2010-07-15 | Test structure for analyzing through-hole type metal-interconnected electromigration reliability |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102331994A CN102339815A (en) | 2010-07-15 | 2010-07-15 | Test structure for analyzing through-hole type metal-interconnected electromigration reliability |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102339815A true CN102339815A (en) | 2012-02-01 |
Family
ID=45515452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102331994A Pending CN102339815A (en) | 2010-07-15 | 2010-07-15 | Test structure for analyzing through-hole type metal-interconnected electromigration reliability |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102339815A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102881608A (en) * | 2012-09-17 | 2013-01-16 | 上海华力微电子有限公司 | Method for detecting carrier mobility in ion well |
| CN103033740A (en) * | 2012-12-20 | 2013-04-10 | 工业和信息化部电子第五研究所 | Electro-migration early warning circuit of integrated circuit |
| CN103094255A (en) * | 2013-02-27 | 2013-05-08 | 上海华力微电子有限公司 | Interconnection electromigration test structure |
| CN104037107A (en) * | 2014-06-09 | 2014-09-10 | 上海华力微电子有限公司 | Failure analysis method for through hole chain structure |
| CN107369670A (en) * | 2017-08-31 | 2017-11-21 | 长江存储科技有限责任公司 | A kind of three-dimensional storage electro-migration testing structure and preparation method thereof |
| CN107978587A (en) * | 2017-11-30 | 2018-05-01 | 上海华力微电子有限公司 | A kind of metal connecting line constant temperature electromigration test structure |
| CN108010860A (en) * | 2017-11-23 | 2018-05-08 | 长江存储科技有限责任公司 | A kind of self-positioning electro-migration testing structure and transmission electron microscope sample preparation method prepared easy to transmission electron microscope sample |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10211569A1 (en) * | 2002-03-15 | 2003-10-09 | Infineon Technologies Ag | Electro-migration test structure e.g. for micro-electronics components, has conductive link formed between conductive structure and conductive auxiliary structure |
| US6734473B1 (en) * | 2000-01-27 | 2004-05-11 | Agilent Technologies, Inc. | Method of integrated circuit construction with port alignment and timing signal buffering within a common area |
| JP2008010736A (en) * | 2006-06-30 | 2008-01-17 | Fujitsu Ltd | Semiconductor device |
| CN201022075Y (en) * | 2006-12-28 | 2008-02-13 | 中芯国际集成电路制造(上海)有限公司 | Testing structure for electronic migration rate |
| CN101192595A (en) * | 2006-11-30 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Multi-speed interconnected reliability testing structure |
| US20090033351A1 (en) * | 2007-07-30 | 2009-02-05 | International Business Machines Corporation | Test structure for electromigration analysis and related method |
| CN101546751A (en) * | 2008-03-25 | 2009-09-30 | 中芯国际集成电路制造(上海)有限公司 | Electro-migration testing structure capable of improving service life |
-
2010
- 2010-07-15 CN CN2010102331994A patent/CN102339815A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6734473B1 (en) * | 2000-01-27 | 2004-05-11 | Agilent Technologies, Inc. | Method of integrated circuit construction with port alignment and timing signal buffering within a common area |
| DE10211569A1 (en) * | 2002-03-15 | 2003-10-09 | Infineon Technologies Ag | Electro-migration test structure e.g. for micro-electronics components, has conductive link formed between conductive structure and conductive auxiliary structure |
| JP2008010736A (en) * | 2006-06-30 | 2008-01-17 | Fujitsu Ltd | Semiconductor device |
| CN101192595A (en) * | 2006-11-30 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Multi-speed interconnected reliability testing structure |
| CN201022075Y (en) * | 2006-12-28 | 2008-02-13 | 中芯国际集成电路制造(上海)有限公司 | Testing structure for electronic migration rate |
| US20090033351A1 (en) * | 2007-07-30 | 2009-02-05 | International Business Machines Corporation | Test structure for electromigration analysis and related method |
| CN101546751A (en) * | 2008-03-25 | 2009-09-30 | 中芯国际集成电路制造(上海)有限公司 | Electro-migration testing structure capable of improving service life |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102881608B (en) * | 2012-09-17 | 2015-04-01 | 上海华力微电子有限公司 | Method for detecting carrier mobility in ion well |
| CN102881608A (en) * | 2012-09-17 | 2013-01-16 | 上海华力微电子有限公司 | Method for detecting carrier mobility in ion well |
| CN103033740B (en) * | 2012-12-20 | 2015-08-26 | 工业和信息化部电子第五研究所 | The electromigration early warning circuit of integrated circuit |
| WO2014094413A1 (en) * | 2012-12-20 | 2014-06-26 | 工业和信息化部电子第五研究所 | Electromigration early warning circuit of integrated circuit |
| CN103033740A (en) * | 2012-12-20 | 2013-04-10 | 工业和信息化部电子第五研究所 | Electro-migration early warning circuit of integrated circuit |
| US9329228B2 (en) | 2012-12-20 | 2016-05-03 | Fifth Electronics Research Institute Of Ministry Of Industry And Information Techonoly | Prognostic circuit of electromigration failure for integrated circuit |
| CN103094255A (en) * | 2013-02-27 | 2013-05-08 | 上海华力微电子有限公司 | Interconnection electromigration test structure |
| CN103094255B (en) * | 2013-02-27 | 2015-09-02 | 上海华力微电子有限公司 | Interconnect electromigratory test structure |
| CN104037107A (en) * | 2014-06-09 | 2014-09-10 | 上海华力微电子有限公司 | Failure analysis method for through hole chain structure |
| CN104037107B (en) * | 2014-06-09 | 2017-01-04 | 上海华力微电子有限公司 | The failure analysis method of via chain structure |
| CN107369670A (en) * | 2017-08-31 | 2017-11-21 | 长江存储科技有限责任公司 | A kind of three-dimensional storage electro-migration testing structure and preparation method thereof |
| CN107369670B (en) * | 2017-08-31 | 2019-11-26 | 长江存储科技有限责任公司 | A kind of three-dimensional storage electro-migration testing structure and preparation method thereof |
| CN108010860A (en) * | 2017-11-23 | 2018-05-08 | 长江存储科技有限责任公司 | A kind of self-positioning electro-migration testing structure and transmission electron microscope sample preparation method prepared easy to transmission electron microscope sample |
| CN108010860B (en) * | 2017-11-23 | 2020-03-13 | 长江存储科技有限责任公司 | Self-positioning electromigration test structure and transmission electron microscope sample preparation method |
| CN107978587A (en) * | 2017-11-30 | 2018-05-01 | 上海华力微电子有限公司 | A kind of metal connecting line constant temperature electromigration test structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102339815A (en) | Test structure for analyzing through-hole type metal-interconnected electromigration reliability | |
| CN100440502C (en) | Semiconductor device | |
| US8323990B2 (en) | Reliability test structure for multilevel interconnect | |
| US7317203B2 (en) | Method and monitor structure for detecting and locating IC wiring defects | |
| CN107845623B (en) | Improved system for electrical testing of through silicon vias and corresponding manufacturing process | |
| US8093074B2 (en) | Analysis method for semiconductor device | |
| CN104051392B (en) | Semiconductor wafer, semiconductor process and semiconductor package | |
| CN110246813A (en) | Chip architecture and packaging method | |
| CN112864131B (en) | Electromigration test structure and electromigration test method | |
| CN107452715A (en) | Semiconductor devices and method for the gate insulator of test transistor structure | |
| US9875964B2 (en) | Semiconductor device components and methods | |
| JP2002170784A (en) | Silicon carbide semiconductor device and manufacturing method thereof | |
| JP2010098111A (en) | Method for locating defective position between wires | |
| CN102456666B (en) | Digital coordinate axis and reliability test method of gate oxide film | |
| CN106646179B (en) | A kind of semiconductor array component testing method | |
| JP4300795B2 (en) | Semiconductor device and inspection method thereof | |
| JP5379527B2 (en) | Semiconductor device | |
| KR102463139B1 (en) | Kelvin resistance test structure and method of manufacturing structure including the same | |
| KR100787745B1 (en) | Pcm test pattern for menufacturing semiconductor device | |
| CN107991598A (en) | A kind of measuring method for three-dimensional storage raceway groove conduction | |
| DE10317748B4 (en) | Method of testing insulation trench etches in SOI disks by means of a test structure | |
| CN107993950A (en) | A kind of measuring method for 3 D memory array area common source | |
| KR100607766B1 (en) | Probe needle structure of probe card for testing semiconductor device and method for fabricating probe needle | |
| KR100676612B1 (en) | Pad of Semiconductor Device | |
| CN207009435U (en) | Wafer sort structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20121116 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20121116 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant after: Semiconductor Manufacturing International (Shanghai) Corporation Applicant after: Semiconductor Manufacturing International (Beijing) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant before: Semiconductor Manufacturing International (Shanghai) Corporation |
|
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120201 |