CN102315273A - 超结横向扩散金属氧化物半导体及其制造方法 - Google Patents

超结横向扩散金属氧化物半导体及其制造方法 Download PDF

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CN102315273A
CN102315273A CN201110298660A CN201110298660A CN102315273A CN 102315273 A CN102315273 A CN 102315273A CN 201110298660 A CN201110298660 A CN 201110298660A CN 201110298660 A CN201110298660 A CN 201110298660A CN 102315273 A CN102315273 A CN 102315273A
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唐树澍
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

本发明提供超结LDMOS及其制造工艺，无需采用特殊工艺制作超结LDMOS，尤其是超高压LDMOS，简化制作工艺。本发明提供的一种超结LDMOS器件，包括内部设置超结结构的扩散阱，该超结结构深度小于扩散阱深度；本发明提供的一种超结LDMOS制作工艺包括：提供半导体衬底；采用光刻及高温扩散工艺，在半导体衬底中形成扩散阱；在扩散阱上方形成STI；采用离子注入工艺，在扩散阱中形成超结结构，所述超结结构深度小于扩散阱深度；通过后续常规工艺，完成超结LDMOS制作。

Description

超结横向扩散金属氧化物半导体及其制造方法
技术领域
本发明涉及功率半导体领域，尤其涉及超结横向扩散金属氧化物半导体(LDMOS)及其制造方法
背景技术
LDMOS是一种常用的功率器件，击穿电压和导通电阻为衡量其性能的重要指标，业内通常希望获得高击穿电压及低导通电阻的LDMOS器件。高击穿电压与低导通电阻较为冲突，提高击穿电压通常导致导通电阻增加，降低导通电阻，通常也带来击穿电压降低。与MOS器件相比，LDMOS器件在漏与栅之间设置有扩散阱，能够大幅度提高击穿电压，但同时其导通电阻也较高，为降低导通电阻，业内提出超结LDMOS器件。
参照图1，为现有一种超结LDMOS结构示意图，图示超结LDMOS的漏极漂移区由扩散阱10和超结结构11构成，超结结构11是交替的P型区及N型区，当源漏之间添加电压时，电流从超结结构11流过，由于P型和N型区形状相同，电荷平衡，因此能够大幅度降低导通电阻。
随着击穿电压的提高，超结结构11深宽比相应上升；当超高压应用时，可能需要特殊工艺，如多次外延层堆叠才能制作出所需深宽比的超结结构11，不仅容易使得P型区和N型区之间不对称，且工艺过于复杂，制造成本增加。
发明内容
本发明提供超结LDMOS及其制造工艺，以避免现有技术中，尤其是在超高压应用中，超结LDMOS的超结结构可能不对称，且工艺过于复杂的问题。。
为达到上述发明目的，本发明提供了与传统CMOS工艺兼容，无需特殊工艺，可应用于超高压的超结LDMOS器件及制造工艺。
本发明提供的一种超结LDMOS器件，漏极漂移区包括扩散阱和超结结构，该扩散阱为P型或N型，超结结构在扩散阱上方，超结结构的深度小于扩散阱深度。
本发明提供的一种超结LDMOS器件，其击穿电压通常大于700V，超结结构的深宽比较佳的小于3，能够采用标准成熟CMOS工艺制造，无需采用成本高的特殊工艺，制造工艺简化，降低制造成本。
本发明提供了一种超结LDMOS器件制造方法，包括步骤：提供半导体衬底；使用光刻及高温扩散工艺，在半导体衬底中形成扩散阱；采用光刻及传统CMOS工艺，在漂移区上方制作浅槽隔离层(STI)；使用离子注入工艺，在STI下方形成超结结构，超结结构的深度小于扩散阱深度；然后通过后续常规工艺，完成超结LDMOS制作。
上述超结LDMOS可以是P型衬底，也可以是N型衬底。
附图说明
图1为现有一种超结LDMOS结构示意图；
图2为本发明实施例提供的一种超结LDMOS结构示意图；
图3～图6为本发明实施例提供的超结LDMOS各制作阶段的结构示意图。
具体实施方式
下面结合说明书附图阐述本发明提供的技术方案。
图2所示为本发明第一实施例的超结LDMOS结构示意图，与现有超结LDMOS相比，本实施例超结LDMOS的超结结构21深度小于扩散阱22的深度。
该超结LDMOS具体包括：P型衬底20、位于P型衬底中的N型扩散阱22以及栅源漏区23。其中，漏极漂移区由扩散阱22及超结结构21构成，所述超结结构21由成对交替出现的P型区和N型区构成，P型区与N型区对称。较佳的，超结结构21的深度宽度比即深宽比小于3。
图3～图6提供的是本实施例中超结LDMOS主要制作阶段的结构示意图。
参照图3，提供P型衬底30；
参照图4，使用光刻及高温扩散工艺，在P型衬底30中形成扩散阱31，扩散阱深度大于5微米；
参照图5，使用光刻及传统CMOS工艺，在扩散阱31上方形成STI 32；
参照图6，使用离子注入工艺，在STI 32下方形成超结结构33，超结结构33的深度小于扩散阱31深度，所述离子注入工艺参数包括离子注入浓度为1E12/cm2～1E13/cm2。
接着通过LDMOS常规工艺，完成LDMOS制作。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (7)

1.一种超结横向扩散金属氧化物半导体，其漏极漂移区包括扩散阱和超结结构，其特征在于，所述超结结构位于扩散阱上方，其深度小于扩散阱深度。
2.如权利要求1所述的超结横向扩散金属氧化物半导体，其特征在于，所述超结结构深度宽度比小于3。
3.如权利要求1所述的超结横向扩散金属氧化物半导体，其特征在于，所述扩散阱深度大于5微米。
4.如权利要求1所述的超结横向扩散金属氧化物半导体，其特征在于，该超结横向扩散金属氧化物半导体的击穿电压大于700伏特。
5.一种超结横向扩散金属氧化物半导体制作方法，其特征在于，包括步骤：
提供半导体衬底；
采用光刻及高温扩散工艺，在半导体衬底中形成扩散阱；
在扩散阱上方形成浅槽隔离层；
采用离子注入工艺，在扩散阱中形成超结结构，所述超结结构深度小于扩散阱深度；
通过后续常规工艺，完成超结横向扩散金属氧化物半导体制作。
6.如权利要求5所述的超结横向扩散金属氧化物半导体制作方法，其特征在于，所述超结结构深度宽度比小于3。
7.如权利要求5所述的超结横向扩散金属氧化物半导体制作方法，其特征在于，所述离子注入工艺的工艺参数包括：离子注入浓度为1E12/cm2～1E13/cm2；
如权利要求5所述的超结横向扩散金属氧化物半导体制作方法，其特征在于，所述扩散阱深度大于5微米。
CN201110298660A 2011-09-30 2011-09-30 超结横向扩散金属氧化物半导体及其制造方法 Pending CN102315273A (zh)

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