CN102315190B - 用于集成电路封装的电互连及其制造方法 - Google Patents

用于集成电路封装的电互连及其制造方法 Download PDF

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Publication number
CN102315190B
CN102315190B CN201110192482.1A CN201110192482A CN102315190B CN 102315190 B CN102315190 B CN 102315190B CN 201110192482 A CN201110192482 A CN 201110192482A CN 102315190 B CN102315190 B CN 102315190B
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China
Prior art keywords
contact pads
dielectric layer
die
layer
lower contact
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CN201110192482.1A
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Chinese (zh)
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CN102315190A (zh
Inventor
P·A·麦克康奈利
K·M·迪罗歇
S·史密斯
D·P·坎宁安
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General Electric Co
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General Electric Co
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    • H10W70/65—
    • H10W72/00—
    • H10W20/20—
    • H10W70/05—
    • H10W70/09—
    • H10W70/093—
    • H10W70/095—
    • H10W70/614—
    • H10W70/635—
    • H10W70/657—
    • H10W70/66—
    • H10W70/685—
    • H10W72/073—
    • H10W90/401—

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN201110192482.1A 2010-06-29 2011-06-29 用于集成电路封装的电互连及其制造方法 Active CN102315190B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/826359 2010-06-29
US12/826,359 US8653670B2 (en) 2010-06-29 2010-06-29 Electrical interconnect for an integrated circuit package and method of making same

Publications (2)

Publication Number Publication Date
CN102315190A CN102315190A (zh) 2012-01-11
CN102315190B true CN102315190B (zh) 2016-03-16

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Country Status (6)

Country Link
US (4) US8653670B2 (cg-RX-API-DMAC10.html)
EP (1) EP2402992B1 (cg-RX-API-DMAC10.html)
JP (1) JP6014309B2 (cg-RX-API-DMAC10.html)
KR (1) KR101846545B1 (cg-RX-API-DMAC10.html)
CN (1) CN102315190B (cg-RX-API-DMAC10.html)
TW (1) TWI536526B (cg-RX-API-DMAC10.html)

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US8658473B2 (en) * 2012-03-27 2014-02-25 General Electric Company Ultrathin buried die module and method of manufacturing thereof
US9165885B2 (en) * 2013-12-30 2015-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Staggered via redistribution layer (RDL) for a package and a method for forming the same
US9653438B2 (en) 2014-08-21 2017-05-16 General Electric Company Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof
US9666516B2 (en) 2014-12-01 2017-05-30 General Electric Company Electronic packages and methods of making and using the same
US10141251B2 (en) 2014-12-23 2018-11-27 General Electric Company Electronic packages with pre-defined via patterns and methods of making and using the same
CN106972093B (zh) * 2016-01-13 2019-01-08 光宝光电(常州)有限公司 发光二极管封装结构
US9563732B1 (en) 2016-01-26 2017-02-07 International Business Machines Corporation In-plane copper imbalance for warpage prediction
KR102019352B1 (ko) 2016-06-20 2019-09-09 삼성전자주식회사 팬-아웃 반도체 패키지
EP3553816A4 (en) * 2016-12-08 2020-05-06 Hitachi Chemical Co., Ltd. METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT
TWI648854B (zh) * 2017-06-14 2019-01-21 Win Semiconductors Corp. 用以減少化合物半導體晶圓變形之改良結構
TWI762894B (zh) * 2019-11-05 2022-05-01 友達光電股份有限公司 電路裝置

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CN1808711A (zh) * 2005-12-09 2006-07-26 威盛电子股份有限公司 封装体及封装体模块

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EP1030369B1 (en) * 1997-08-19 2007-12-12 Hitachi, Ltd. Multichip module structure and method for manufacturing the same
JP3618330B2 (ja) * 2002-11-08 2005-02-09 沖電気工業株式会社 半導体装置及びその製造方法
KR100613903B1 (ko) 2004-05-13 2006-08-17 한국전자통신연구원 유전자 알고리즘을 이용한 배열 안테나의 배열 간격 결정방법 및 이를 이용한 소파형 부등간격 배열 안테나
US7453157B2 (en) * 2004-06-25 2008-11-18 Tessera, Inc. Microelectronic packages and methods therefor
JP2006134912A (ja) * 2004-11-02 2006-05-25 Matsushita Electric Ind Co Ltd 半導体モジュールおよびその製造方法、ならびにフィルムインターポーザ
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US20080197478A1 (en) 2007-02-21 2008-08-21 Wen-Kun Yang Semiconductor device package with die receiving through-hole and connecting through-hole and method of the same
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TWI443789B (zh) 2008-07-04 2014-07-01 欣興電子股份有限公司 嵌埋有半導體晶片之電路板及其製法
US8237257B2 (en) * 2008-09-25 2012-08-07 King Dragon International Inc. Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same
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Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
CN1808711A (zh) * 2005-12-09 2006-07-26 威盛电子股份有限公司 封装体及封装体模块

Also Published As

Publication number Publication date
US20160211208A1 (en) 2016-07-21
US20140159213A1 (en) 2014-06-12
JP2012015504A (ja) 2012-01-19
US8653670B2 (en) 2014-02-18
KR20120001651A (ko) 2012-01-04
EP2402992A3 (en) 2013-05-08
KR101846545B1 (ko) 2018-04-06
US9679837B2 (en) 2017-06-13
US10068840B2 (en) 2018-09-04
US9299647B2 (en) 2016-03-29
TW201222755A (en) 2012-06-01
CN102315190A (zh) 2012-01-11
US20170278782A1 (en) 2017-09-28
EP2402992A2 (en) 2012-01-04
JP6014309B2 (ja) 2016-10-25
EP2402992B1 (en) 2018-11-21
US20110316167A1 (en) 2011-12-29
TWI536526B (zh) 2016-06-01

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