CN102308283A - 通过时钟占空比调整的半导体器件的性能退化的补偿 - Google Patents

通过时钟占空比调整的半导体器件的性能退化的补偿 Download PDF

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Publication number
CN102308283A
CN102308283A CN2009801556604A CN200980155660A CN102308283A CN 102308283 A CN102308283 A CN 102308283A CN 2009801556604 A CN2009801556604 A CN 2009801556604A CN 200980155660 A CN200980155660 A CN 200980155660A CN 102308283 A CN102308283 A CN 102308283A
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CN
China
Prior art keywords
integrated circuit
duty cycle
performance
clock signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2009801556604A
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English (en)
Chinese (zh)
Inventor
V·帕帕耶奥尔尤
M·维亚特尔
J·亨齐尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
AMD Fab 36 LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc, AMD Fab 36 LLC filed Critical Advanced Micro Devices Inc
Publication of CN102308283A publication Critical patent/CN102308283A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/008Reliability or availability analysis
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Pulse Circuits (AREA)
CN2009801556604A 2008-11-28 2009-11-27 通过时钟占空比调整的半导体器件的性能退化的补偿 Pending CN102308283A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102008059502A DE102008059502A1 (de) 2008-11-28 2008-11-28 Kompensation der Leistungsbeeinträchtigung von Halbleiterbauelementen durch Anpassung des Tastgrades des Taktsignals
DE102008059502.0 2008-11-28
US12/604,532 2009-10-23
US12/604,532 US8018260B2 (en) 2008-11-28 2009-10-23 Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptation
PCT/EP2009/008470 WO2010060638A1 (en) 2008-11-28 2009-11-27 Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptation

Publications (1)

Publication Number Publication Date
CN102308283A true CN102308283A (zh) 2012-01-04

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009801556604A Pending CN102308283A (zh) 2008-11-28 2009-11-27 通过时钟占空比调整的半导体器件的性能退化的补偿

Country Status (6)

Country Link
US (1) US8018260B2 (enExample)
JP (1) JP2012510742A (enExample)
KR (1) KR20110138209A (enExample)
CN (1) CN102308283A (enExample)
DE (1) DE102008059502A1 (enExample)
WO (1) WO2010060638A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119231931A (zh) * 2024-12-03 2024-12-31 浙江绿力智能科技有限公司 一种转换器智能调控方法及系统

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US8984305B2 (en) * 2010-12-21 2015-03-17 Intel Corporation Method and apparatus to configure thermal design power in a microprocessor
US8578143B2 (en) * 2011-05-17 2013-11-05 Apple Inc. Modifying operating parameters based on device use
JP2015002452A (ja) * 2013-06-17 2015-01-05 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体装置
US9465373B2 (en) 2013-09-17 2016-10-11 International Business Machines Corporation Dynamic adjustment of operational parameters to compensate for sensor based measurements of circuit degradation
KR102197943B1 (ko) 2014-04-04 2021-01-05 삼성전자주식회사 메모리 컨트롤러와 이를 포함하는 시스템
US9251890B1 (en) 2014-12-19 2016-02-02 Globalfoundries Inc. Bias temperature instability state detection and correction
US9704598B2 (en) * 2014-12-27 2017-07-11 Intel Corporation Use of in-field programmable fuses in the PCH dye
KR102235521B1 (ko) 2015-02-13 2021-04-05 삼성전자주식회사 특정 패턴을 갖는 저장 장치 및 그것의 동작 방법
US11605416B1 (en) * 2021-11-10 2023-03-14 Micron Technology, Inc. Reducing duty cycle degradation for a signal path

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Publication number Priority date Publication date Assignee Title
JPH04274100A (ja) * 1991-03-01 1992-09-30 Nec Corp テスト回路内蔵のメモリーlsi
JP2000012639A (ja) * 1998-06-24 2000-01-14 Toshiba Corp モニターtegのテスト回路
DE60122960T2 (de) * 2000-04-20 2007-03-29 Texas Instruments Incorporated, Dallas Digitale eingebaute Selbsttestschaltungsanordnung für Phasenregelschleife
US6903564B1 (en) * 2003-11-12 2005-06-07 Transmeta Corporation Device aging determination circuit
JP4360825B2 (ja) * 2002-04-24 2009-11-11 株式会社半導体エネルギー研究所 半導体装置の寿命予測方法
US7475320B2 (en) * 2003-08-19 2009-01-06 International Business Machines Corporation Frequency modification techniques that adjust an operating frequency to compensate for aging electronic components
US7322001B2 (en) * 2005-10-04 2008-01-22 International Business Machines Corporation Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
US7333905B2 (en) * 2006-05-01 2008-02-19 International Business Machines Corporation Method and apparatus for measuring the duty cycle of a digital signal
US7330061B2 (en) * 2006-05-01 2008-02-12 International Business Machines Corporation Method and apparatus for correcting the duty cycle of a digital signal
US7495519B2 (en) * 2007-04-30 2009-02-24 International Business Machines Corporation System and method for monitoring reliability of a digital system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119231931A (zh) * 2024-12-03 2024-12-31 浙江绿力智能科技有限公司 一种转换器智能调控方法及系统

Also Published As

Publication number Publication date
DE102008059502A1 (de) 2010-06-10
WO2010060638A1 (en) 2010-06-03
US20100134167A1 (en) 2010-06-03
JP2012510742A (ja) 2012-05-10
US8018260B2 (en) 2011-09-13
KR20110138209A (ko) 2011-12-26

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Free format text: FORMER OWNER: AMD FAB 36 LLC + CO. KG

Effective date: 20120203

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20120203

Address after: American California

Applicant after: Advanced Micro Devices Inc.

Address before: American California

Applicant before: Advanced Micro Devices Inc.

Co-applicant before: AMD FAB 36 limited liability company

C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20120104