CN102270601A - 双镶嵌结构的制造方法 - Google Patents
双镶嵌结构的制造方法 Download PDFInfo
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- CN102270601A CN102270601A CN2010101924174A CN201010192417A CN102270601A CN 102270601 A CN102270601 A CN 102270601A CN 2010101924174 A CN2010101924174 A CN 2010101924174A CN 201010192417 A CN201010192417 A CN 201010192417A CN 102270601 A CN102270601 A CN 102270601A
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Priority Applications (1)
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CN2010101924174A CN102270601A (zh) | 2010-06-04 | 2010-06-04 | 双镶嵌结构的制造方法 |
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CN2010101924174A CN102270601A (zh) | 2010-06-04 | 2010-06-04 | 双镶嵌结构的制造方法 |
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CN102270601A true CN102270601A (zh) | 2011-12-07 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336576A (zh) * | 2014-08-12 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制备方法 |
CN108122822A (zh) * | 2016-11-29 | 2018-06-05 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制备方法 |
CN109904111A (zh) * | 2017-12-11 | 2019-06-18 | 中芯国际集成电路制造(北京)有限公司 | 互连结构及其制造方法 |
CN111063655A (zh) * | 2018-10-17 | 2020-04-24 | 无锡华润上华科技有限公司 | 一种半导体器件的制造方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6358842B1 (en) * | 2000-08-07 | 2002-03-19 | Chartered Semiconductor Manufacturing Ltd. | Method to form damascene interconnects with sidewall passivation to protect organic dielectrics |
EP1263035A1 (en) * | 2001-05-23 | 2002-12-04 | Texas Instruments Incorporated | Method for sealing via sidewalls in porous low-k dielectric layers |
US20030077897A1 (en) * | 2001-05-24 | 2003-04-24 | Taiwan Semiconductor Manufacturing Company | Method to solve via poisoning for porous low-k dielectric |
CN101123243A (zh) * | 2006-08-10 | 2008-02-13 | 中芯国际集成电路制造(上海)有限公司 | 双镶嵌结构的制造方法 |
CN101154622A (zh) * | 2006-09-30 | 2008-04-02 | 中芯国际集成电路制造(上海)有限公司 | 双镶嵌结构的形成方法 |
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2010
- 2010-06-04 CN CN2010101924174A patent/CN102270601A/zh active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6358842B1 (en) * | 2000-08-07 | 2002-03-19 | Chartered Semiconductor Manufacturing Ltd. | Method to form damascene interconnects with sidewall passivation to protect organic dielectrics |
EP1263035A1 (en) * | 2001-05-23 | 2002-12-04 | Texas Instruments Incorporated | Method for sealing via sidewalls in porous low-k dielectric layers |
US20030077897A1 (en) * | 2001-05-24 | 2003-04-24 | Taiwan Semiconductor Manufacturing Company | Method to solve via poisoning for porous low-k dielectric |
CN101123243A (zh) * | 2006-08-10 | 2008-02-13 | 中芯国际集成电路制造(上海)有限公司 | 双镶嵌结构的制造方法 |
CN101154622A (zh) * | 2006-09-30 | 2008-04-02 | 中芯国际集成电路制造(上海)有限公司 | 双镶嵌结构的形成方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336576A (zh) * | 2014-08-12 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制备方法 |
CN108122822A (zh) * | 2016-11-29 | 2018-06-05 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制备方法 |
CN109904111A (zh) * | 2017-12-11 | 2019-06-18 | 中芯国际集成电路制造(北京)有限公司 | 互连结构及其制造方法 |
CN111063655A (zh) * | 2018-10-17 | 2020-04-24 | 无锡华润上华科技有限公司 | 一种半导体器件的制造方法 |
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Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHA Effective date: 20130620 Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Free format text: FORMER OWNER: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION Effective date: 20130620 |
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Application publication date: 20111207 |