CN102169160A - Pin multiplexing verifying device and method for integrated circuit - Google Patents
Pin multiplexing verifying device and method for integrated circuit Download PDFInfo
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- CN102169160A CN102169160A CN2010101099374A CN201010109937A CN102169160A CN 102169160 A CN102169160 A CN 102169160A CN 2010101099374 A CN2010101099374 A CN 2010101099374A CN 201010109937 A CN201010109937 A CN 201010109937A CN 102169160 A CN102169160 A CN 102169160A
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Abstract
The invention provides a pin multiplexing verifying device and method for an integrated circuit. The verifying device comprises a recoding and storing module, a generating module and a testing module, wherein the recording and storing module is used for storing each pin information data table, the generating module is used for generating test vectors by analyzing the scripts of the data tables, and the test vectors include an excitation verifying value of a configurable pin signal and an expected verifying value of an in-configurable pin signal, the testing module is used for setting the configurable pin signal to be the excitation verifying value to obtain an actual measured value of the in-configurable pin signal, and the actual measured value is compared with the expected verifying value to obtain a verification result. By adopting the pin multiplexing verifying device and method, the error possibility of pin multiplexing can be reduced, safety can be improved, and time and cost can be saved.
Description
Technical field
The present invention relates to integrated circuit fields, particularly relate to a kind of demo plant and verification method of pin multiplexing of integrated circuit.
Background technology
In the design and checking of large scale integrated circuit, the checking of pin multiplexing is an extremely important and very loaded down with trivial details job always.Present way generally be the design engineer of pin multiplexing the multiplexing document (normally electronic data sheet) of being write as of pin, write test vector and on simulation and verification platform, verify by the checking slip-stick artist then.Do a large amount of time and the energy of meeting cost like this, and, also often cause verifying slip-stick artist's omission easily, thereby cause some mistakes in time not found because the design code of pin multiplexing part can often be revised.
Summary of the invention
The demo plant and the verification method that the purpose of this invention is to provide a kind of pin multiplexing of integrated circuit can reduce the probability of makeing mistakes of pin multiplexing, improve security, and save time and cost.
To achieve these goals, on the one hand, provide a kind of demo plant of pin multiplexing of integrated circuit, having comprised:
The recording storage module is used for: the data form of storing each pin information;
Generation module is used for: generate test vector by the script of resolving described data form; The excitation validation value that comprises configurable pin signal in the described test vector, and the expectation validation value of not configurable pin signal;
Test module is used for: described configurable pin signal is set to described excitation validation value, obtains the actual measured value of described not configurable pin signal, obtains the checking result by more described actual measured value and described expectation validation value.
Preferably, in the above-mentioned demo plant, described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal;
Described not configurable pin signal comprises: output signal and echo signal.
Preferably, in the above-mentioned demo plant, the state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions;
The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
Preferably, in the above-mentioned demo plant, described test module comprises:
Performance element is used for described input signal, described test mode select signal, described multiplexing functions selection signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal and is set to described excitation validation value;
Obtain the unit, be used to obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value;
The report unit is pointed out or is reported to the police according to described checking result.
To achieve these goals, the present invention also provides a kind of verification method of pin multiplexing of integrated circuit, comprising:
Step 1 is stored the data form of each pin information;
Step 2 generates test vector by the script of resolving described data form; The excitation validation value that comprises configurable pin signal in the described test vector, and the expectation validation value of not configurable pin signal;
Step 3, described configurable pin signal is set to described excitation validation value, obtains the actual measured value of described not configurable pin signal, obtains the checking result by more described actual measured value and described expectation validation value.
Preferably, in the above-mentioned method, described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal;
Described not configurable pin signal comprises: output signal and echo signal.
Preferably, in the above-mentioned method, the state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions;
The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
Preferably, in the above-mentioned method, described step 3 specifically comprises:
Described input signal, described test mode select signal, described multiplexing functions select signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal to be set to described excitation validation value;
Obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value;
Point out or report to the police according to described checking result.
There is following technique effect at least in the present invention:
1) the present invention comprises the script of the data form of pin information by parsing, obtain the pin signal message, so just can not omit the pin signal message of new variation because of the variation of pin multiplexing, and generate test vector automatically by script, avoided loaded down with trivial details work by the artificial design test vector of slip-stick artist, not only can carry out the testing authentication of pin multiplexing accurately, also save manpower and cost, reduce the test duration of integrated circuit.
2) use this method can save down the plenty of time of structure pin multiplexing test vector, and the risk that mistake is occurred tapers to an only document mistake part from three class risk of errors of document, design and test vector, thereby reduced the probability that pin multiplexing is partly made mistakes greatly, improved the security of design greatly.
Description of drawings
The structural drawing of the demo plant that Fig. 1 provides for the embodiment of the invention;
The structural drawing of the pin that Fig. 2 provides for the embodiment of the invention;
The flow chart of steps of the verification method that Fig. 3 provides for the embodiment of the invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention is clearer, specific embodiment is described in detail below in conjunction with accompanying drawing.
The structural drawing of the demo plant that Fig. 1 provides for the embodiment of the invention, as shown in the figure, the demo plant of the pin multiplexing of integrated circuit comprises:
As seen, the present invention is by resolving the current script of integrated circuit, obtain the pin signal message of pin, so just can not omit the pin signal message of new variation because of pin multiplexing, and by automatically generating test vector, avoided loaded down with trivial details work, improperly can carry out the testing authentication of pin multiplexing accurately by the artificial design test vector of slip-stick artist, also save manpower and cost, reduced the test duration of integrated circuit.
Wherein, described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal; Described not configurable pin signal comprises: output signal and echo signal.
The state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions;
The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
The structural drawing of the pin that Fig. 2 provides for the embodiment of the invention, as shown in the figure, there is following relation in pin ABCE:
During E=0, C=0;
E=1, and when A=1 or B=1, C=1.
Corresponding data form is as follows:
| E | A | B | C |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 |
If test vector is (input: E=1, A=1, B=0; Output: C=1), be recorded as (1101).So, be (0000) successively to the test vector that should form produces automatically, (0100), (0010), (0110), (1000), (1101), (1011), (1111).
If in the process of pin multiplexing, pin ABCE relation is revised as:
During E=1, C=0;
E=0, and when A=1 or B=1, C=1.
Data form after corresponding the renewal is as follows:
| E | A | B | C |
| 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 1 |
Automatically the test vector that produces is (1000) successively, (1100), (1010), (1110), (0000), (0101), (0011), (0111).
Among the present invention, described test module comprises:
Performance element is used for described input signal, described test mode select signal, described multiplexing functions selection signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal and is set to described excitation validation value;
Obtain the unit, be used to obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value;
The report unit is pointed out or is reported to the police according to described checking result.
When just described actual measured value and described expectation validation value meet, think that pin is normal, do not meet then pin and make mistakes, report to the police.
The embodiment of the invention also provides a kind of verification method of pin multiplexing of integrated circuit, comprising:
Step 301 is stored the data form of each pin information;
Step 302 generates test vector by the script of resolving described data form; The excitation validation value that comprises configurable pin signal in the described test vector, and the expectation validation value of not configurable pin signal;
Wherein, described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal; Described not configurable pin signal comprises: output signal and echo signal.
The state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions; The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
Described step 303 specifically comprises: described input signal, described test mode select signal, described multiplexing functions select signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal to be set to described excitation validation value; Obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value; Point out or report to the police according to described checking result.
Therefore, the present invention resolves electronic data sheet from script, selects information such as signal, input/output control signal, multiplexing functions signal, test pattern data source signal and multiplexing functions mode signal source to produce the test vector of the signal one by one under test and the multiplexing functions pattern according to the test mode select signal in the electronic data sheet, multiplexing functions.Verify that then the slip-stick artist covers test vector in the simulation and verification platform, the operation test vector just can reach the purpose of checking pin multiplexing.
As seen, the present invention is the test vector that produces the pin multiplexing aspect with the electronic data sheet that script is resolved pin multiplexing automatically, and when the checking slip-stick artist does not need to spend in this respect and energy, only the test vector operation need be got final product.
As from the foregoing, the embodiment of the invention has following advantage:
1) the present invention comprises the script of the data form of pin information by parsing, obtain the pin signal message, so just can not omit the pin signal message of new variation because of the variation of pin multiplexing, and generate test vector automatically by script, avoided loaded down with trivial details work by the artificial design test vector of slip-stick artist, not only can carry out the testing authentication of pin multiplexing accurately, also save manpower and cost, reduce the test duration of integrated circuit.
2) use this method can save down the plenty of time of structure pin multiplexing test vector, and the risk that mistake is occurred tapers to an only document mistake part from three class risk of errors of document, design and test vector, thereby reduced the probability that pin multiplexing is partly made mistakes greatly, improved the security of design greatly.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (8)
1. the demo plant of the pin multiplexing of an integrated circuit is characterized in that, comprising:
The recording storage module is used for: the data form of storing each pin information;
Generation module is used for: generate test vector by the script of resolving described data form; The excitation validation value that comprises configurable pin signal in the described test vector, and the expectation validation value of not configurable pin signal;
Test module is used for: described configurable pin signal is set to described excitation validation value, obtains the actual measured value of described not configurable pin signal, obtains the checking result by more described actual measured value and described expectation validation value.
2. demo plant according to claim 1 is characterized in that,
Described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal;
Described not configurable pin signal comprises: output signal and echo signal.
3. demo plant according to claim 2 is characterized in that,
The state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions;
The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
4. demo plant according to claim 2 is characterized in that, described test module comprises:
Performance element is used for described input signal, described test mode select signal, described multiplexing functions selection signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal and is set to described excitation validation value;
Obtain the unit, be used to obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value;
The report unit is pointed out or is reported to the police according to described checking result.
5. the verification method of the pin multiplexing of an integrated circuit is characterized in that, comprising:
Step 1 is stored the data form of each pin information;
Step 2 generates test vector by the script of resolving described data form; The excitation validation value that comprises configurable pin signal in the described test vector, and the expectation validation value of not configurable pin signal;
Step 3, described configurable pin signal is set to described excitation validation value, obtains the actual measured value of described not configurable pin signal, obtains the checking result by more described actual measured value and described expectation validation value.
6. verification method according to claim 5 is characterized in that,
Described configurable pin signal comprises: input signal, test mode select signal, multiplexing functions are selected signal, input/output control signal, multiplexing functions signal, test pattern data source signal and/or multiplexing functions mode signal source signal;
Described not configurable pin signal comprises: output signal and echo signal.
7. verification method according to claim 6 is characterized in that,
The state of described output signal and numerical value are selected the state and the numerical value decision of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal by described test mode select signal, described multiplexing functions;
The state of described echo signal and numerical value select the state and the numerical value of signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal then to determine by described input signal, described test mode select signal, described multiplexing functions.
8. verification method according to claim 6 is characterized in that, described step 3 specifically comprises:
Described input signal, described test mode select signal, described multiplexing functions select signal, described input/output control signal, described multiplexing functions signal, described test pattern data source signal and/or described multiplexing functions mode signal source signal to be set to described excitation validation value;
Obtain the actual measured value of described output signal and described echo signal, obtain the checking result by more described actual measured value and described expectation validation value;
Point out or report to the police according to described checking result.
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| CN201010109937.4A CN102169160B (en) | 2010-02-08 | 2010-02-08 | A kind of demo plant of pin multiplexing of integrated circuit and verification method |
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| CN102169160B CN102169160B (en) | 2015-09-16 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107678909A (en) * | 2017-07-31 | 2018-02-09 | 郑州云海信息技术有限公司 | The circuit and method of monitoring chip configuration status in a kind of server |
| CN108268676A (en) * | 2016-12-30 | 2018-07-10 | 联芯科技有限公司 | The verification method and device of pin multiplexing |
| CN111665432A (en) * | 2020-05-22 | 2020-09-15 | 中国人民解放军国防科技大学 | Verification method, device, equipment and storage medium for chip pin multiplexing module |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108268676A (en) * | 2016-12-30 | 2018-07-10 | 联芯科技有限公司 | The verification method and device of pin multiplexing |
| CN107678909A (en) * | 2017-07-31 | 2018-02-09 | 郑州云海信息技术有限公司 | The circuit and method of monitoring chip configuration status in a kind of server |
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| CN111665432A (en) * | 2020-05-22 | 2020-09-15 | 中国人民解放军国防科技大学 | Verification method, device, equipment and storage medium for chip pin multiplexing module |
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Address after: 214028 national integrated circuit design (21-1), Changjiang Road, New District, Jiangsu, Wuxi, China, China (610) Patentee after: WUXI ZHONGGAN MICROELECTRONIC CO., LTD. Address before: 214028 national integrated circuit design (21-1), Changjiang Road, New District, Jiangsu, Wuxi, China, China (610) Patentee before: Wuxi Vimicro Co., Ltd. |